arch/blackfin/mach-bf527/boards/ezbrd.c

   1 /*
   2  * Copyright 2004-2009 Analog Devices Inc.
   3  *                2005 National ICT Australia (NICTA)
   4  *                      Aidan Williams <aidan@nicta.com.au>
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #include <linux/device.h>
  10 #include <linux/platform_device.h>
  11 #include <linux/mtd/mtd.h>
  12 #include <linux/mtd/partitions.h>
  13 #include <linux/mtd/physmap.h>
  14 #include <linux/spi/spi.h>
  15 #include <linux/spi/flash.h>
  16
  17 #include <linux/i2c.h>
  18 #include <linux/irq.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/usb/musb.h>
  21 #include <asm/dma.h>
  22 #include <asm/bfin5xx_spi.h>
  23 #include <asm/reboot.h>
  24 #include <asm/nand.h>
  25 #include <asm/portmux.h>
  26 #include <asm/dpmc.h>
  27 #include <linux/spi/ad7877.h>
  28
  29 /*
  30  * Name the Board for the /proc/cpuinfo
  31  */
  32 const char bfin_board_name[] = "ADI BF526-EZBRD";
  33
  34 /*
  35  *  Driver needs to know address, irq and flag pin.
  36  */
  37
  38 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  39 static struct resource musb_resources[] = {
  40         [0] = {
  41                 .start  = 0xffc03800,
  42                 .end    = 0xffc03cff,
  43                 .flags  = IORESOURCE_MEM,
  44         },
  45         [1] = { /* general IRQ */
  46                 .start  = IRQ_USB_INT0,
  47                 .end    = IRQ_USB_INT0,
  48                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  49                 .name   = "mc"
  50         },
  51         [2] = { /* DMA IRQ */
  52                 .start  = IRQ_USB_DMA,
  53                 .end    = IRQ_USB_DMA,
  54                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  55                 .name   = "dma"
  56         },
  57 };
  58
  59 static struct musb_hdrc_config musb_config = {
  60         .multipoint     = 0,
  61         .dyn_fifo       = 0,
  62         .soft_con       = 1,
  63         .dma            = 1,
  64         .num_eps        = 8,
  65         .dma_channels   = 8,
  66         .gpio_vrsel     = GPIO_PG13,
  67         /* Some custom boards need to be active low, just set it to "0"
  68          * if it is the case.
  69          */
  70         .gpio_vrsel_active      = 1,
  71         .clkin          = 24,           /* musb CLKIN in MHZ */
  72 };
  73
  74 static struct musb_hdrc_platform_data musb_plat = {
  75 #if defined(CONFIG_USB_MUSB_OTG)
  76         .mode           = MUSB_OTG,
  77 #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  78         .mode           = MUSB_HOST,
  79 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  80         .mode           = MUSB_PERIPHERAL,
  81 #endif
  82         .config         = &musb_config,
  83 };
  84
  85 static u64 musb_dmamask = ~(u32)0;
  86
  87 static struct platform_device musb_device = {
  88         .name           = "musb-blackfin",
  89         .id             = 0,
  90         .dev = {
  91                 .dma_mask               = &musb_dmamask,
  92                 .coherent_dma_mask      = 0xffffffff,
  93                 .platform_data          = &musb_plat,
  94         },
  95         .num_resources  = ARRAY_SIZE(musb_resources),
  96         .resource       = musb_resources,
  97 };
  98 #endif
  99
 100 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 101 static struct mtd_partition ezbrd_partitions[] = {
 102         {
 103                 .name       = "bootloader(nor)",
 104                 .size       = 0x40000,
 105                 .offset     = 0,
 106         }, {
 107                 .name       = "linux kernel(nor)",
 108                 .size       = 0x1C0000,
 109                 .offset     = MTDPART_OFS_APPEND,
 110         }, {
 111                 .name       = "file system(nor)",
 112                 .size       = MTDPART_SIZ_FULL,
 113                 .offset     = MTDPART_OFS_APPEND,
 114         }
 115 };
 116
 117 static struct physmap_flash_data ezbrd_flash_data = {
 118         .width      = 2,
 119         .parts      = ezbrd_partitions,
 120         .nr_parts   = ARRAY_SIZE(ezbrd_partitions),
 121 };
 122
 123 static struct resource ezbrd_flash_resource = {
 124         .start = 0x20000000,
 125         .end   = 0x203fffff,
 126         .flags = IORESOURCE_MEM,
 127 };
 128
 129 static struct platform_device ezbrd_flash_device = {
 130         .name          = "physmap-flash",
 131         .id            = 0,
 132         .dev = {
 133                 .platform_data = &ezbrd_flash_data,
 134         },
 135         .num_resources = 1,
 136         .resource      = &ezbrd_flash_resource,
 137 };
 138 #endif
 139
 140 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
 141 static struct mtd_partition partition_info[] = {
 142         {
 143                 .name = "bootloader(nand)",
 144                 .offset = 0,
 145                 .size = 0x40000,
 146         }, {
 147                 .name = "linux kernel(nand)",
 148                 .offset = MTDPART_OFS_APPEND,
 149                 .size = 4 * 1024 * 1024,
 150         },
 151         {
 152                 .name = "file system(nand)",
 153                 .offset = MTDPART_OFS_APPEND,
 154                 .size = MTDPART_SIZ_FULL,
 155         },
 156 };
 157
 158 static struct bf5xx_nand_platform bf5xx_nand_platform = {
 159         .data_width = NFC_NWIDTH_8,
 160         .partitions = partition_info,
 161         .nr_partitions = ARRAY_SIZE(partition_info),
 162         .rd_dly = 3,
 163         .wr_dly = 3,
 164 };
 165
 166 static struct resource bf5xx_nand_resources[] = {
 167         {
 168                 .start = NFC_CTL,
 169                 .end = NFC_DATA_RD + 2,
 170                 .flags = IORESOURCE_MEM,
 171         },
 172         {
 173                 .start = CH_NFC,
 174                 .end = CH_NFC,
 175                 .flags = IORESOURCE_IRQ,
 176         },
 177 };
 178
 179 static struct platform_device bf5xx_nand_device = {
 180         .name = "bf5xx-nand",
 181         .id = 0,
 182         .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
 183         .resource = bf5xx_nand_resources,
 184         .dev = {
 185                 .platform_data = &bf5xx_nand_platform,
 186         },
 187 };
 188 #endif
 189
 190 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 191 static struct platform_device rtc_device = {
 192         .name = "rtc-bfin",
 193         .id   = -1,
 194 };
 195 #endif
 196
 197
 198 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 199 #include <linux/bfin_mac.h>
 200 static const unsigned short bfin_mac_peripherals[] = P_RMII0;
 201
 202 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
 203         {
 204                 .addr = 1,
 205                 .irq = IRQ_MAC_PHYINT,
 206         },
 207 };
 208
 209 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
 210         .phydev_number = 1,
 211         .phydev_data = bfin_phydev_data,
 212         .phy_mode = PHY_INTERFACE_MODE_RMII,
 213         .mac_peripherals = bfin_mac_peripherals,
 214 };
 215
 216 static struct platform_device bfin_mii_bus = {
 217         .name = "bfin_mii_bus",
 218         .dev = {
 219                 .platform_data = &bfin_mii_bus_data,
 220         }
 221 };
 222
 223 static struct platform_device bfin_mac_device = {
 224         .name = "bfin_mac",
 225         .dev = {
 226                 .platform_data = &bfin_mii_bus,
 227         }
 228 };
 229 #endif
 230
 231 #if defined(CONFIG_MTD_M25P80) \
 232         || defined(CONFIG_MTD_M25P80_MODULE)
 233 static struct mtd_partition bfin_spi_flash_partitions[] = {
 234         {
 235                 .name = "bootloader(spi)",
 236                 .size = 0x00040000,
 237                 .offset = 0,
 238                 .mask_flags = MTD_CAP_ROM
 239         }, {
 240                 .name = "linux kernel(spi)",
 241                 .size = MTDPART_SIZ_FULL,
 242                 .offset = MTDPART_OFS_APPEND,
 243         }
 244 };
 245
 246 static struct flash_platform_data bfin_spi_flash_data = {
 247         .name = "m25p80",
 248         .parts = bfin_spi_flash_partitions,
 249         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 250         .type = "sst25wf040",
 251 };
 252
 253 /* SPI flash chip (sst25wf040) */
 254 static struct bfin5xx_spi_chip spi_flash_chip_info = {
 255         .enable_dma = 0,         /* use dma transfer with this chip*/
 256 };
 257 #endif
 258
 259 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 260 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
 261         .enable_dma = 0,
 262 };
 263 #endif
 264
 265 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 266 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
 267         .model                  = 7877,
 268         .vref_delay_usecs       = 50,   /* internal, no capacitor */
 269         .x_plate_ohms           = 419,
 270         .y_plate_ohms           = 486,
 271         .pressure_max           = 1000,
 272         .pressure_min           = 0,
 273         .stopacq_polarity       = 1,
 274         .first_conversion_delay = 3,
 275         .acquisition_time       = 1,
 276         .averaging              = 1,
 277         .pen_down_acc_interval  = 1,
 278 };
 279 #endif
 280
 281 #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
 282 #include <linux/spi/ad7879.h>
 283 static const struct ad7879_platform_data bfin_ad7879_ts_info = {
 284         .model                  = 7879, /* Model = AD7879 */
 285         .x_plate_ohms           = 620,  /* 620 Ohm from the touch datasheet */
 286         .pressure_max           = 10000,
 287         .pressure_min           = 0,
 288         .first_conversion_delay = 3,    /* wait 512us before do a first conversion */
 289         .acquisition_time       = 1,    /* 4us acquisition time per sample */
 290         .median                 = 2,    /* do 8 measurements */
 291         .averaging              = 1,    /* take the average of 4 middle samples */
 292         .pen_down_acc_interval  = 255,  /* 9.4 ms */
 293         .gpio_export            = 1,    /* Export GPIO to gpiolib */
 294         .gpio_base              = -1,   /* Dynamic allocation */
 295 };
 296 #endif
 297
 298 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 299 #if defined(CONFIG_MTD_M25P80) \
 300         || defined(CONFIG_MTD_M25P80_MODULE)
 301         {
 302                 /* the modalias must be the same as spi device driver name */
 303                 .modalias = "m25p80", /* Name of spi_driver for this device */
 304                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 305                 .bus_num = 0, /* Framework bus number */
 306                 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
 307                 .platform_data = &bfin_spi_flash_data,
 308                 .controller_data = &spi_flash_chip_info,
 309                 .mode = SPI_MODE_3,
 310         },
 311 #endif
 312
 313 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 314         {
 315                 .modalias = "mmc_spi",
 316                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 317                 .bus_num = 0,
 318                 .chip_select = 5,
 319                 .controller_data = &mmc_spi_chip_info,
 320                 .mode = SPI_MODE_3,
 321         },
 322 #endif
 323 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 324         {
 325                 .modalias               = "ad7877",
 326                 .platform_data          = &bfin_ad7877_ts_info,
 327                 .irq                    = IRQ_PF8,
 328                 .max_speed_hz   = 12500000,     /* max spi clock (SCK) speed in HZ */
 329                 .bus_num        = 0,
 330                 .chip_select  = 2,
 331         },
 332 #endif
 333 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
 334         {
 335                 .modalias = "ad7879",
 336                 .platform_data = &bfin_ad7879_ts_info,
 337                 .irq = IRQ_PG0,
 338                 .max_speed_hz = 5000000,     /* max spi clock (SCK) speed in HZ */
 339                 .bus_num = 0,
 340                 .chip_select = 5,
 341                 .mode = SPI_CPHA | SPI_CPOL,
 342         },
 343 #endif
 344 #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
 345          && defined(CONFIG_SND_SOC_WM8731_SPI)
 346         {
 347                 .modalias       = "wm8731",
 348                 .max_speed_hz   = 3125000,     /* max spi clock (SCK) speed in HZ */
 349                 .bus_num        = 0,
 350                 .chip_select    = 5,
 351                 .mode = SPI_MODE_0,
 352         },
 353 #endif
 354 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 355         {
 356                 .modalias = "spidev",
 357                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 358                 .bus_num = 0,
 359                 .chip_select = 1,
 360         },
 361 #endif
 362 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 363         {
 364                 .modalias = "bfin-lq035q1-spi",
 365                 .max_speed_hz = 20000000,     /* max spi clock (SCK) speed in HZ */
 366                 .bus_num = 0,
 367                 .chip_select = 1,
 368                 .mode = SPI_CPHA | SPI_CPOL,
 369         },
 370 #endif
 371 };
 372
 373 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 374 /* SPI controller data */
 375 static struct bfin5xx_spi_master bfin_spi0_info = {
 376         .num_chipselect = 8,
 377         .enable_dma = 1,  /* master has the ability to do dma transfer */
 378         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 379 };
 380
 381 /* SPI (0) */
 382 static struct resource bfin_spi0_resource[] = {
 383         [0] = {
 384                 .start = SPI0_REGBASE,
 385                 .end   = SPI0_REGBASE + 0xFF,
 386                 .flags = IORESOURCE_MEM,
 387                 },
 388         [1] = {
 389                 .start = CH_SPI,
 390                 .end   = CH_SPI,
 391                 .flags = IORESOURCE_DMA,
 392         },
 393         [2] = {
 394                 .start = IRQ_SPI,
 395                 .end   = IRQ_SPI,
 396                 .flags = IORESOURCE_IRQ,
 397         },
 398 };
 399
 400 static struct platform_device bfin_spi0_device = {
 401         .name = "bfin-spi",
 402         .id = 0, /* Bus number */
 403         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 404         .resource = bfin_spi0_resource,
 405         .dev = {
 406                 .platform_data = &bfin_spi0_info, /* Passed to driver */
 407         },
 408 };
 409 #endif  /* spi master and devices */
 410
 411 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 412 #ifdef CONFIG_SERIAL_BFIN_UART0
 413 static struct resource bfin_uart0_resources[] = {
 414         {
 415                 .start = UART0_THR,
 416                 .end = UART0_GCTL+2,
 417                 .flags = IORESOURCE_MEM,
 418         },
 419         {
 420                 .start = IRQ_UART0_RX,
 421                 .end = IRQ_UART0_RX+1,
 422                 .flags = IORESOURCE_IRQ,
 423         },
 424         {
 425                 .start = IRQ_UART0_ERROR,
 426                 .end = IRQ_UART0_ERROR,
 427                 .flags = IORESOURCE_IRQ,
 428         },
 429         {
 430                 .start = CH_UART0_TX,
 431                 .end = CH_UART0_TX,
 432                 .flags = IORESOURCE_DMA,
 433         },
 434         {
 435                 .start = CH_UART0_RX,
 436                 .end = CH_UART0_RX,
 437                 .flags = IORESOURCE_DMA,
 438         },
 439 };
 440
 441 static unsigned short bfin_uart0_peripherals[] = {
 442         P_UART0_TX, P_UART0_RX, 0
 443 };
 444
 445 static struct platform_device bfin_uart0_device = {
 446         .name = "bfin-uart",
 447         .id = 0,
 448         .num_resources = ARRAY_SIZE(bfin_uart0_resources),
 449         .resource = bfin_uart0_resources,
 450         .dev = {
 451                 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
 452         },
 453 };
 454 #endif
 455 #ifdef CONFIG_SERIAL_BFIN_UART1
 456 static struct resource bfin_uart1_resources[] = {
 457         {
 458                 .start = UART1_THR,
 459                 .end = UART1_GCTL+2,
 460                 .flags = IORESOURCE_MEM,
 461         },
 462         {
 463                 .start = IRQ_UART1_RX,
 464                 .end = IRQ_UART1_RX+1,
 465                 .flags = IORESOURCE_IRQ,
 466         },
 467         {
 468                 .start = IRQ_UART1_ERROR,
 469                 .end = IRQ_UART1_ERROR,
 470                 .flags = IORESOURCE_IRQ,
 471         },
 472         {
 473                 .start = CH_UART1_TX,
 474                 .end = CH_UART1_TX,
 475                 .flags = IORESOURCE_DMA,
 476         },
 477         {
 478                 .start = CH_UART1_RX,
 479                 .end = CH_UART1_RX,
 480                 .flags = IORESOURCE_DMA,
 481         },
 482 #ifdef CONFIG_BFIN_UART1_CTSRTS
 483         {       /* CTS pin */
 484                 .start = GPIO_PG0,
 485                 .end = GPIO_PG0,
 486                 .flags = IORESOURCE_IO,
 487         },
 488         {       /* RTS pin */
 489                 .start = GPIO_PF10,
 490                 .end = GPIO_PF10,
 491                 .flags = IORESOURCE_IO,
 492         },
 493 #endif
 494 };
 495
 496 static unsigned short bfin_uart1_peripherals[] = {
 497         P_UART1_TX, P_UART1_RX, 0
 498 };
 499
 500 static struct platform_device bfin_uart1_device = {
 501         .name = "bfin-uart",
 502         .id = 1,
 503         .num_resources = ARRAY_SIZE(bfin_uart1_resources),
 504         .resource = bfin_uart1_resources,
 505         .dev = {
 506                 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
 507         },
 508 };
 509 #endif
 510 #endif
 511
 512 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 513 #ifdef CONFIG_BFIN_SIR0
 514 static struct resource bfin_sir0_resources[] = {
 515         {
 516                 .start = 0xFFC00400,
 517                 .end = 0xFFC004FF,
 518                 .flags = IORESOURCE_MEM,
 519         },
 520         {
 521                 .start = IRQ_UART0_RX,
 522                 .end = IRQ_UART0_RX+1,
 523                 .flags = IORESOURCE_IRQ,
 524         },
 525         {
 526                 .start = CH_UART0_RX,
 527                 .end = CH_UART0_RX+1,
 528                 .flags = IORESOURCE_DMA,
 529         },
 530 };
 531
 532 static struct platform_device bfin_sir0_device = {
 533         .name = "bfin_sir",
 534         .id = 0,
 535         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 536         .resource = bfin_sir0_resources,
 537 };
 538 #endif
 539 #ifdef CONFIG_BFIN_SIR1
 540 static struct resource bfin_sir1_resources[] = {
 541         {
 542                 .start = 0xFFC02000,
 543                 .end = 0xFFC020FF,
 544                 .flags = IORESOURCE_MEM,
 545         },
 546         {
 547                 .start = IRQ_UART1_RX,
 548                 .end = IRQ_UART1_RX+1,
 549                 .flags = IORESOURCE_IRQ,
 550         },
 551         {
 552                 .start = CH_UART1_RX,
 553                 .end = CH_UART1_RX+1,
 554                 .flags = IORESOURCE_DMA,
 555         },
 556 };
 557
 558 static struct platform_device bfin_sir1_device = {
 559         .name = "bfin_sir",
 560         .id = 1,
 561         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 562         .resource = bfin_sir1_resources,
 563 };
 564 #endif
 565 #endif
 566
 567 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 568 static struct resource bfin_twi0_resource[] = {
 569         [0] = {
 570                 .start = TWI0_REGBASE,
 571                 .end   = TWI0_REGBASE,
 572                 .flags = IORESOURCE_MEM,
 573         },
 574         [1] = {
 575                 .start = IRQ_TWI,
 576                 .end   = IRQ_TWI,
 577                 .flags = IORESOURCE_IRQ,
 578         },
 579 };
 580
 581 static struct platform_device i2c_bfin_twi_device = {
 582         .name = "i2c-bfin-twi",
 583         .id = 0,
 584         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 585         .resource = bfin_twi0_resource,
 586 };
 587 #endif
 588
 589 static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
 590 #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
 591         {
 592                 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
 593         },
 594 #endif
 595 #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
 596         {
 597                 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
 598                 .irq = IRQ_PF8,
 599         },
 600 #endif
 601 };
 602
 603 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 604 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 605 static struct resource bfin_sport0_uart_resources[] = {
 606         {
 607                 .start = SPORT0_TCR1,
 608                 .end = SPORT0_MRCS3+4,
 609                 .flags = IORESOURCE_MEM,
 610         },
 611         {
 612                 .start = IRQ_SPORT0_RX,
 613                 .end = IRQ_SPORT0_RX+1,
 614                 .flags = IORESOURCE_IRQ,
 615         },
 616         {
 617                 .start = IRQ_SPORT0_ERROR,
 618                 .end = IRQ_SPORT0_ERROR,
 619                 .flags = IORESOURCE_IRQ,
 620         },
 621 };
 622
 623 static unsigned short bfin_sport0_peripherals[] = {
 624         P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
 625         P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
 626 };
 627
 628 static struct platform_device bfin_sport0_uart_device = {
 629         .name = "bfin-sport-uart",
 630         .id = 0,
 631         .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
 632         .resource = bfin_sport0_uart_resources,
 633         .dev = {
 634                 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
 635         },
 636 };
 637 #endif
 638 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 639 static struct resource bfin_sport1_uart_resources[] = {
 640         {
 641                 .start = SPORT1_TCR1,
 642                 .end = SPORT1_MRCS3+4,
 643                 .flags = IORESOURCE_MEM,
 644         },
 645         {
 646                 .start = IRQ_SPORT1_RX,
 647                 .end = IRQ_SPORT1_RX+1,
 648                 .flags = IORESOURCE_IRQ,
 649         },
 650         {
 651                 .start = IRQ_SPORT1_ERROR,
 652                 .end = IRQ_SPORT1_ERROR,
 653                 .flags = IORESOURCE_IRQ,
 654         },
 655 };
 656
 657 static unsigned short bfin_sport1_peripherals[] = {
 658         P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
 659         P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
 660 };
 661
 662 static struct platform_device bfin_sport1_uart_device = {
 663         .name = "bfin-sport-uart",
 664         .id = 1,
 665         .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
 666         .resource = bfin_sport1_uart_resources,
 667         .dev = {
 668                 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
 669         },
 670 };
 671 #endif
 672 #endif
 673
 674 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 675 #include <linux/input.h>
 676 #include <linux/gpio_keys.h>
 677
 678 static struct gpio_keys_button bfin_gpio_keys_table[] = {
 679         {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
 680         {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
 681 };
 682
 683 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
 684         .buttons        = bfin_gpio_keys_table,
 685         .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
 686 };
 687
 688 static struct platform_device bfin_device_gpiokeys = {
 689         .name      = "gpio-keys",
 690         .dev = {
 691                 .platform_data = &bfin_gpio_keys_data,
 692         },
 693 };
 694 #endif
 695
 696 static const unsigned int cclk_vlev_datasheet[] =
 697 {
 698         VRPAIR(VLEV_100, 400000000),
 699         VRPAIR(VLEV_105, 426000000),
 700         VRPAIR(VLEV_110, 500000000),
 701         VRPAIR(VLEV_115, 533000000),
 702         VRPAIR(VLEV_120, 600000000),
 703 };
 704
 705 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
 706         .tuple_tab = cclk_vlev_datasheet,
 707         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
 708         .vr_settling_time = 25 /* us */,
 709 };
 710
 711 static struct platform_device bfin_dpmc = {
 712         .name = "bfin dpmc",
 713         .dev = {
 714                 .platform_data = &bfin_dmpc_vreg_data,
 715         },
 716 };
 717
 718 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 719 #include <asm/bfin-lq035q1.h>
 720
 721 static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
 722         .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
 723         .ppi_mode = USE_RGB565_16_BIT_PPI,
 724         .use_bl = 1,
 725         .gpio_bl = GPIO_PG12,
 726 };
 727
 728 static struct resource bfin_lq035q1_resources[] = {
 729         {
 730                 .start = IRQ_PPI_ERROR,
 731                 .end = IRQ_PPI_ERROR,
 732                 .flags = IORESOURCE_IRQ,
 733         },
 734 };
 735
 736 static struct platform_device bfin_lq035q1_device = {
 737         .name           = "bfin-lq035q1",
 738         .id             = -1,
 739         .num_resources  = ARRAY_SIZE(bfin_lq035q1_resources),
 740         .resource       = bfin_lq035q1_resources,
 741         .dev            = {
 742                 .platform_data = &bfin_lq035q1_data,
 743         },
 744 };
 745 #endif
 746
 747 static struct platform_device *stamp_devices[] __initdata = {
 748
 749         &bfin_dpmc,
 750
 751 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
 752         &bf5xx_nand_device,
 753 #endif
 754
 755 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 756         &rtc_device,
 757 #endif
 758
 759 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
 760         &musb_device,
 761 #endif
 762
 763 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 764         &bfin_mii_bus,
 765         &bfin_mac_device,
 766 #endif
 767
 768 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 769         &bfin_spi0_device,
 770 #endif
 771
 772 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 773 #ifdef CONFIG_SERIAL_BFIN_UART0
 774         &bfin_uart0_device,
 775 #endif
 776 #ifdef CONFIG_SERIAL_BFIN_UART1
 777         &bfin_uart1_device,
 778 #endif
 779 #endif
 780
 781 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
 782         &bfin_lq035q1_device,
 783 #endif
 784
 785 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 786 #ifdef CONFIG_BFIN_SIR0
 787         &bfin_sir0_device,
 788 #endif
 789 #ifdef CONFIG_BFIN_SIR1
 790         &bfin_sir1_device,
 791 #endif
 792 #endif
 793
 794 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 795         &i2c_bfin_twi_device,
 796 #endif
 797
 798 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 799 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 800         &bfin_sport0_uart_device,
 801 #endif
 802 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 803         &bfin_sport1_uart_device,
 804 #endif
 805 #endif
 806
 807 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
 808         &bfin_device_gpiokeys,
 809 #endif
 810
 811 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 812         &ezbrd_flash_device,
 813 #endif
 814 };
 815
 816 static int __init ezbrd_init(void)
 817 {
 818         printk(KERN_INFO "%s(): registering device resources\n", __func__);
 819         i2c_register_board_info(0, bfin_i2c_board_info,
 820                                 ARRAY_SIZE(bfin_i2c_board_info));
 821         platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
 822         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 823         return 0;
 824 }
 825
 826 arch_initcall(ezbrd_init);
 827
 828 static struct platform_device *ezbrd_early_devices[] __initdata = {
 829 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
 830 #ifdef CONFIG_SERIAL_BFIN_UART0
 831         &bfin_uart0_device,
 832 #endif
 833 #ifdef CONFIG_SERIAL_BFIN_UART1
 834         &bfin_uart1_device,
 835 #endif
 836 #endif
 837
 838 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
 839 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 840         &bfin_sport0_uart_device,
 841 #endif
 842 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 843         &bfin_sport1_uart_device,
 844 #endif
 845 #endif
 846 };
 847
 848 void __init native_machine_early_platform_add_devices(void)
 849 {
 850         printk(KERN_INFO "register early platform devices\n");
 851         early_platform_add_devices(ezbrd_early_devices,
 852                 ARRAY_SIZE(ezbrd_early_devices));
 853 }
 854
 855 void native_machine_restart(char *cmd)
 856 {
 857         /* workaround reboot hang when booting from SPI */
 858         if ((bfin_read_SYSCR() & 0x7) == 0x3)
 859                 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
 860 }
 861
 862 void bfin_get_ether_addr(char *addr)
 863 {
 864         /* the MAC is stored in OTP memory page 0xDF */
 865         u32 ret;
 866         u64 otp_mac;
 867         u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
 868
 869         ret = otp_read(0xDF, 0x00, &otp_mac);
 870         if (!(ret & 0x1)) {
 871                 char *otp_mac_p = (char *)&otp_mac;
 872                 for (ret = 0; ret < 6; ++ret)
 873                         addr[ret] = otp_mac_p[5 - ret];
 874         }
 875 }
 876 EXPORT_SYMBOL(bfin_get_ether_addr);