d4bfcea5682864e54dc98354a90333a4e21baaf4
[deliverable/linux.git] / arch / blackfin / mach-bf533 / boards / H8606.c
1 /*
2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2007-2008 HV Sistemas S.L.
4 * Javier Herrero <jherrero@hvsistemas.es>
5 * 2005 National ICT Australia (NICTA)
6 * Aidan Williams <aidan@nicta.com.au>
7 *
8 * Licensed under the GPL-2 or later.
9 */
10
11 #include <linux/device.h>
12 #include <linux/platform_device.h>
13 #include <linux/mtd/mtd.h>
14 #include <linux/mtd/partitions.h>
15 #include <linux/spi/spi.h>
16 #include <linux/spi/flash.h>
17 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
18 #include <linux/usb/isp1362.h>
19 #endif
20 #include <linux/irq.h>
21
22 #include <asm/dma.h>
23 #include <asm/bfin5xx_spi.h>
24 #include <asm/reboot.h>
25 #include <asm/portmux.h>
26
27 /*
28 * Name the Board for the /proc/cpuinfo
29 */
30 const char bfin_board_name[] = "HV Sistemas H8606";
31
32 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
33 static struct platform_device rtc_device = {
34 .name = "rtc-bfin",
35 .id = -1,
36 };
37 #endif
38
39 /*
40 * Driver needs to know address, irq and flag pin.
41 */
42 #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
43 static struct resource dm9000_resources[] = {
44 [0] = {
45 .start = 0x20300000,
46 .end = 0x20300002,
47 .flags = IORESOURCE_MEM,
48 },
49 [1] = {
50 .start = 0x20300004,
51 .end = 0x20300006,
52 .flags = IORESOURCE_MEM,
53 },
54 [2] = {
55 .start = IRQ_PF10,
56 .end = IRQ_PF10,
57 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE | IRQF_SHARED | IRQF_TRIGGER_HIGH),
58 },
59 };
60
61 static struct platform_device dm9000_device = {
62 .id = 0,
63 .name = "dm9000",
64 .resource = dm9000_resources,
65 .num_resources = ARRAY_SIZE(dm9000_resources),
66 };
67 #endif
68
69 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
70 #include <linux/smc91x.h>
71
72 static struct smc91x_platdata smc91x_info = {
73 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
74 .leda = RPC_LED_100_10,
75 .ledb = RPC_LED_TX_RX,
76 };
77
78 static struct resource smc91x_resources[] = {
79 {
80 .name = "smc91x-regs",
81 .start = 0x20300300,
82 .end = 0x20300300 + 16,
83 .flags = IORESOURCE_MEM,
84 }, {
85 .start = IRQ_PROG_INTB,
86 .end = IRQ_PROG_INTB,
87 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
88 }, {
89 .start = IRQ_PF7,
90 .end = IRQ_PF7,
91 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
92 },
93 };
94
95 static struct platform_device smc91x_device = {
96 .name = "smc91x",
97 .id = 0,
98 .num_resources = ARRAY_SIZE(smc91x_resources),
99 .resource = smc91x_resources,
100 .dev = {
101 .platform_data = &smc91x_info,
102 },
103 };
104 #endif
105
106 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
107 static struct resource net2272_bfin_resources[] = {
108 {
109 .start = 0x20300000,
110 .end = 0x20300000 + 0x100,
111 .flags = IORESOURCE_MEM,
112 }, {
113 .start = IRQ_PF10,
114 .end = IRQ_PF10,
115 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
116 },
117 };
118
119 static struct platform_device net2272_bfin_device = {
120 .name = "net2272",
121 .id = -1,
122 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
123 .resource = net2272_bfin_resources,
124 };
125 #endif
126
127 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
128 /* all SPI peripherals info goes here */
129
130 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
131 static struct mtd_partition bfin_spi_flash_partitions[] = {
132 {
133 .name = "bootloader (spi)",
134 .size = 0x40000,
135 .offset = 0,
136 .mask_flags = MTD_CAP_ROM
137 }, {
138 .name = "fpga (spi)",
139 .size = 0x30000,
140 .offset = 0x40000
141 }, {
142 .name = "linux kernel (spi)",
143 .size = 0x150000,
144 .offset = 0x70000
145 }, {
146 .name = "jffs2 root file system (spi)",
147 .size = 0x640000,
148 .offset = 0x1c0000,
149 }
150 };
151
152 static struct flash_platform_data bfin_spi_flash_data = {
153 .name = "m25p80",
154 .parts = bfin_spi_flash_partitions,
155 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
156 .type = "m25p64",
157 };
158
159 /* SPI flash chip (m25p64) */
160 static struct bfin5xx_spi_chip spi_flash_chip_info = {
161 .enable_dma = 0, /* use dma transfer with this chip*/
162 .bits_per_word = 8,
163 };
164 #endif
165
166 #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
167 /* SPI ADC chip */
168 static struct bfin5xx_spi_chip spi_adc_chip_info = {
169 .enable_dma = 1, /* use dma transfer with this chip*/
170 .bits_per_word = 16,
171 };
172 #endif
173
174 #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
175 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
176 .enable_dma = 0,
177 .bits_per_word = 16,
178 };
179 #endif
180
181 /* Notice: for blackfin, the speed_hz is the value of register
182 * SPI_BAUD, not the real baudrate */
183 static struct spi_board_info bfin_spi_board_info[] __initdata = {
184 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
185 {
186 /* the modalias must be the same as spi device driver name */
187 .modalias = "m25p80", /* Name of spi_driver for this device */
188 /* this value is the baudrate divisor */
189 .max_speed_hz = 50000000, /* actual baudrate is SCLK/(2xspeed_hz) */
190 .bus_num = 0, /* Framework bus number */
191 .chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
192 .platform_data = &bfin_spi_flash_data,
193 .controller_data = &spi_flash_chip_info,
194 .mode = SPI_MODE_3,
195 },
196 #endif
197
198 #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
199 {
200 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
201 .max_speed_hz = 4, /* actual baudrate is SCLK/(2xspeed_hz) */
202 .bus_num = 1, /* Framework bus number */
203 .chip_select = 1, /* Framework chip select. */
204 .platform_data = NULL, /* No spi_driver specific config */
205 .controller_data = &spi_adc_chip_info,
206 },
207 #endif
208
209 #if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
210 {
211 .modalias = "ad183x",
212 .max_speed_hz = 16,
213 .bus_num = 1,
214 .chip_select = 4,
215 .controller_data = &ad1836_spi_chip_info,
216 },
217 #endif
218
219 };
220
221 /* SPI (0) */
222 static struct resource bfin_spi0_resource[] = {
223 [0] = {
224 .start = SPI0_REGBASE,
225 .end = SPI0_REGBASE + 0xFF,
226 .flags = IORESOURCE_MEM,
227 },
228 [1] = {
229 .start = CH_SPI,
230 .end = CH_SPI,
231 .flags = IORESOURCE_DMA,
232 },
233 [2] = {
234 .start = IRQ_SPI,
235 .end = IRQ_SPI,
236 .flags = IORESOURCE_IRQ,
237 }
238 };
239
240
241 /* SPI controller data */
242 static struct bfin5xx_spi_master bfin_spi0_info = {
243 .num_chipselect = 8,
244 .enable_dma = 1, /* master has the ability to do dma transfer */
245 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
246 };
247
248 static struct platform_device bfin_spi0_device = {
249 .name = "bfin-spi",
250 .id = 0, /* Bus number */
251 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
252 .resource = bfin_spi0_resource,
253 .dev = {
254 .platform_data = &bfin_spi0_info, /* Passed to driver */
255 },
256 };
257 #endif /* spi master and devices */
258
259 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
260 #ifdef CONFIG_SERIAL_BFIN_UART0
261 static struct resource bfin_uart0_resources[] = {
262 {
263 .start = BFIN_UART_THR,
264 .end = BFIN_UART_GCTL+2,
265 .flags = IORESOURCE_MEM,
266 },
267 {
268 .start = IRQ_UART0_RX,
269 .end = IRQ_UART0_RX + 1,
270 .flags = IORESOURCE_IRQ,
271 },
272 {
273 .start = IRQ_UART0_ERROR,
274 .end = IRQ_UART0_ERROR,
275 .flags = IORESOURCE_IRQ,
276 },
277 {
278 .start = CH_UART0_TX,
279 .end = CH_UART0_TX,
280 .flags = IORESOURCE_DMA,
281 },
282 {
283 .start = CH_UART0_RX,
284 .end = CH_UART0_RX,
285 .flags = IORESOURCE_DMA,
286 },
287 };
288
289 static unsigned short bfin_uart0_peripherals[] = {
290 P_UART0_TX, P_UART0_RX, 0
291 };
292
293 static struct platform_device bfin_uart0_device = {
294 .name = "bfin-uart",
295 .id = 0,
296 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
297 .resource = bfin_uart0_resources,
298 .dev = {
299 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
300 },
301 };
302 #endif
303 #endif
304
305 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
306 #ifdef CONFIG_BFIN_SIR0
307 static struct resource bfin_sir0_resources[] = {
308 {
309 .start = 0xFFC00400,
310 .end = 0xFFC004FF,
311 .flags = IORESOURCE_MEM,
312 },
313 {
314 .start = IRQ_UART0_RX,
315 .end = IRQ_UART0_RX+1,
316 .flags = IORESOURCE_IRQ,
317 },
318 {
319 .start = CH_UART0_RX,
320 .end = CH_UART0_RX+1,
321 .flags = IORESOURCE_DMA,
322 },
323 };
324
325 static struct platform_device bfin_sir0_device = {
326 .name = "bfin_sir",
327 .id = 0,
328 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
329 .resource = bfin_sir0_resources,
330 };
331 #endif
332 #endif
333
334 #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
335
336 #include <linux/serial_8250.h>
337 #include <linux/serial.h>
338
339 /*
340 * Configuration for two 16550 UARTS in FPGA at addresses 0x20200000 and 0x202000010.
341 * running at half system clock, both with interrupt output or-ed to PF8. Change to
342 * suit different FPGA configuration, or to suit real 16550 UARTS connected to the bus
343 */
344
345 static struct plat_serial8250_port serial8250_platform_data [] = {
346 {
347 .membase = (void *)0x20200000,
348 .mapbase = 0x20200000,
349 .irq = IRQ_PF8,
350 .irqflags = IRQF_TRIGGER_HIGH,
351 .flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE,
352 .iotype = UPIO_MEM,
353 .regshift = 1,
354 .uartclk = 66666667,
355 }, {
356 .membase = (void *)0x20200010,
357 .mapbase = 0x20200010,
358 .irq = IRQ_PF8,
359 .irqflags = IRQF_TRIGGER_HIGH,
360 .flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE,
361 .iotype = UPIO_MEM,
362 .regshift = 1,
363 .uartclk = 66666667,
364 }, {
365 }
366 };
367
368 static struct platform_device serial8250_device = {
369 .id = PLAT8250_DEV_PLATFORM,
370 .name = "serial8250",
371 .dev = {
372 .platform_data = serial8250_platform_data,
373 },
374 };
375
376 #endif
377
378 #if defined(CONFIG_KEYBOARD_OPENCORES) || defined(CONFIG_KEYBOARD_OPENCORES_MODULE)
379
380 /*
381 * Configuration for one OpenCores keyboard controller in FPGA at address 0x20200030,
382 * interrupt output wired to PF9. Change to suit different FPGA configuration
383 */
384
385 static struct resource opencores_kbd_resources[] = {
386 [0] = {
387 .start = 0x20200030,
388 .end = 0x20300030 + 2,
389 .flags = IORESOURCE_MEM,
390 },
391 [1] = {
392 .start = IRQ_PF9,
393 .end = IRQ_PF9,
394 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
395 },
396 };
397
398 static struct platform_device opencores_kbd_device = {
399 .id = -1,
400 .name = "opencores-kbd",
401 .resource = opencores_kbd_resources,
402 .num_resources = ARRAY_SIZE(opencores_kbd_resources),
403 };
404 #endif
405
406 static struct platform_device *h8606_devices[] __initdata = {
407 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
408 &rtc_device,
409 #endif
410
411 #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
412 &dm9000_device,
413 #endif
414
415 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
416 &smc91x_device,
417 #endif
418
419 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
420 &net2272_bfin_device,
421 #endif
422
423 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
424 &bfin_spi0_device,
425 #endif
426
427 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
428 #ifdef CONFIG_SERIAL_BFIN_UART0
429 &bfin_uart0_device,
430 #endif
431 #endif
432
433 #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
434 &serial8250_device,
435 #endif
436
437 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
438 #ifdef CONFIG_BFIN_SIR0
439 &bfin_sir0_device,
440 #endif
441 #endif
442
443 #if defined(CONFIG_KEYBOARD_OPENCORES) || defined(CONFIG_KEYBOARD_OPENCORES_MODULE)
444 &opencores_kbd_device,
445 #endif
446 };
447
448 static int __init H8606_init(void)
449 {
450 printk(KERN_INFO "HV Sistemas H8606 board support by http://www.hvsistemas.com\n");
451 printk(KERN_INFO "%s(): registering device resources\n", __func__);
452 platform_add_devices(h8606_devices, ARRAY_SIZE(h8606_devices));
453 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
454 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
455 #endif
456 return 0;
457 }
458
459 arch_initcall(H8606_init);
460
461 static struct platform_device *H8606_early_devices[] __initdata = {
462 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
463 #ifdef CONFIG_SERIAL_BFIN_UART0
464 &bfin_uart0_device,
465 #endif
466 #endif
467 };
468
469 void __init native_machine_early_platform_add_devices(void)
470 {
471 printk(KERN_INFO "register early platform devices\n");
472 early_platform_add_devices(H8606_early_devices,
473 ARRAY_SIZE(H8606_early_devices));
474 }
This page took 0.039068 seconds and 4 git commands to generate.