ext3: Flush disk caches on fsync when needed
[deliverable/linux.git] / arch / blackfin / mach-bf533 / boards / cm_bf533.c
1 /*
2 * File: arch/blackfin/mach-bf533/boards/cm_bf533.c
3 * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
4 * Author: Aidan Williams <aidan@nicta.com.au> Copyright 2005
5 *
6 * Created: 2005
7 * Description: Board description file
8 *
9 * Modified:
10 * Copyright 2004-2006 Analog Devices Inc.
11 *
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
28 */
29
30 #include <linux/device.h>
31 #include <linux/platform_device.h>
32 #include <linux/mtd/mtd.h>
33 #include <linux/mtd/partitions.h>
34 #include <linux/spi/spi.h>
35 #include <linux/spi/flash.h>
36 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
37 #include <linux/usb/isp1362.h>
38 #endif
39 #include <linux/irq.h>
40 #include <asm/dma.h>
41 #include <asm/bfin5xx_spi.h>
42 #include <asm/portmux.h>
43 #include <asm/dpmc.h>
44
45 /*
46 * Name the Board for the /proc/cpuinfo
47 */
48 const char bfin_board_name[] = "Bluetechnix CM BF533";
49
50 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
51 /* all SPI peripherals info goes here */
52 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
53 static struct mtd_partition bfin_spi_flash_partitions[] = {
54 {
55 .name = "bootloader(spi)",
56 .size = 0x00020000,
57 .offset = 0,
58 .mask_flags = MTD_CAP_ROM
59 }, {
60 .name = "linux kernel(spi)",
61 .size = 0xe0000,
62 .offset = 0x20000
63 }, {
64 .name = "file system(spi)",
65 .size = 0x700000,
66 .offset = 0x00100000,
67 }
68 };
69
70 static struct flash_platform_data bfin_spi_flash_data = {
71 .name = "m25p80",
72 .parts = bfin_spi_flash_partitions,
73 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
74 .type = "m25p64",
75 };
76
77 /* SPI flash chip (m25p64) */
78 static struct bfin5xx_spi_chip spi_flash_chip_info = {
79 .enable_dma = 0, /* use dma transfer with this chip*/
80 .bits_per_word = 8,
81 };
82 #endif
83
84 /* SPI ADC chip */
85 #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
86 static struct bfin5xx_spi_chip spi_adc_chip_info = {
87 .enable_dma = 1, /* use dma transfer with this chip*/
88 .bits_per_word = 16,
89 };
90 #endif
91
92 #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
93 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
94 .enable_dma = 0,
95 .bits_per_word = 16,
96 };
97 #endif
98
99 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
100 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
101 .enable_dma = 0,
102 .bits_per_word = 8,
103 };
104 #endif
105
106 static struct spi_board_info bfin_spi_board_info[] __initdata = {
107 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
108 {
109 /* the modalias must be the same as spi device driver name */
110 .modalias = "m25p80", /* Name of spi_driver for this device */
111 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
112 .bus_num = 0, /* Framework bus number */
113 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
114 .platform_data = &bfin_spi_flash_data,
115 .controller_data = &spi_flash_chip_info,
116 .mode = SPI_MODE_3,
117 },
118 #endif
119
120 #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
121 {
122 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
123 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
124 .bus_num = 0, /* Framework bus number */
125 .chip_select = 2, /* Framework chip select. */
126 .platform_data = NULL, /* No spi_driver specific config */
127 .controller_data = &spi_adc_chip_info,
128 },
129 #endif
130
131 #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
132 {
133 .modalias = "ad1836-spi",
134 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
135 .bus_num = 0,
136 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
137 .controller_data = &ad1836_spi_chip_info,
138 },
139 #endif
140
141 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
142 {
143 .modalias = "mmc_spi",
144 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
145 .bus_num = 0,
146 .chip_select = 5,
147 .controller_data = &mmc_spi_chip_info,
148 .mode = SPI_MODE_3,
149 },
150 #endif
151 };
152
153 /* SPI (0) */
154 static struct resource bfin_spi0_resource[] = {
155 [0] = {
156 .start = SPI0_REGBASE,
157 .end = SPI0_REGBASE + 0xFF,
158 .flags = IORESOURCE_MEM,
159 },
160 [1] = {
161 .start = CH_SPI,
162 .end = CH_SPI,
163 .flags = IORESOURCE_DMA,
164 },
165 [2] = {
166 .start = IRQ_SPI,
167 .end = IRQ_SPI,
168 .flags = IORESOURCE_IRQ,
169 }
170 };
171
172 /* SPI controller data */
173 static struct bfin5xx_spi_master bfin_spi0_info = {
174 .num_chipselect = 8,
175 .enable_dma = 1, /* master has the ability to do dma transfer */
176 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
177 };
178
179 static struct platform_device bfin_spi0_device = {
180 .name = "bfin-spi",
181 .id = 0, /* Bus number */
182 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
183 .resource = bfin_spi0_resource,
184 .dev = {
185 .platform_data = &bfin_spi0_info, /* Passed to driver */
186 },
187 };
188 #endif /* spi master and devices */
189
190 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
191 static struct platform_device rtc_device = {
192 .name = "rtc-bfin",
193 .id = -1,
194 };
195 #endif
196
197 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
198 static struct resource smc91x_resources[] = {
199 {
200 .start = 0x20200300,
201 .end = 0x20200300 + 16,
202 .flags = IORESOURCE_MEM,
203 }, {
204 .start = IRQ_PF0,
205 .end = IRQ_PF0,
206 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
207 },
208 };
209 static struct platform_device smc91x_device = {
210 .name = "smc91x",
211 .id = 0,
212 .num_resources = ARRAY_SIZE(smc91x_resources),
213 .resource = smc91x_resources,
214 };
215 #endif
216
217 static struct resource bfin_gpios_resources = {
218 .start = 0,
219 .end = MAX_BLACKFIN_GPIOS - 1,
220 .flags = IORESOURCE_IRQ,
221 };
222
223 static struct platform_device bfin_gpios_device = {
224 .name = "simple-gpio",
225 .id = -1,
226 .num_resources = 1,
227 .resource = &bfin_gpios_resources,
228 };
229
230 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
231 static struct resource bfin_uart_resources[] = {
232 {
233 .start = 0xFFC00400,
234 .end = 0xFFC004FF,
235 .flags = IORESOURCE_MEM,
236 },
237 };
238
239 static struct platform_device bfin_uart_device = {
240 .name = "bfin-uart",
241 .id = 1,
242 .num_resources = ARRAY_SIZE(bfin_uart_resources),
243 .resource = bfin_uart_resources,
244 };
245 #endif
246
247 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
248 #ifdef CONFIG_BFIN_SIR0
249 static struct resource bfin_sir0_resources[] = {
250 {
251 .start = 0xFFC00400,
252 .end = 0xFFC004FF,
253 .flags = IORESOURCE_MEM,
254 },
255 {
256 .start = IRQ_UART0_RX,
257 .end = IRQ_UART0_RX+1,
258 .flags = IORESOURCE_IRQ,
259 },
260 {
261 .start = CH_UART0_RX,
262 .end = CH_UART0_RX+1,
263 .flags = IORESOURCE_DMA,
264 },
265 };
266
267 static struct platform_device bfin_sir0_device = {
268 .name = "bfin_sir",
269 .id = 0,
270 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
271 .resource = bfin_sir0_resources,
272 };
273 #endif
274 #endif
275
276 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
277 static struct platform_device bfin_sport0_uart_device = {
278 .name = "bfin-sport-uart",
279 .id = 0,
280 };
281
282 static struct platform_device bfin_sport1_uart_device = {
283 .name = "bfin-sport-uart",
284 .id = 1,
285 };
286 #endif
287
288 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
289 static struct resource isp1362_hcd_resources[] = {
290 {
291 .start = 0x20308000,
292 .end = 0x20308000,
293 .flags = IORESOURCE_MEM,
294 }, {
295 .start = 0x20308004,
296 .end = 0x20308004,
297 .flags = IORESOURCE_MEM,
298 }, {
299 .start = IRQ_PF4,
300 .end = IRQ_PF4,
301 .flags = IORESOURCE_IRQ,
302 },
303 };
304
305 static struct isp1362_platform_data isp1362_priv = {
306 .sel15Kres = 1,
307 .clknotstop = 0,
308 .oc_enable = 0,
309 .int_act_high = 0,
310 .int_edge_triggered = 0,
311 .remote_wakeup_connected = 0,
312 .no_power_switching = 1,
313 .power_switching_mode = 0,
314 };
315
316 static struct platform_device isp1362_hcd_device = {
317 .name = "isp1362-hcd",
318 .id = 0,
319 .dev = {
320 .platform_data = &isp1362_priv,
321 },
322 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
323 .resource = isp1362_hcd_resources,
324 };
325 #endif
326
327 static const unsigned int cclk_vlev_datasheet[] =
328 {
329 VRPAIR(VLEV_085, 250000000),
330 VRPAIR(VLEV_090, 376000000),
331 VRPAIR(VLEV_095, 426000000),
332 VRPAIR(VLEV_100, 426000000),
333 VRPAIR(VLEV_105, 476000000),
334 VRPAIR(VLEV_110, 476000000),
335 VRPAIR(VLEV_115, 476000000),
336 VRPAIR(VLEV_120, 600000000),
337 VRPAIR(VLEV_125, 600000000),
338 VRPAIR(VLEV_130, 600000000),
339 };
340
341 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
342 .tuple_tab = cclk_vlev_datasheet,
343 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
344 .vr_settling_time = 25 /* us */,
345 };
346
347 static struct platform_device bfin_dpmc = {
348 .name = "bfin dpmc",
349 .dev = {
350 .platform_data = &bfin_dmpc_vreg_data,
351 },
352 };
353
354 static struct platform_device *cm_bf533_devices[] __initdata = {
355
356 &bfin_dpmc,
357
358 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
359 &bfin_uart_device,
360 #endif
361
362 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
363 #ifdef CONFIG_BFIN_SIR0
364 &bfin_sir0_device,
365 #endif
366 #endif
367
368 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
369 &bfin_sport0_uart_device,
370 &bfin_sport1_uart_device,
371 #endif
372
373 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
374 &rtc_device,
375 #endif
376
377 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
378 &isp1362_hcd_device,
379 #endif
380
381 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
382 &smc91x_device,
383 #endif
384
385 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
386 &bfin_spi0_device,
387 #endif
388
389 &bfin_gpios_device,
390 };
391
392 static int __init cm_bf533_init(void)
393 {
394 printk(KERN_INFO "%s(): registering device resources\n", __func__);
395 platform_add_devices(cm_bf533_devices, ARRAY_SIZE(cm_bf533_devices));
396 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
397 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
398 #endif
399 return 0;
400 }
401
402 arch_initcall(cm_bf533_init);
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