ext3: Flush disk caches on fsync when needed
[deliverable/linux.git] / arch / blackfin / mach-bf533 / boards / ezkit.c
1 /*
2 * File: arch/blackfin/mach-bf533/ezkit.c
3 * Based on: Original Work
4 * Author: Aidan Williams <aidan@nicta.com.au>
5 *
6 * Created: 2005
7 * Description:
8 *
9 * Modified: Robin Getz <rgetz@blackfin.uclinux.org> - Named the boards
10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2006 Analog Devices Inc.
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 */
30
31 #include <linux/device.h>
32 #include <linux/platform_device.h>
33 #include <linux/mtd/mtd.h>
34 #include <linux/mtd/partitions.h>
35 #include <linux/mtd/plat-ram.h>
36 #include <linux/spi/spi.h>
37 #include <linux/spi/flash.h>
38 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
39 #include <linux/usb/isp1362.h>
40 #endif
41 #include <linux/irq.h>
42 #include <asm/dma.h>
43 #include <asm/bfin5xx_spi.h>
44 #include <asm/portmux.h>
45 #include <asm/dpmc.h>
46
47 /*
48 * Name the Board for the /proc/cpuinfo
49 */
50 const char bfin_board_name[] = "ADI BF533-EZKIT";
51
52 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
53 static struct platform_device rtc_device = {
54 .name = "rtc-bfin",
55 .id = -1,
56 };
57 #endif
58
59 #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
60 static struct platform_device bfin_fb_adv7393_device = {
61 .name = "bfin-adv7393",
62 };
63 #endif
64
65 /*
66 * USB-LAN EzExtender board
67 * Driver needs to know address, irq and flag pin.
68 */
69 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
70 static struct resource smc91x_resources[] = {
71 {
72 .name = "smc91x-regs",
73 .start = 0x20310300,
74 .end = 0x20310300 + 16,
75 .flags = IORESOURCE_MEM,
76 }, {
77 .start = IRQ_PF9,
78 .end = IRQ_PF9,
79 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
80 },
81 };
82 static struct platform_device smc91x_device = {
83 .name = "smc91x",
84 .id = 0,
85 .num_resources = ARRAY_SIZE(smc91x_resources),
86 .resource = smc91x_resources,
87 };
88 #endif
89
90 #if defined(CONFIG_MTD_PSD4256G) || defined(CONFIG_MTD_PSD4256G_MODULE)
91 static const char *map_probes[] = {
92 "stm_flash",
93 NULL,
94 };
95
96 static struct platdata_mtd_ram stm_pri_data_a = {
97 .mapname = "Flash A Primary",
98 .map_probes = map_probes,
99 .bankwidth = 2,
100 };
101
102 static struct resource stm_pri_resource_a = {
103 .start = 0x20000000,
104 .end = 0x200fffff,
105 .flags = IORESOURCE_MEM,
106 };
107
108 static struct platform_device stm_pri_device_a = {
109 .name = "mtd-ram",
110 .id = 0,
111 .dev = {
112 .platform_data = &stm_pri_data_a,
113 },
114 .num_resources = 1,
115 .resource = &stm_pri_resource_a,
116 };
117
118 static struct platdata_mtd_ram stm_pri_data_b = {
119 .mapname = "Flash B Primary",
120 .map_probes = map_probes,
121 .bankwidth = 2,
122 };
123
124 static struct resource stm_pri_resource_b = {
125 .start = 0x20100000,
126 .end = 0x201fffff,
127 .flags = IORESOURCE_MEM,
128 };
129
130 static struct platform_device stm_pri_device_b = {
131 .name = "mtd-ram",
132 .id = 4,
133 .dev = {
134 .platform_data = &stm_pri_data_b,
135 },
136 .num_resources = 1,
137 .resource = &stm_pri_resource_b,
138 };
139 #endif
140
141 #if defined(CONFIG_MTD_PLATRAM) || defined(CONFIG_MTD_PLATRAM_MODULE)
142 static struct platdata_mtd_ram sram_data_a = {
143 .mapname = "Flash A SRAM",
144 .bankwidth = 2,
145 };
146
147 static struct resource sram_resource_a = {
148 .start = 0x20240000,
149 .end = 0x2024ffff,
150 .flags = IORESOURCE_MEM,
151 };
152
153 static struct platform_device sram_device_a = {
154 .name = "mtd-ram",
155 .id = 8,
156 .dev = {
157 .platform_data = &sram_data_a,
158 },
159 .num_resources = 1,
160 .resource = &sram_resource_a,
161 };
162
163 static struct platdata_mtd_ram sram_data_b = {
164 .mapname = "Flash B SRAM",
165 .bankwidth = 2,
166 };
167
168 static struct resource sram_resource_b = {
169 .start = 0x202c0000,
170 .end = 0x202cffff,
171 .flags = IORESOURCE_MEM,
172 };
173
174 static struct platform_device sram_device_b = {
175 .name = "mtd-ram",
176 .id = 9,
177 .dev = {
178 .platform_data = &sram_data_b,
179 },
180 .num_resources = 1,
181 .resource = &sram_resource_b,
182 };
183 #endif
184
185 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
186 static struct mtd_partition bfin_spi_flash_partitions[] = {
187 {
188 .name = "bootloader(spi)",
189 .size = 0x00020000,
190 .offset = 0,
191 .mask_flags = MTD_CAP_ROM
192 }, {
193 .name = "linux kernel(spi)",
194 .size = 0xe0000,
195 .offset = MTDPART_OFS_APPEND,
196 }, {
197 .name = "file system(spi)",
198 .size = MTDPART_SIZ_FULL,
199 .offset = MTDPART_OFS_APPEND,
200 }
201 };
202
203 static struct flash_platform_data bfin_spi_flash_data = {
204 .name = "m25p80",
205 .parts = bfin_spi_flash_partitions,
206 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
207 .type = "m25p64",
208 };
209
210 /* SPI flash chip (m25p64) */
211 static struct bfin5xx_spi_chip spi_flash_chip_info = {
212 .enable_dma = 0, /* use dma transfer with this chip*/
213 .bits_per_word = 8,
214 };
215 #endif
216
217 #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
218 /* SPI ADC chip */
219 static struct bfin5xx_spi_chip spi_adc_chip_info = {
220 .enable_dma = 1, /* use dma transfer with this chip*/
221 .bits_per_word = 16,
222 };
223 #endif
224
225 #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
226 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
227 .enable_dma = 0,
228 .bits_per_word = 16,
229 };
230 #endif
231
232 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
233 static struct bfin5xx_spi_chip spidev_chip_info = {
234 .enable_dma = 0,
235 .bits_per_word = 8,
236 };
237 #endif
238
239 static struct spi_board_info bfin_spi_board_info[] __initdata = {
240 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
241 {
242 /* the modalias must be the same as spi device driver name */
243 .modalias = "m25p80", /* Name of spi_driver for this device */
244 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
245 .bus_num = 0, /* Framework bus number */
246 .chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
247 .platform_data = &bfin_spi_flash_data,
248 .controller_data = &spi_flash_chip_info,
249 .mode = SPI_MODE_3,
250 },
251 #endif
252
253 #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
254 {
255 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
256 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
257 .bus_num = 0, /* Framework bus number */
258 .chip_select = 1, /* Framework chip select. */
259 .platform_data = NULL, /* No spi_driver specific config */
260 .controller_data = &spi_adc_chip_info,
261 },
262 #endif
263
264 #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
265 {
266 .modalias = "ad1836-spi",
267 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
268 .bus_num = 0,
269 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
270 .controller_data = &ad1836_spi_chip_info,
271 },
272 #endif
273 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
274 {
275 .modalias = "spidev",
276 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
277 .bus_num = 0,
278 .chip_select = 1,
279 .controller_data = &spidev_chip_info,
280 },
281 #endif
282 };
283
284 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
285 /* SPI (0) */
286 static struct resource bfin_spi0_resource[] = {
287 [0] = {
288 .start = SPI0_REGBASE,
289 .end = SPI0_REGBASE + 0xFF,
290 .flags = IORESOURCE_MEM,
291 },
292 [1] = {
293 .start = CH_SPI,
294 .end = CH_SPI,
295 .flags = IORESOURCE_DMA,
296 },
297 [2] = {
298 .start = IRQ_SPI,
299 .end = IRQ_SPI,
300 .flags = IORESOURCE_IRQ,
301 }
302 };
303
304 /* SPI controller data */
305 static struct bfin5xx_spi_master bfin_spi0_info = {
306 .num_chipselect = 8,
307 .enable_dma = 1, /* master has the ability to do dma transfer */
308 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
309 };
310
311 static struct platform_device bfin_spi0_device = {
312 .name = "bfin-spi",
313 .id = 0, /* Bus number */
314 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
315 .resource = bfin_spi0_resource,
316 .dev = {
317 .platform_data = &bfin_spi0_info, /* Passed to driver */
318 },
319 };
320 #endif /* spi master and devices */
321
322 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
323 static struct resource bfin_uart_resources[] = {
324 {
325 .start = 0xFFC00400,
326 .end = 0xFFC004FF,
327 .flags = IORESOURCE_MEM,
328 },
329 };
330
331 static struct platform_device bfin_uart_device = {
332 .name = "bfin-uart",
333 .id = 1,
334 .num_resources = ARRAY_SIZE(bfin_uart_resources),
335 .resource = bfin_uart_resources,
336 };
337 #endif
338
339 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
340 #ifdef CONFIG_BFIN_SIR0
341 static struct resource bfin_sir0_resources[] = {
342 {
343 .start = 0xFFC00400,
344 .end = 0xFFC004FF,
345 .flags = IORESOURCE_MEM,
346 },
347 {
348 .start = IRQ_UART0_RX,
349 .end = IRQ_UART0_RX+1,
350 .flags = IORESOURCE_IRQ,
351 },
352 {
353 .start = CH_UART0_RX,
354 .end = CH_UART0_RX+1,
355 .flags = IORESOURCE_DMA,
356 },
357 };
358
359 static struct platform_device bfin_sir0_device = {
360 .name = "bfin_sir",
361 .id = 0,
362 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
363 .resource = bfin_sir0_resources,
364 };
365 #endif
366 #endif
367
368 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
369 #include <linux/input.h>
370 #include <linux/gpio_keys.h>
371
372 static struct gpio_keys_button bfin_gpio_keys_table[] = {
373 {BTN_0, GPIO_PF7, 1, "gpio-keys: BTN0"},
374 {BTN_1, GPIO_PF8, 1, "gpio-keys: BTN1"},
375 {BTN_2, GPIO_PF9, 1, "gpio-keys: BTN2"},
376 {BTN_3, GPIO_PF10, 1, "gpio-keys: BTN3"},
377 };
378
379 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
380 .buttons = bfin_gpio_keys_table,
381 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
382 };
383
384 static struct platform_device bfin_device_gpiokeys = {
385 .name = "gpio-keys",
386 .dev = {
387 .platform_data = &bfin_gpio_keys_data,
388 },
389 };
390 #endif
391
392 static struct resource bfin_gpios_resources = {
393 .start = 0,
394 .end = MAX_BLACKFIN_GPIOS - 1,
395 .flags = IORESOURCE_IRQ,
396 };
397
398 static struct platform_device bfin_gpios_device = {
399 .name = "simple-gpio",
400 .id = -1,
401 .num_resources = 1,
402 .resource = &bfin_gpios_resources,
403 };
404
405 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
406 #include <linux/i2c-gpio.h>
407
408 static struct i2c_gpio_platform_data i2c_gpio_data = {
409 .sda_pin = 1,
410 .scl_pin = 0,
411 .sda_is_open_drain = 0,
412 .scl_is_open_drain = 0,
413 .udelay = 40,
414 };
415
416 static struct platform_device i2c_gpio_device = {
417 .name = "i2c-gpio",
418 .id = 0,
419 .dev = {
420 .platform_data = &i2c_gpio_data,
421 },
422 };
423 #endif
424
425 static const unsigned int cclk_vlev_datasheet[] =
426 {
427 VRPAIR(VLEV_085, 250000000),
428 VRPAIR(VLEV_090, 376000000),
429 VRPAIR(VLEV_095, 426000000),
430 VRPAIR(VLEV_100, 426000000),
431 VRPAIR(VLEV_105, 476000000),
432 VRPAIR(VLEV_110, 476000000),
433 VRPAIR(VLEV_115, 476000000),
434 VRPAIR(VLEV_120, 600000000),
435 VRPAIR(VLEV_125, 600000000),
436 VRPAIR(VLEV_130, 600000000),
437 };
438
439 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
440 .tuple_tab = cclk_vlev_datasheet,
441 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
442 .vr_settling_time = 25 /* us */,
443 };
444
445 static struct platform_device bfin_dpmc = {
446 .name = "bfin dpmc",
447 .dev = {
448 .platform_data = &bfin_dmpc_vreg_data,
449 },
450 };
451
452 static struct platform_device *ezkit_devices[] __initdata = {
453
454 &bfin_dpmc,
455
456 #if defined(CONFIG_MTD_PSD4256G) || defined(CONFIG_MTD_PSD4256G_MODULE)
457 &stm_pri_device_a,
458 &stm_pri_device_b,
459 #endif
460
461 #if defined(CONFIG_MTD_PLATRAM) || defined(CONFIG_MTD_PLATRAM_MODULE)
462 &sram_device_a,
463 &sram_device_b,
464 #endif
465
466 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
467 &smc91x_device,
468 #endif
469
470 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
471 &bfin_spi0_device,
472 #endif
473
474 #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
475 &bfin_fb_adv7393_device,
476 #endif
477
478 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
479 &rtc_device,
480 #endif
481
482 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
483 &bfin_uart_device,
484 #endif
485
486 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
487 #ifdef CONFIG_BFIN_SIR0
488 &bfin_sir0_device,
489 #endif
490 #endif
491
492 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
493 &bfin_device_gpiokeys,
494 #endif
495
496 #if defined(CONFIG_I2C_GPIO) || defined(CONFIG_I2C_GPIO_MODULE)
497 &i2c_gpio_device,
498 #endif
499
500 &bfin_gpios_device,
501 };
502
503 static int __init ezkit_init(void)
504 {
505 printk(KERN_INFO "%s(): registering device resources\n", __func__);
506 platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices));
507 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
508 return 0;
509 }
510
511 arch_initcall(ezkit_init);
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