Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
[deliverable/linux.git] / arch / blackfin / mach-bf537 / boards / cm_bf537.c
1 /*
2 * File: arch/blackfin/mach-bf537/boards/cm_bf537.c
3 * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
4 * Author: Aidan Williams <aidan@nicta.com.au>
5 *
6 * Created: 2005
7 * Description: Board description file
8 *
9 * Modified:
10 * Copyright 2005 National ICT Australia (NICTA)
11 * Copyright 2004-2006 Analog Devices Inc.
12 *
13 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, see the file COPYING, or write
27 * to the Free Software Foundation, Inc.,
28 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
29 */
30
31 #include <linux/device.h>
32 #include <linux/etherdevice.h>
33 #include <linux/platform_device.h>
34 #include <linux/mtd/mtd.h>
35 #include <linux/mtd/partitions.h>
36 #include <linux/mtd/physmap.h>
37 #include <linux/spi/spi.h>
38 #include <linux/spi/flash.h>
39 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
40 #include <linux/usb/isp1362.h>
41 #endif
42 #include <linux/ata_platform.h>
43 #include <linux/irq.h>
44 #include <asm/dma.h>
45 #include <asm/bfin5xx_spi.h>
46 #include <asm/portmux.h>
47 #include <asm/dpmc.h>
48
49 /*
50 * Name the Board for the /proc/cpuinfo
51 */
52 const char bfin_board_name[] = "Bluetechnix CM BF537";
53
54 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
55 /* all SPI peripherals info goes here */
56
57 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
58 static struct mtd_partition bfin_spi_flash_partitions[] = {
59 {
60 .name = "bootloader(spi)",
61 .size = 0x00020000,
62 .offset = 0,
63 .mask_flags = MTD_CAP_ROM
64 }, {
65 .name = "linux kernel(spi)",
66 .size = 0xe0000,
67 .offset = 0x20000
68 }, {
69 .name = "file system(spi)",
70 .size = 0x700000,
71 .offset = 0x00100000,
72 }
73 };
74
75 static struct flash_platform_data bfin_spi_flash_data = {
76 .name = "m25p80",
77 .parts = bfin_spi_flash_partitions,
78 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
79 .type = "m25p64",
80 };
81
82 /* SPI flash chip (m25p64) */
83 static struct bfin5xx_spi_chip spi_flash_chip_info = {
84 .enable_dma = 0, /* use dma transfer with this chip*/
85 .bits_per_word = 8,
86 };
87 #endif
88
89 #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
90 /* SPI ADC chip */
91 static struct bfin5xx_spi_chip spi_adc_chip_info = {
92 .enable_dma = 1, /* use dma transfer with this chip*/
93 .bits_per_word = 16,
94 };
95 #endif
96
97 #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
98 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
99 .enable_dma = 0,
100 .bits_per_word = 16,
101 };
102 #endif
103
104 #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
105 static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
106 .enable_dma = 0,
107 .bits_per_word = 16,
108 };
109 #endif
110
111 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
112 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
113 .enable_dma = 0,
114 .bits_per_word = 8,
115 };
116 #endif
117
118 static struct spi_board_info bfin_spi_board_info[] __initdata = {
119 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
120 {
121 /* the modalias must be the same as spi device driver name */
122 .modalias = "m25p80", /* Name of spi_driver for this device */
123 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
124 .bus_num = 0, /* Framework bus number */
125 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
126 .platform_data = &bfin_spi_flash_data,
127 .controller_data = &spi_flash_chip_info,
128 .mode = SPI_MODE_3,
129 },
130 #endif
131
132 #if defined(CONFIG_BFIN_SPI_ADC) || defined(CONFIG_BFIN_SPI_ADC_MODULE)
133 {
134 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
135 .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
136 .bus_num = 0, /* Framework bus number */
137 .chip_select = 1, /* Framework chip select. */
138 .platform_data = NULL, /* No spi_driver specific config */
139 .controller_data = &spi_adc_chip_info,
140 },
141 #endif
142
143 #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
144 {
145 .modalias = "ad1836-spi",
146 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
147 .bus_num = 0,
148 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
149 .controller_data = &ad1836_spi_chip_info,
150 },
151 #endif
152
153 #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
154 {
155 .modalias = "ad9960-spi",
156 .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
157 .bus_num = 0,
158 .chip_select = 1,
159 .controller_data = &ad9960_spi_chip_info,
160 },
161 #endif
162
163 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
164 {
165 .modalias = "mmc_spi",
166 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
167 .bus_num = 0,
168 .chip_select = 1,
169 .controller_data = &mmc_spi_chip_info,
170 .mode = SPI_MODE_3,
171 },
172 #endif
173 };
174
175 /* SPI (0) */
176 static struct resource bfin_spi0_resource[] = {
177 [0] = {
178 .start = SPI0_REGBASE,
179 .end = SPI0_REGBASE + 0xFF,
180 .flags = IORESOURCE_MEM,
181 },
182 [1] = {
183 .start = CH_SPI,
184 .end = CH_SPI,
185 .flags = IORESOURCE_DMA,
186 },
187 [2] = {
188 .start = IRQ_SPI,
189 .end = IRQ_SPI,
190 .flags = IORESOURCE_IRQ,
191 },
192 };
193
194 /* SPI controller data */
195 static struct bfin5xx_spi_master bfin_spi0_info = {
196 .num_chipselect = 8,
197 .enable_dma = 1, /* master has the ability to do dma transfer */
198 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
199 };
200
201 static struct platform_device bfin_spi0_device = {
202 .name = "bfin-spi",
203 .id = 0, /* Bus number */
204 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
205 .resource = bfin_spi0_resource,
206 .dev = {
207 .platform_data = &bfin_spi0_info, /* Passed to driver */
208 },
209 };
210 #endif /* spi master and devices */
211
212 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
213 static struct platform_device rtc_device = {
214 .name = "rtc-bfin",
215 .id = -1,
216 };
217 #endif
218
219 #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
220 static struct platform_device hitachi_fb_device = {
221 .name = "hitachi-tx09",
222 };
223 #endif
224
225 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
226 static struct resource smc91x_resources[] = {
227 {
228 .start = 0x20200300,
229 .end = 0x20200300 + 16,
230 .flags = IORESOURCE_MEM,
231 }, {
232 .start = IRQ_PF14,
233 .end = IRQ_PF14,
234 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
235 },
236 };
237
238 static struct platform_device smc91x_device = {
239 .name = "smc91x",
240 .id = 0,
241 .num_resources = ARRAY_SIZE(smc91x_resources),
242 .resource = smc91x_resources,
243 };
244 #endif
245
246 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
247 static struct resource isp1362_hcd_resources[] = {
248 {
249 .start = 0x20308000,
250 .end = 0x20308000,
251 .flags = IORESOURCE_MEM,
252 }, {
253 .start = 0x20308004,
254 .end = 0x20308004,
255 .flags = IORESOURCE_MEM,
256 }, {
257 .start = IRQ_PG15,
258 .end = IRQ_PG15,
259 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
260 },
261 };
262
263 static struct isp1362_platform_data isp1362_priv = {
264 .sel15Kres = 1,
265 .clknotstop = 0,
266 .oc_enable = 0,
267 .int_act_high = 0,
268 .int_edge_triggered = 0,
269 .remote_wakeup_connected = 0,
270 .no_power_switching = 1,
271 .power_switching_mode = 0,
272 };
273
274 static struct platform_device isp1362_hcd_device = {
275 .name = "isp1362-hcd",
276 .id = 0,
277 .dev = {
278 .platform_data = &isp1362_priv,
279 },
280 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
281 .resource = isp1362_hcd_resources,
282 };
283 #endif
284
285 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
286 static struct resource net2272_bfin_resources[] = {
287 {
288 .start = 0x20200000,
289 .end = 0x20200000 + 0x100,
290 .flags = IORESOURCE_MEM,
291 }, {
292 .start = IRQ_PH14,
293 .end = IRQ_PH14,
294 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
295 },
296 };
297
298 static struct platform_device net2272_bfin_device = {
299 .name = "net2272",
300 .id = -1,
301 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
302 .resource = net2272_bfin_resources,
303 };
304 #endif
305
306 static struct resource bfin_gpios_resources = {
307 .start = 0,
308 .end = MAX_BLACKFIN_GPIOS - 1,
309 .flags = IORESOURCE_IRQ,
310 };
311
312 static struct platform_device bfin_gpios_device = {
313 .name = "simple-gpio",
314 .id = -1,
315 .num_resources = 1,
316 .resource = &bfin_gpios_resources,
317 };
318
319 #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
320 static struct mtd_partition cm_partitions[] = {
321 {
322 .name = "bootloader(nor)",
323 .size = 0x40000,
324 .offset = 0,
325 }, {
326 .name = "linux kernel(nor)",
327 .size = 0xE0000,
328 .offset = MTDPART_OFS_APPEND,
329 }, {
330 .name = "file system(nor)",
331 .size = MTDPART_SIZ_FULL,
332 .offset = MTDPART_OFS_APPEND,
333 }
334 };
335
336 static struct physmap_flash_data cm_flash_data = {
337 .width = 2,
338 .parts = cm_partitions,
339 .nr_parts = ARRAY_SIZE(cm_partitions),
340 };
341
342 static unsigned cm_flash_gpios[] = { GPIO_PF4 };
343
344 static struct resource cm_flash_resource[] = {
345 {
346 .name = "cfi_probe",
347 .start = 0x20000000,
348 .end = 0x201fffff,
349 .flags = IORESOURCE_MEM,
350 }, {
351 .start = (unsigned long)cm_flash_gpios,
352 .end = ARRAY_SIZE(cm_flash_gpios),
353 .flags = IORESOURCE_IRQ,
354 }
355 };
356
357 static struct platform_device cm_flash_device = {
358 .name = "gpio-addr-flash",
359 .id = 0,
360 .dev = {
361 .platform_data = &cm_flash_data,
362 },
363 .num_resources = ARRAY_SIZE(cm_flash_resource),
364 .resource = cm_flash_resource,
365 };
366 #endif
367
368 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
369 static struct resource bfin_uart_resources[] = {
370 {
371 .start = 0xFFC00400,
372 .end = 0xFFC004FF,
373 .flags = IORESOURCE_MEM,
374 }, {
375 .start = 0xFFC02000,
376 .end = 0xFFC020FF,
377 .flags = IORESOURCE_MEM,
378 },
379 };
380
381 static struct platform_device bfin_uart_device = {
382 .name = "bfin-uart",
383 .id = 1,
384 .num_resources = ARRAY_SIZE(bfin_uart_resources),
385 .resource = bfin_uart_resources,
386 };
387 #endif
388
389 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
390 #ifdef CONFIG_BFIN_SIR0
391 static struct resource bfin_sir0_resources[] = {
392 {
393 .start = 0xFFC00400,
394 .end = 0xFFC004FF,
395 .flags = IORESOURCE_MEM,
396 },
397 {
398 .start = IRQ_UART0_RX,
399 .end = IRQ_UART0_RX+1,
400 .flags = IORESOURCE_IRQ,
401 },
402 {
403 .start = CH_UART0_RX,
404 .end = CH_UART0_RX+1,
405 .flags = IORESOURCE_DMA,
406 },
407 };
408 static struct platform_device bfin_sir0_device = {
409 .name = "bfin_sir",
410 .id = 0,
411 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
412 .resource = bfin_sir0_resources,
413 };
414 #endif
415 #ifdef CONFIG_BFIN_SIR1
416 static struct resource bfin_sir1_resources[] = {
417 {
418 .start = 0xFFC02000,
419 .end = 0xFFC020FF,
420 .flags = IORESOURCE_MEM,
421 },
422 {
423 .start = IRQ_UART1_RX,
424 .end = IRQ_UART1_RX+1,
425 .flags = IORESOURCE_IRQ,
426 },
427 {
428 .start = CH_UART1_RX,
429 .end = CH_UART1_RX+1,
430 .flags = IORESOURCE_DMA,
431 },
432 };
433 static struct platform_device bfin_sir1_device = {
434 .name = "bfin_sir",
435 .id = 1,
436 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
437 .resource = bfin_sir1_resources,
438 };
439 #endif
440 #endif
441
442 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
443 static struct resource bfin_twi0_resource[] = {
444 [0] = {
445 .start = TWI0_REGBASE,
446 .end = TWI0_REGBASE,
447 .flags = IORESOURCE_MEM,
448 },
449 [1] = {
450 .start = IRQ_TWI,
451 .end = IRQ_TWI,
452 .flags = IORESOURCE_IRQ,
453 },
454 };
455
456 static struct platform_device i2c_bfin_twi_device = {
457 .name = "i2c-bfin-twi",
458 .id = 0,
459 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
460 .resource = bfin_twi0_resource,
461 };
462 #endif
463
464 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
465 static struct platform_device bfin_sport0_uart_device = {
466 .name = "bfin-sport-uart",
467 .id = 0,
468 };
469
470 static struct platform_device bfin_sport1_uart_device = {
471 .name = "bfin-sport-uart",
472 .id = 1,
473 };
474 #endif
475
476 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
477 static struct platform_device bfin_mii_bus = {
478 .name = "bfin_mii_bus",
479 };
480
481 static struct platform_device bfin_mac_device = {
482 .name = "bfin_mac",
483 .dev.platform_data = &bfin_mii_bus,
484 };
485 #endif
486
487 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
488 #define PATA_INT IRQ_PF14
489
490 static struct pata_platform_info bfin_pata_platform_data = {
491 .ioport_shift = 2,
492 .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
493 };
494
495 static struct resource bfin_pata_resources[] = {
496 {
497 .start = 0x2030C000,
498 .end = 0x2030C01F,
499 .flags = IORESOURCE_MEM,
500 },
501 {
502 .start = 0x2030D018,
503 .end = 0x2030D01B,
504 .flags = IORESOURCE_MEM,
505 },
506 {
507 .start = PATA_INT,
508 .end = PATA_INT,
509 .flags = IORESOURCE_IRQ,
510 },
511 };
512
513 static struct platform_device bfin_pata_device = {
514 .name = "pata_platform",
515 .id = -1,
516 .num_resources = ARRAY_SIZE(bfin_pata_resources),
517 .resource = bfin_pata_resources,
518 .dev = {
519 .platform_data = &bfin_pata_platform_data,
520 }
521 };
522 #endif
523
524 static const unsigned int cclk_vlev_datasheet[] =
525 {
526 VRPAIR(VLEV_085, 250000000),
527 VRPAIR(VLEV_090, 376000000),
528 VRPAIR(VLEV_095, 426000000),
529 VRPAIR(VLEV_100, 426000000),
530 VRPAIR(VLEV_105, 476000000),
531 VRPAIR(VLEV_110, 476000000),
532 VRPAIR(VLEV_115, 476000000),
533 VRPAIR(VLEV_120, 500000000),
534 VRPAIR(VLEV_125, 533000000),
535 VRPAIR(VLEV_130, 600000000),
536 };
537
538 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
539 .tuple_tab = cclk_vlev_datasheet,
540 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
541 .vr_settling_time = 25 /* us */,
542 };
543
544 static struct platform_device bfin_dpmc = {
545 .name = "bfin dpmc",
546 .dev = {
547 .platform_data = &bfin_dmpc_vreg_data,
548 },
549 };
550
551 static struct platform_device *cm_bf537_devices[] __initdata = {
552
553 &bfin_dpmc,
554
555 #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
556 &hitachi_fb_device,
557 #endif
558
559 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
560 &rtc_device,
561 #endif
562
563 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
564 &bfin_uart_device,
565 #endif
566
567 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
568 #ifdef CONFIG_BFIN_SIR0
569 &bfin_sir0_device,
570 #endif
571 #ifdef CONFIG_BFIN_SIR1
572 &bfin_sir1_device,
573 #endif
574 #endif
575
576 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
577 &i2c_bfin_twi_device,
578 #endif
579
580 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
581 &bfin_sport0_uart_device,
582 &bfin_sport1_uart_device,
583 #endif
584
585 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
586 &isp1362_hcd_device,
587 #endif
588
589 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
590 &smc91x_device,
591 #endif
592
593 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
594 &bfin_mii_bus,
595 &bfin_mac_device,
596 #endif
597
598 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
599 &net2272_bfin_device,
600 #endif
601
602 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
603 &bfin_spi0_device,
604 #endif
605
606 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
607 &bfin_pata_device,
608 #endif
609
610 #if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
611 &cm_flash_device,
612 #endif
613
614 &bfin_gpios_device,
615 };
616
617 static int __init cm_bf537_init(void)
618 {
619 printk(KERN_INFO "%s(): registering device resources\n", __func__);
620 platform_add_devices(cm_bf537_devices, ARRAY_SIZE(cm_bf537_devices));
621 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
622 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
623 #endif
624
625 #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
626 irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
627 #endif
628 return 0;
629 }
630
631 arch_initcall(cm_bf537_init);
632
633 void bfin_get_ether_addr(char *addr)
634 {
635 random_ether_addr(addr);
636 printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
637 }
638 EXPORT_SYMBOL(bfin_get_ether_addr);
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