arch/blackfin/mach-bf537/boards/pnav10.c

   1 /*
   2  * File:         arch/blackfin/mach-bf537/boards/stamp.c
   3  * Based on:     arch/blackfin/mach-bf533/boards/ezkit.c
   4  * Author:       Aidan Williams <aidan@nicta.com.au>
   5  *
   6  * Created:
   7  * Description:
   8  *
   9  * Modified:
  10  *               Copyright 2005 National ICT Australia (NICTA)
  11  *               Copyright 2004-2006 Analog Devices Inc.
  12  *
  13  * Bugs:         Enter bugs at http://blackfin.uclinux.org/
  14  *
  15  * This program is free software; you can redistribute it and/or modify
  16  * it under the terms of the GNU General Public License as published by
  17  * the Free Software Foundation; either version 2 of the License, or
  18  * (at your option) any later version.
  19  *
  20  * This program is distributed in the hope that it will be useful,
  21  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23  * GNU General Public License for more details.
  24  *
  25  * You should have received a copy of the GNU General Public License
  26  * along with this program; if not, see the file COPYING, or write
  27  * to the Free Software Foundation, Inc.,
  28  * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  29  */
  30
  31 #include <linux/device.h>
  32 #include <linux/platform_device.h>
  33 #include <linux/mtd/mtd.h>
  34 #include <linux/mtd/partitions.h>
  35 #include <linux/spi/spi.h>
  36 #include <linux/spi/flash.h>
  37 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  38 #include <linux/usb_isp1362.h>
  39 #endif
  40 #include <linux/irq.h>
  41 #include <asm/bfin5xx_spi.h>
  42 #include <linux/usb_sl811.h>
  43
  44 #include <linux/spi/ad7877.h>
  45
  46 /*
  47  * Name the Board for the /proc/cpuinfo
  48  */
  49 char *bfin_board_name = "PNAV-1.0";
  50
  51 /*
  52  *  Driver needs to know address, irq and flag pin.
  53  */
  54
  55 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  56 static struct resource bfin_pcmcia_cf_resources[] = {
  57         {
  58                 .start = 0x20310000, /* IO PORT */
  59                 .end = 0x20312000,
  60                 .flags = IORESOURCE_MEM,
  61         }, {
  62                 .start = 0x20311000, /* Attribute Memory */
  63                 .end = 0x20311FFF,
  64                 .flags = IORESOURCE_MEM,
  65         }, {
  66                 .start = IRQ_PF4,
  67                 .end = IRQ_PF4,
  68                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  69         }, {
  70                 .start = 6, /* Card Detect PF6 */
  71                 .end = 6,
  72                 .flags = IORESOURCE_IRQ,
  73         },
  74 };
  75
  76 static struct platform_device bfin_pcmcia_cf_device = {
  77         .name = "bfin_cf_pcmcia",
  78         .id = -1,
  79         .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  80         .resource = bfin_pcmcia_cf_resources,
  81 };
  82 #endif
  83
  84 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  85 static struct platform_device rtc_device = {
  86         .name = "rtc-bfin",
  87         .id   = -1,
  88 };
  89 #endif
  90
  91 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  92 static struct resource smc91x_resources[] = {
  93         {
  94                 .name = "smc91x-regs",
  95                 .start = 0x20300300,
  96                 .end = 0x20300300 + 16,
  97                 .flags = IORESOURCE_MEM,
  98         }, {
  99
 100                 .start = IRQ_PF7,
 101                 .end = IRQ_PF7,
 102                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 103         },
 104 };
 105 static struct platform_device smc91x_device = {
 106         .name = "smc91x",
 107         .id = 0,
 108         .num_resources = ARRAY_SIZE(smc91x_resources),
 109         .resource = smc91x_resources,
 110 };
 111 #endif
 112
 113 #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
 114 static struct resource sl811_hcd_resources[] = {
 115         {
 116                 .start = 0x20340000,
 117                 .end = 0x20340000,
 118                 .flags = IORESOURCE_MEM,
 119         }, {
 120                 .start = 0x20340004,
 121                 .end = 0x20340004,
 122                 .flags = IORESOURCE_MEM,
 123         }, {
 124                 .start = CONFIG_USB_SL811_BFIN_IRQ,
 125                 .end = CONFIG_USB_SL811_BFIN_IRQ,
 126                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 127         },
 128 };
 129
 130 #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
 131 void sl811_port_power(struct device *dev, int is_on)
 132 {
 133         unsigned short mask = (1 << CONFIG_USB_SL811_BFIN_GPIO_VBUS);
 134
 135         bfin_write_PORT_FER(bfin_read_PORT_FER() & ~mask);
 136         bfin_write_FIO_DIR(bfin_read_FIO_DIR() | mask);
 137
 138         if (is_on)
 139                 bfin_write_FIO_FLAG_S(mask);
 140         else
 141                 bfin_write_FIO_FLAG_C(mask);
 142 }
 143 #endif
 144
 145 static struct sl811_platform_data sl811_priv = {
 146         .potpg = 10,
 147         .power = 250,       /* == 500mA */
 148 #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
 149         .port_power = &sl811_port_power,
 150 #endif
 151 };
 152
 153 static struct platform_device sl811_hcd_device = {
 154         .name = "sl811-hcd",
 155         .id = 0,
 156         .dev = {
 157                 .platform_data = &sl811_priv,
 158         },
 159         .num_resources = ARRAY_SIZE(sl811_hcd_resources),
 160         .resource = sl811_hcd_resources,
 161 };
 162 #endif
 163
 164 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
 165 static struct resource isp1362_hcd_resources[] = {
 166         {
 167                 .start = 0x20360000,
 168                 .end = 0x20360000,
 169                 .flags = IORESOURCE_MEM,
 170         }, {
 171                 .start = 0x20360004,
 172                 .end = 0x20360004,
 173                 .flags = IORESOURCE_MEM,
 174         }, {
 175                 .start = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
 176                 .end = CONFIG_USB_ISP1362_BFIN_GPIO_IRQ,
 177                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 178         },
 179 };
 180
 181 static struct isp1362_platform_data isp1362_priv = {
 182         .sel15Kres = 1,
 183         .clknotstop = 0,
 184         .oc_enable = 0,
 185         .int_act_high = 0,
 186         .int_edge_triggered = 0,
 187         .remote_wakeup_connected = 0,
 188         .no_power_switching = 1,
 189         .power_switching_mode = 0,
 190 };
 191
 192 static struct platform_device isp1362_hcd_device = {
 193         .name = "isp1362-hcd",
 194         .id = 0,
 195         .dev = {
 196                 .platform_data = &isp1362_priv,
 197         },
 198         .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
 199         .resource = isp1362_hcd_resources,
 200 };
 201 #endif
 202
 203 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 204 static struct platform_device bfin_mac_device = {
 205         .name = "bfin_mac",
 206 };
 207 #endif
 208
 209 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
 210 static struct resource net2272_bfin_resources[] = {
 211         {
 212                 .start = 0x20300000,
 213                 .end = 0x20300000 + 0x100,
 214                 .flags = IORESOURCE_MEM,
 215         }, {
 216                 .start = IRQ_PF7,
 217                 .end = IRQ_PF7,
 218                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 219         },
 220 };
 221
 222 static struct platform_device net2272_bfin_device = {
 223         .name = "net2272",
 224         .id = -1,
 225         .num_resources = ARRAY_SIZE(net2272_bfin_resources),
 226         .resource = net2272_bfin_resources,
 227 };
 228 #endif
 229
 230 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 231 /* all SPI peripherals info goes here */
 232
 233 #if defined(CONFIG_MTD_M25P80) \
 234         || defined(CONFIG_MTD_M25P80_MODULE)
 235 static struct mtd_partition bfin_spi_flash_partitions[] = {
 236         {
 237                 .name = "bootloader",
 238                 .size = 0x00020000,
 239                 .offset = 0,
 240                 .mask_flags = MTD_CAP_ROM
 241         }, {
 242                 .name = "kernel",
 243                 .size = 0xe0000,
 244                 .offset = 0x20000
 245         }, {
 246                 .name = "file system",
 247                 .size = 0x700000,
 248                 .offset = 0x00100000,
 249         }
 250 };
 251
 252 static struct flash_platform_data bfin_spi_flash_data = {
 253         .name = "m25p80",
 254         .parts = bfin_spi_flash_partitions,
 255         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 256         .type = "m25p64",
 257 };
 258
 259 /* SPI flash chip (m25p64) */
 260 static struct bfin5xx_spi_chip spi_flash_chip_info = {
 261         .enable_dma = 0,         /* use dma transfer with this chip*/
 262         .bits_per_word = 8,
 263 };
 264 #endif
 265
 266 #if defined(CONFIG_SPI_ADC_BF533) \
 267         || defined(CONFIG_SPI_ADC_BF533_MODULE)
 268 /* SPI ADC chip */
 269 static struct bfin5xx_spi_chip spi_adc_chip_info = {
 270         .enable_dma = 1,         /* use dma transfer with this chip*/
 271         .bits_per_word = 16,
 272 };
 273 #endif
 274
 275 #if defined(CONFIG_SND_BLACKFIN_AD1836) \
 276         || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
 277 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
 278         .enable_dma = 0,
 279         .bits_per_word = 16,
 280 };
 281 #endif
 282
 283 #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
 284 static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
 285         .enable_dma = 0,
 286         .bits_per_word = 16,
 287 };
 288 #endif
 289
 290 #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
 291 static struct bfin5xx_spi_chip spi_mmc_chip_info = {
 292         .enable_dma = 1,
 293         .bits_per_word = 8,
 294 };
 295 #endif
 296
 297 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 298 static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
 299         .cs_change_per_word = 1,
 300         .enable_dma = 0,
 301         .bits_per_word = 16,
 302 };
 303
 304 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
 305         .model                  = 7877,
 306         .vref_delay_usecs       = 50,   /* internal, no capacitor */
 307         .x_plate_ohms           = 419,
 308         .y_plate_ohms           = 486,
 309         .pressure_max           = 1000,
 310         .pressure_min           = 0,
 311         .stopacq_polarity       = 1,
 312         .first_conversion_delay = 3,
 313         .acquisition_time       = 1,
 314         .averaging              = 1,
 315         .pen_down_acc_interval  = 1,
 316 };
 317 #endif
 318
 319 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 320 #if defined(CONFIG_MTD_M25P80) \
 321         || defined(CONFIG_MTD_M25P80_MODULE)
 322         {
 323                 /* the modalias must be the same as spi device driver name */
 324                 .modalias = "m25p80", /* Name of spi_driver for this device */
 325                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 326                 .bus_num = 1, /* Framework bus number */
 327                 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
 328                 .platform_data = &bfin_spi_flash_data,
 329                 .controller_data = &spi_flash_chip_info,
 330                 .mode = SPI_MODE_3,
 331         },
 332 #endif
 333
 334 #if defined(CONFIG_SPI_ADC_BF533) \
 335         || defined(CONFIG_SPI_ADC_BF533_MODULE)
 336         {
 337                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
 338                 .max_speed_hz = 6250000,     /* max spi clock (SCK) speed in HZ */
 339                 .bus_num = 1, /* Framework bus number */
 340                 .chip_select = 1, /* Framework chip select. */
 341                 .platform_data = NULL, /* No spi_driver specific config */
 342                 .controller_data = &spi_adc_chip_info,
 343         },
 344 #endif
 345
 346 #if defined(CONFIG_SND_BLACKFIN_AD1836) \
 347         || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
 348         {
 349                 .modalias = "ad1836-spi",
 350                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 351                 .bus_num = 1,
 352                 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
 353                 .controller_data = &ad1836_spi_chip_info,
 354         },
 355 #endif
 356 #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
 357         {
 358                 .modalias = "ad9960-spi",
 359                 .max_speed_hz = 10000000,     /* max spi clock (SCK) speed in HZ */
 360                 .bus_num = 1,
 361                 .chip_select = 1,
 362                 .controller_data = &ad9960_spi_chip_info,
 363         },
 364 #endif
 365 #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
 366         {
 367                 .modalias = "spi_mmc_dummy",
 368                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 369                 .bus_num = 1,
 370                 .chip_select = 7,
 371                 .platform_data = NULL,
 372                 .controller_data = &spi_mmc_chip_info,
 373                 .mode = SPI_MODE_3,
 374         },
 375         {
 376                 .modalias = "spi_mmc",
 377                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 378                 .bus_num = 1,
 379                 .chip_select = CONFIG_SPI_MMC_CS_CHAN,
 380                 .platform_data = NULL,
 381                 .controller_data = &spi_mmc_chip_info,
 382                 .mode = SPI_MODE_3,
 383         },
 384 #endif
 385 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 386 {
 387         .modalias               = "ad7877",
 388         .platform_data          = &bfin_ad7877_ts_info,
 389         .irq                    = IRQ_PF2,
 390         .max_speed_hz           = 12500000,     /* max spi clock (SCK) speed in HZ */
 391         .bus_num                = 1,
 392         .chip_select            = 5,
 393         .controller_data = &spi_ad7877_chip_info,
 394 },
 395 #endif
 396
 397 };
 398
 399 /* SPI controller data */
 400 static struct bfin5xx_spi_master spi_bfin_master_info = {
 401         .num_chipselect = 8,
 402         .enable_dma = 1,  /* master has the ability to do dma transfer */
 403 };
 404
 405 static struct platform_device spi_bfin_master_device = {
 406         .name = "bfin-spi-master",
 407         .id = 1, /* Bus number */
 408         .dev = {
 409                 .platform_data = &spi_bfin_master_info, /* Passed to driver */
 410         },
 411 };
 412 #endif  /* spi master and devices */
 413
 414 #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
 415 static struct platform_device bfin_fb_device = {
 416         .name = "bf537-fb",
 417 };
 418 #endif
 419
 420 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 421 static struct resource bfin_uart_resources[] = {
 422         {
 423                 .start = 0xFFC00400,
 424                 .end = 0xFFC004FF,
 425                 .flags = IORESOURCE_MEM,
 426         }, {
 427                 .start = 0xFFC02000,
 428                 .end = 0xFFC020FF,
 429                 .flags = IORESOURCE_MEM,
 430         },
 431 };
 432
 433 static struct platform_device bfin_uart_device = {
 434         .name = "bfin-uart",
 435         .id = 1,
 436         .num_resources = ARRAY_SIZE(bfin_uart_resources),
 437         .resource = bfin_uart_resources,
 438 };
 439 #endif
 440
 441
 442 static struct platform_device *stamp_devices[] __initdata = {
 443 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
 444         &bfin_pcmcia_cf_device,
 445 #endif
 446
 447 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 448         &rtc_device,
 449 #endif
 450
 451 #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
 452         &sl811_hcd_device,
 453 #endif
 454
 455 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
 456         &isp1362_hcd_device,
 457 #endif
 458
 459 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
 460         &smc91x_device,
 461 #endif
 462
 463 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 464         &bfin_mac_device,
 465 #endif
 466
 467 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
 468         &net2272_bfin_device,
 469 #endif
 470
 471 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 472         &spi_bfin_master_device,
 473 #endif
 474
 475 #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
 476         &bfin_fb_device,
 477 #endif
 478
 479 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 480         &bfin_uart_device,
 481 #endif
 482 };
 483
 484 static int __init stamp_init(void)
 485 {
 486         printk(KERN_INFO "%s(): registering device resources\n", __FUNCTION__);
 487         platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
 488 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 489         spi_register_board_info(bfin_spi_board_info,
 490                                 ARRAY_SIZE(bfin_spi_board_info));
 491 #endif
 492         return 0;
 493 }
 494
 495 arch_initcall(stamp_init);