Blackfin: boards: clean up redundant/dead spi resources
[deliverable/linux.git] / arch / blackfin / mach-bf538 / boards / ezkit.c
1 /*
2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
5 *
6 * Licensed under the GPL-2
7 */
8
9 #include <linux/device.h>
10 #include <linux/platform_device.h>
11 #include <linux/mtd/mtd.h>
12 #include <linux/mtd/physmap.h>
13 #include <linux/mtd/partitions.h>
14 #include <linux/spi/spi.h>
15 #include <linux/spi/flash.h>
16 #include <linux/irq.h>
17 #include <linux/interrupt.h>
18 #include <asm/bfin5xx_spi.h>
19 #include <asm/dma.h>
20 #include <asm/gpio.h>
21 #include <asm/nand.h>
22 #include <asm/portmux.h>
23 #include <asm/dpmc.h>
24 #include <linux/input.h>
25
26 /*
27 * Name the Board for the /proc/cpuinfo
28 */
29 const char bfin_board_name[] = "ADI BF538-EZKIT";
30
31 /*
32 * Driver needs to know address, irq and flag pin.
33 */
34
35
36 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
37 static struct platform_device rtc_device = {
38 .name = "rtc-bfin",
39 .id = -1,
40 };
41 #endif
42
43 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
44 #ifdef CONFIG_SERIAL_BFIN_UART0
45 static struct resource bfin_uart0_resources[] = {
46 {
47 .start = UART0_THR,
48 .end = UART0_GCTL+2,
49 .flags = IORESOURCE_MEM,
50 },
51 {
52 .start = IRQ_UART0_RX,
53 .end = IRQ_UART0_RX+1,
54 .flags = IORESOURCE_IRQ,
55 },
56 {
57 .start = IRQ_UART0_ERROR,
58 .end = IRQ_UART0_ERROR,
59 .flags = IORESOURCE_IRQ,
60 },
61 {
62 .start = CH_UART0_TX,
63 .end = CH_UART0_TX,
64 .flags = IORESOURCE_DMA,
65 },
66 {
67 .start = CH_UART0_RX,
68 .end = CH_UART0_RX,
69 .flags = IORESOURCE_DMA,
70 },
71 #ifdef CONFIG_BFIN_UART0_CTSRTS
72 { /* CTS pin */
73 .start = GPIO_PG7,
74 .end = GPIO_PG7,
75 .flags = IORESOURCE_IO,
76 },
77 { /* RTS pin */
78 .start = GPIO_PG6,
79 .end = GPIO_PG6,
80 .flags = IORESOURCE_IO,
81 },
82 #endif
83 };
84
85 static unsigned short bfin_uart0_peripherals[] = {
86 P_UART0_TX, P_UART0_RX, 0
87 };
88
89 static struct platform_device bfin_uart0_device = {
90 .name = "bfin-uart",
91 .id = 0,
92 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
93 .resource = bfin_uart0_resources,
94 .dev = {
95 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
96 },
97 };
98 #endif
99 #ifdef CONFIG_SERIAL_BFIN_UART1
100 static struct resource bfin_uart1_resources[] = {
101 {
102 .start = UART1_THR,
103 .end = UART1_GCTL+2,
104 .flags = IORESOURCE_MEM,
105 },
106 {
107 .start = IRQ_UART1_RX,
108 .end = IRQ_UART1_RX+1,
109 .flags = IORESOURCE_IRQ,
110 },
111 {
112 .start = IRQ_UART1_ERROR,
113 .end = IRQ_UART1_ERROR,
114 .flags = IORESOURCE_IRQ,
115 },
116 {
117 .start = CH_UART1_TX,
118 .end = CH_UART1_TX,
119 .flags = IORESOURCE_DMA,
120 },
121 {
122 .start = CH_UART1_RX,
123 .end = CH_UART1_RX,
124 .flags = IORESOURCE_DMA,
125 },
126 };
127
128 static unsigned short bfin_uart1_peripherals[] = {
129 P_UART1_TX, P_UART1_RX, 0
130 };
131
132 static struct platform_device bfin_uart1_device = {
133 .name = "bfin-uart",
134 .id = 1,
135 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
136 .resource = bfin_uart1_resources,
137 .dev = {
138 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
139 },
140 };
141 #endif
142 #ifdef CONFIG_SERIAL_BFIN_UART2
143 static struct resource bfin_uart2_resources[] = {
144 {
145 .start = UART2_THR,
146 .end = UART2_GCTL+2,
147 .flags = IORESOURCE_MEM,
148 },
149 {
150 .start = IRQ_UART2_RX,
151 .end = IRQ_UART2_RX+1,
152 .flags = IORESOURCE_IRQ,
153 },
154 {
155 .start = IRQ_UART2_ERROR,
156 .end = IRQ_UART2_ERROR,
157 .flags = IORESOURCE_IRQ,
158 },
159 {
160 .start = CH_UART2_TX,
161 .end = CH_UART2_TX,
162 .flags = IORESOURCE_DMA,
163 },
164 {
165 .start = CH_UART2_RX,
166 .end = CH_UART2_RX,
167 .flags = IORESOURCE_DMA,
168 },
169 };
170
171 static unsigned short bfin_uart2_peripherals[] = {
172 P_UART2_TX, P_UART2_RX, 0
173 };
174
175 static struct platform_device bfin_uart2_device = {
176 .name = "bfin-uart",
177 .id = 2,
178 .num_resources = ARRAY_SIZE(bfin_uart2_resources),
179 .resource = bfin_uart2_resources,
180 .dev = {
181 .platform_data = &bfin_uart2_peripherals, /* Passed to driver */
182 },
183 };
184 #endif
185 #endif
186
187 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
188 #ifdef CONFIG_BFIN_SIR0
189 static struct resource bfin_sir0_resources[] = {
190 {
191 .start = 0xFFC00400,
192 .end = 0xFFC004FF,
193 .flags = IORESOURCE_MEM,
194 },
195 {
196 .start = IRQ_UART0_RX,
197 .end = IRQ_UART0_RX+1,
198 .flags = IORESOURCE_IRQ,
199 },
200 {
201 .start = CH_UART0_RX,
202 .end = CH_UART0_RX+1,
203 .flags = IORESOURCE_DMA,
204 },
205 };
206 static struct platform_device bfin_sir0_device = {
207 .name = "bfin_sir",
208 .id = 0,
209 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
210 .resource = bfin_sir0_resources,
211 };
212 #endif
213 #ifdef CONFIG_BFIN_SIR1
214 static struct resource bfin_sir1_resources[] = {
215 {
216 .start = 0xFFC02000,
217 .end = 0xFFC020FF,
218 .flags = IORESOURCE_MEM,
219 },
220 {
221 .start = IRQ_UART1_RX,
222 .end = IRQ_UART1_RX+1,
223 .flags = IORESOURCE_IRQ,
224 },
225 {
226 .start = CH_UART1_RX,
227 .end = CH_UART1_RX+1,
228 .flags = IORESOURCE_DMA,
229 },
230 };
231 static struct platform_device bfin_sir1_device = {
232 .name = "bfin_sir",
233 .id = 1,
234 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
235 .resource = bfin_sir1_resources,
236 };
237 #endif
238 #ifdef CONFIG_BFIN_SIR2
239 static struct resource bfin_sir2_resources[] = {
240 {
241 .start = 0xFFC02100,
242 .end = 0xFFC021FF,
243 .flags = IORESOURCE_MEM,
244 },
245 {
246 .start = IRQ_UART2_RX,
247 .end = IRQ_UART2_RX+1,
248 .flags = IORESOURCE_IRQ,
249 },
250 {
251 .start = CH_UART2_RX,
252 .end = CH_UART2_RX+1,
253 .flags = IORESOURCE_DMA,
254 },
255 };
256 static struct platform_device bfin_sir2_device = {
257 .name = "bfin_sir",
258 .id = 2,
259 .num_resources = ARRAY_SIZE(bfin_sir2_resources),
260 .resource = bfin_sir2_resources,
261 };
262 #endif
263 #endif
264
265 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
266 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
267 static struct resource bfin_sport0_uart_resources[] = {
268 {
269 .start = SPORT0_TCR1,
270 .end = SPORT0_MRCS3+4,
271 .flags = IORESOURCE_MEM,
272 },
273 {
274 .start = IRQ_SPORT0_RX,
275 .end = IRQ_SPORT0_RX+1,
276 .flags = IORESOURCE_IRQ,
277 },
278 {
279 .start = IRQ_SPORT0_ERROR,
280 .end = IRQ_SPORT0_ERROR,
281 .flags = IORESOURCE_IRQ,
282 },
283 };
284
285 static unsigned short bfin_sport0_peripherals[] = {
286 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
287 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
288 };
289
290 static struct platform_device bfin_sport0_uart_device = {
291 .name = "bfin-sport-uart",
292 .id = 0,
293 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
294 .resource = bfin_sport0_uart_resources,
295 .dev = {
296 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
297 },
298 };
299 #endif
300 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
301 static struct resource bfin_sport1_uart_resources[] = {
302 {
303 .start = SPORT1_TCR1,
304 .end = SPORT1_MRCS3+4,
305 .flags = IORESOURCE_MEM,
306 },
307 {
308 .start = IRQ_SPORT1_RX,
309 .end = IRQ_SPORT1_RX+1,
310 .flags = IORESOURCE_IRQ,
311 },
312 {
313 .start = IRQ_SPORT1_ERROR,
314 .end = IRQ_SPORT1_ERROR,
315 .flags = IORESOURCE_IRQ,
316 },
317 };
318
319 static unsigned short bfin_sport1_peripherals[] = {
320 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
321 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
322 };
323
324 static struct platform_device bfin_sport1_uart_device = {
325 .name = "bfin-sport-uart",
326 .id = 1,
327 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
328 .resource = bfin_sport1_uart_resources,
329 .dev = {
330 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
331 },
332 };
333 #endif
334 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
335 static struct resource bfin_sport2_uart_resources[] = {
336 {
337 .start = SPORT2_TCR1,
338 .end = SPORT2_MRCS3+4,
339 .flags = IORESOURCE_MEM,
340 },
341 {
342 .start = IRQ_SPORT2_RX,
343 .end = IRQ_SPORT2_RX+1,
344 .flags = IORESOURCE_IRQ,
345 },
346 {
347 .start = IRQ_SPORT2_ERROR,
348 .end = IRQ_SPORT2_ERROR,
349 .flags = IORESOURCE_IRQ,
350 },
351 };
352
353 static unsigned short bfin_sport2_peripherals[] = {
354 P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,
355 P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0
356 };
357
358 static struct platform_device bfin_sport2_uart_device = {
359 .name = "bfin-sport-uart",
360 .id = 2,
361 .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),
362 .resource = bfin_sport2_uart_resources,
363 .dev = {
364 .platform_data = &bfin_sport2_peripherals, /* Passed to driver */
365 },
366 };
367 #endif
368 #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
369 static struct resource bfin_sport3_uart_resources[] = {
370 {
371 .start = SPORT3_TCR1,
372 .end = SPORT3_MRCS3+4,
373 .flags = IORESOURCE_MEM,
374 },
375 {
376 .start = IRQ_SPORT3_RX,
377 .end = IRQ_SPORT3_RX+1,
378 .flags = IORESOURCE_IRQ,
379 },
380 {
381 .start = IRQ_SPORT3_ERROR,
382 .end = IRQ_SPORT3_ERROR,
383 .flags = IORESOURCE_IRQ,
384 },
385 };
386
387 static unsigned short bfin_sport3_peripherals[] = {
388 P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, P_SPORT3_RFS,
389 P_SPORT3_DRPRI, P_SPORT3_RSCLK, P_SPORT3_DRSEC, P_SPORT3_DTSEC, 0
390 };
391
392 static struct platform_device bfin_sport3_uart_device = {
393 .name = "bfin-sport-uart",
394 .id = 3,
395 .num_resources = ARRAY_SIZE(bfin_sport3_uart_resources),
396 .resource = bfin_sport3_uart_resources,
397 .dev = {
398 .platform_data = &bfin_sport3_peripherals, /* Passed to driver */
399 },
400 };
401 #endif
402 #endif
403
404 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
405 static unsigned short bfin_can_peripherals[] = {
406 P_CAN0_RX, P_CAN0_TX, 0
407 };
408
409 static struct resource bfin_can_resources[] = {
410 {
411 .start = 0xFFC02A00,
412 .end = 0xFFC02FFF,
413 .flags = IORESOURCE_MEM,
414 },
415 {
416 .start = IRQ_CAN_RX,
417 .end = IRQ_CAN_RX,
418 .flags = IORESOURCE_IRQ,
419 },
420 {
421 .start = IRQ_CAN_TX,
422 .end = IRQ_CAN_TX,
423 .flags = IORESOURCE_IRQ,
424 },
425 {
426 .start = IRQ_CAN_ERROR,
427 .end = IRQ_CAN_ERROR,
428 .flags = IORESOURCE_IRQ,
429 },
430 };
431
432 static struct platform_device bfin_can_device = {
433 .name = "bfin_can",
434 .num_resources = ARRAY_SIZE(bfin_can_resources),
435 .resource = bfin_can_resources,
436 .dev = {
437 .platform_data = &bfin_can_peripherals, /* Passed to driver */
438 },
439 };
440 #endif
441
442 /*
443 * USB-LAN EzExtender board
444 * Driver needs to know address, irq and flag pin.
445 */
446 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
447 #include <linux/smc91x.h>
448
449 static struct smc91x_platdata smc91x_info = {
450 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
451 .leda = RPC_LED_100_10,
452 .ledb = RPC_LED_TX_RX,
453 };
454
455 static struct resource smc91x_resources[] = {
456 {
457 .name = "smc91x-regs",
458 .start = 0x20310300,
459 .end = 0x20310300 + 16,
460 .flags = IORESOURCE_MEM,
461 }, {
462 .start = IRQ_PF0,
463 .end = IRQ_PF0,
464 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
465 },
466 };
467 static struct platform_device smc91x_device = {
468 .name = "smc91x",
469 .id = 0,
470 .num_resources = ARRAY_SIZE(smc91x_resources),
471 .resource = smc91x_resources,
472 .dev = {
473 .platform_data = &smc91x_info,
474 },
475 };
476 #endif
477
478 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
479 /* all SPI peripherals info goes here */
480 #if defined(CONFIG_MTD_M25P80) \
481 || defined(CONFIG_MTD_M25P80_MODULE)
482 /* SPI flash chip (m25p16) */
483 static struct mtd_partition bfin_spi_flash_partitions[] = {
484 {
485 .name = "bootloader(spi)",
486 .size = 0x00040000,
487 .offset = 0,
488 .mask_flags = MTD_CAP_ROM
489 }, {
490 .name = "linux kernel(spi)",
491 .size = 0x1c0000,
492 .offset = 0x40000
493 }
494 };
495
496 static struct flash_platform_data bfin_spi_flash_data = {
497 .name = "m25p80",
498 .parts = bfin_spi_flash_partitions,
499 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
500 .type = "m25p16",
501 };
502
503 static struct bfin5xx_spi_chip spi_flash_chip_info = {
504 .enable_dma = 0, /* use dma transfer with this chip*/
505 };
506 #endif
507
508 #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
509 #include <linux/spi/ad7879.h>
510 static const struct ad7879_platform_data bfin_ad7879_ts_info = {
511 .model = 7879, /* Model = AD7879 */
512 .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
513 .pressure_max = 10000,
514 .pressure_min = 0,
515 .first_conversion_delay = 3, /* wait 512us before do a first conversion */
516 .acquisition_time = 1, /* 4us acquisition time per sample */
517 .median = 2, /* do 8 measurements */
518 .averaging = 1, /* take the average of 4 middle samples */
519 .pen_down_acc_interval = 255, /* 9.4 ms */
520 .gpio_export = 1, /* Export GPIO to gpiolib */
521 .gpio_base = -1, /* Dynamic allocation */
522 };
523 #endif
524
525 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
526 #include <asm/bfin-lq035q1.h>
527
528 static struct bfin_lq035q1fb_disp_info bfin_lq035q1_data = {
529 .mode = LQ035_NORM | LQ035_RGB | LQ035_RL | LQ035_TB,
530 .ppi_mode = USE_RGB565_16_BIT_PPI,
531 .use_bl = 0, /* let something else control the LCD Blacklight */
532 .gpio_bl = GPIO_PF7,
533 };
534
535 static struct resource bfin_lq035q1_resources[] = {
536 {
537 .start = IRQ_PPI_ERROR,
538 .end = IRQ_PPI_ERROR,
539 .flags = IORESOURCE_IRQ,
540 },
541 };
542
543 static struct platform_device bfin_lq035q1_device = {
544 .name = "bfin-lq035q1",
545 .id = -1,
546 .num_resources = ARRAY_SIZE(bfin_lq035q1_resources),
547 .resource = bfin_lq035q1_resources,
548 .dev = {
549 .platform_data = &bfin_lq035q1_data,
550 },
551 };
552 #endif
553
554 static struct spi_board_info bf538_spi_board_info[] __initdata = {
555 #if defined(CONFIG_MTD_M25P80) \
556 || defined(CONFIG_MTD_M25P80_MODULE)
557 {
558 /* the modalias must be the same as spi device driver name */
559 .modalias = "m25p80", /* Name of spi_driver for this device */
560 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
561 .bus_num = 0, /* Framework bus number */
562 .chip_select = 1, /* SPI_SSEL1*/
563 .platform_data = &bfin_spi_flash_data,
564 .controller_data = &spi_flash_chip_info,
565 .mode = SPI_MODE_3,
566 },
567 #endif
568 #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
569 {
570 .modalias = "ad7879",
571 .platform_data = &bfin_ad7879_ts_info,
572 .irq = IRQ_PF3,
573 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
574 .bus_num = 0,
575 .chip_select = 1,
576 .mode = SPI_CPHA | SPI_CPOL,
577 },
578 #endif
579 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
580 {
581 .modalias = "bfin-lq035q1-spi",
582 .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
583 .bus_num = 0,
584 .chip_select = 2,
585 .mode = SPI_CPHA | SPI_CPOL,
586 },
587 #endif
588 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
589 {
590 .modalias = "spidev",
591 .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
592 .bus_num = 0,
593 .chip_select = 1,
594 },
595 #endif
596 };
597
598 /* SPI (0) */
599 static struct resource bfin_spi0_resource[] = {
600 [0] = {
601 .start = SPI0_REGBASE,
602 .end = SPI0_REGBASE + 0xFF,
603 .flags = IORESOURCE_MEM,
604 },
605 [1] = {
606 .start = CH_SPI0,
607 .end = CH_SPI0,
608 .flags = IORESOURCE_DMA,
609 },
610 [2] = {
611 .start = IRQ_SPI0,
612 .end = IRQ_SPI0,
613 .flags = IORESOURCE_IRQ,
614 }
615 };
616
617 /* SPI (1) */
618 static struct resource bfin_spi1_resource[] = {
619 [0] = {
620 .start = SPI1_REGBASE,
621 .end = SPI1_REGBASE + 0xFF,
622 .flags = IORESOURCE_MEM,
623 },
624 [1] = {
625 .start = CH_SPI1,
626 .end = CH_SPI1,
627 .flags = IORESOURCE_DMA,
628 },
629 [2] = {
630 .start = IRQ_SPI1,
631 .end = IRQ_SPI1,
632 .flags = IORESOURCE_IRQ,
633 }
634 };
635
636 /* SPI (2) */
637 static struct resource bfin_spi2_resource[] = {
638 [0] = {
639 .start = SPI2_REGBASE,
640 .end = SPI2_REGBASE + 0xFF,
641 .flags = IORESOURCE_MEM,
642 },
643 [1] = {
644 .start = CH_SPI2,
645 .end = CH_SPI2,
646 .flags = IORESOURCE_DMA,
647 },
648 [2] = {
649 .start = IRQ_SPI2,
650 .end = IRQ_SPI2,
651 .flags = IORESOURCE_IRQ,
652 }
653 };
654
655 /* SPI controller data */
656 static struct bfin5xx_spi_master bf538_spi_master_info0 = {
657 .num_chipselect = 8,
658 .enable_dma = 1, /* master has the ability to do dma transfer */
659 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
660 };
661
662 static struct platform_device bf538_spi_master0 = {
663 .name = "bfin-spi",
664 .id = 0, /* Bus number */
665 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
666 .resource = bfin_spi0_resource,
667 .dev = {
668 .platform_data = &bf538_spi_master_info0, /* Passed to driver */
669 },
670 };
671
672 static struct bfin5xx_spi_master bf538_spi_master_info1 = {
673 .num_chipselect = 2,
674 .enable_dma = 1, /* master has the ability to do dma transfer */
675 .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
676 };
677
678 static struct platform_device bf538_spi_master1 = {
679 .name = "bfin-spi",
680 .id = 1, /* Bus number */
681 .num_resources = ARRAY_SIZE(bfin_spi1_resource),
682 .resource = bfin_spi1_resource,
683 .dev = {
684 .platform_data = &bf538_spi_master_info1, /* Passed to driver */
685 },
686 };
687
688 static struct bfin5xx_spi_master bf538_spi_master_info2 = {
689 .num_chipselect = 2,
690 .enable_dma = 1, /* master has the ability to do dma transfer */
691 .pin_req = {P_SPI2_SCK, P_SPI2_MISO, P_SPI2_MOSI, 0},
692 };
693
694 static struct platform_device bf538_spi_master2 = {
695 .name = "bfin-spi",
696 .id = 2, /* Bus number */
697 .num_resources = ARRAY_SIZE(bfin_spi2_resource),
698 .resource = bfin_spi2_resource,
699 .dev = {
700 .platform_data = &bf538_spi_master_info2, /* Passed to driver */
701 },
702 };
703
704 #endif /* spi master and devices */
705
706 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
707 static struct resource bfin_twi0_resource[] = {
708 [0] = {
709 .start = TWI0_REGBASE,
710 .end = TWI0_REGBASE + 0xFF,
711 .flags = IORESOURCE_MEM,
712 },
713 [1] = {
714 .start = IRQ_TWI0,
715 .end = IRQ_TWI0,
716 .flags = IORESOURCE_IRQ,
717 },
718 };
719
720 static struct platform_device i2c_bfin_twi0_device = {
721 .name = "i2c-bfin-twi",
722 .id = 0,
723 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
724 .resource = bfin_twi0_resource,
725 };
726
727 #if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
728 static struct resource bfin_twi1_resource[] = {
729 [0] = {
730 .start = TWI1_REGBASE,
731 .end = TWI1_REGBASE + 0xFF,
732 .flags = IORESOURCE_MEM,
733 },
734 [1] = {
735 .start = IRQ_TWI1,
736 .end = IRQ_TWI1,
737 .flags = IORESOURCE_IRQ,
738 },
739 };
740
741 static struct platform_device i2c_bfin_twi1_device = {
742 .name = "i2c-bfin-twi",
743 .id = 1,
744 .num_resources = ARRAY_SIZE(bfin_twi1_resource),
745 .resource = bfin_twi1_resource,
746 };
747 #endif
748 #endif
749
750 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
751 #include <linux/gpio_keys.h>
752
753 static struct gpio_keys_button bfin_gpio_keys_table[] = {
754 {BTN_0, GPIO_PC7, 1, "gpio-keys: BTN0"},
755 };
756
757 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
758 .buttons = bfin_gpio_keys_table,
759 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
760 };
761
762 static struct platform_device bfin_device_gpiokeys = {
763 .name = "gpio-keys",
764 .dev = {
765 .platform_data = &bfin_gpio_keys_data,
766 },
767 };
768 #endif
769
770 static const unsigned int cclk_vlev_datasheet[] =
771 {
772 /*
773 * Internal VLEV BF538SBBC1533
774 ****temporarily using these values until data sheet is updated
775 */
776 VRPAIR(VLEV_100, 150000000),
777 VRPAIR(VLEV_100, 250000000),
778 VRPAIR(VLEV_110, 276000000),
779 VRPAIR(VLEV_115, 301000000),
780 VRPAIR(VLEV_120, 525000000),
781 VRPAIR(VLEV_125, 550000000),
782 VRPAIR(VLEV_130, 600000000),
783 };
784
785 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
786 .tuple_tab = cclk_vlev_datasheet,
787 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
788 .vr_settling_time = 25 /* us */,
789 };
790
791 static struct platform_device bfin_dpmc = {
792 .name = "bfin dpmc",
793 .dev = {
794 .platform_data = &bfin_dmpc_vreg_data,
795 },
796 };
797
798 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
799 static struct mtd_partition ezkit_partitions[] = {
800 {
801 .name = "bootloader(nor)",
802 .size = 0x40000,
803 .offset = 0,
804 }, {
805 .name = "linux kernel(nor)",
806 .size = 0x180000,
807 .offset = MTDPART_OFS_APPEND,
808 }, {
809 .name = "file system(nor)",
810 .size = MTDPART_SIZ_FULL,
811 .offset = MTDPART_OFS_APPEND,
812 }
813 };
814
815 static struct physmap_flash_data ezkit_flash_data = {
816 .width = 2,
817 .parts = ezkit_partitions,
818 .nr_parts = ARRAY_SIZE(ezkit_partitions),
819 };
820
821 static struct resource ezkit_flash_resource = {
822 .start = 0x20000000,
823 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
824 .end = 0x202fffff,
825 #else
826 .end = 0x203fffff,
827 #endif
828 .flags = IORESOURCE_MEM,
829 };
830
831 static struct platform_device ezkit_flash_device = {
832 .name = "physmap-flash",
833 .id = 0,
834 .dev = {
835 .platform_data = &ezkit_flash_data,
836 },
837 .num_resources = 1,
838 .resource = &ezkit_flash_resource,
839 };
840 #endif
841
842 static struct platform_device *cm_bf538_devices[] __initdata = {
843
844 &bfin_dpmc,
845
846 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
847 &rtc_device,
848 #endif
849
850 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
851 #ifdef CONFIG_SERIAL_BFIN_UART0
852 &bfin_uart0_device,
853 #endif
854 #ifdef CONFIG_SERIAL_BFIN_UART1
855 &bfin_uart1_device,
856 #endif
857 #ifdef CONFIG_SERIAL_BFIN_UART2
858 &bfin_uart2_device,
859 #endif
860 #endif
861
862 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
863 &bf538_spi_master0,
864 &bf538_spi_master1,
865 &bf538_spi_master2,
866 #endif
867
868 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
869 &i2c_bfin_twi0_device,
870 &i2c_bfin_twi1_device,
871 #endif
872
873 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
874 #ifdef CONFIG_BFIN_SIR0
875 &bfin_sir0_device,
876 #endif
877 #ifdef CONFIG_BFIN_SIR1
878 &bfin_sir1_device,
879 #endif
880 #ifdef CONFIG_BFIN_SIR2
881 &bfin_sir2_device,
882 #endif
883 #endif
884
885 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
886 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
887 &bfin_sport0_uart_device,
888 #endif
889 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
890 &bfin_sport1_uart_device,
891 #endif
892 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
893 &bfin_sport2_uart_device,
894 #endif
895 #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
896 &bfin_sport3_uart_device,
897 #endif
898 #endif
899
900 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
901 &bfin_can_device,
902 #endif
903
904 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
905 &smc91x_device,
906 #endif
907
908 #if defined(CONFIG_FB_BFIN_LQ035Q1) || defined(CONFIG_FB_BFIN_LQ035Q1_MODULE)
909 &bfin_lq035q1_device,
910 #endif
911
912 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
913 &bfin_device_gpiokeys,
914 #endif
915
916 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
917 &ezkit_flash_device,
918 #endif
919 };
920
921 static int __init ezkit_init(void)
922 {
923 printk(KERN_INFO "%s(): registering device resources\n", __func__);
924 platform_add_devices(cm_bf538_devices, ARRAY_SIZE(cm_bf538_devices));
925
926 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
927 spi_register_board_info(bf538_spi_board_info,
928 ARRAY_SIZE(bf538_spi_board_info));
929 #endif
930
931 return 0;
932 }
933
934 arch_initcall(ezkit_init);
935
936 static struct platform_device *ezkit_early_devices[] __initdata = {
937 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
938 #ifdef CONFIG_SERIAL_BFIN_UART0
939 &bfin_uart0_device,
940 #endif
941 #ifdef CONFIG_SERIAL_BFIN_UART1
942 &bfin_uart1_device,
943 #endif
944 #ifdef CONFIG_SERIAL_BFIN_UART2
945 &bfin_uart2_device,
946 #endif
947 #endif
948
949 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
950 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
951 &bfin_sport0_uart_device,
952 #endif
953 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
954 &bfin_sport1_uart_device,
955 #endif
956 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
957 &bfin_sport2_uart_device,
958 #endif
959 #ifdef CONFIG_SERIAL_BFIN_SPORT3_UART
960 &bfin_sport3_uart_device,
961 #endif
962 #endif
963 };
964
965 void __init native_machine_early_platform_add_devices(void)
966 {
967 printk(KERN_INFO "register early platform devices\n");
968 early_platform_add_devices(ezkit_early_devices,
969 ARRAY_SIZE(ezkit_early_devices));
970 }
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