arch/blackfin/mach-bf609/boards/ezkit.c

   1 /*
   2  * Copyright 2004-2009 Analog Devices Inc.
   3  *                2005 National ICT Australia (NICTA)
   4  *                      Aidan Williams <aidan@nicta.com.au>
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #include <linux/device.h>
  10 #include <linux/platform_device.h>
  11 #include <linux/mtd/mtd.h>
  12 #include <linux/mtd/partitions.h>
  13 #include <linux/mtd/physmap.h>
  14 #include <linux/spi/spi.h>
  15 #include <linux/spi/flash.h>
  16 #include <linux/irq.h>
  17 #include <linux/i2c.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/usb/musb.h>
  20 #include <asm/bfin6xx_spi.h>
  21 #include <asm/dma.h>
  22 #include <asm/gpio.h>
  23 #include <asm/nand.h>
  24 #include <asm/dpmc.h>
  25 #include <asm/portmux.h>
  26 #include <asm/bfin_sdh.h>
  27 #include <linux/input.h>
  28 #include <linux/spi/ad7877.h>
  29
  30 /*
  31  * Name the Board for the /proc/cpuinfo
  32  */
  33 const char bfin_board_name[] = "ADI BF609-EZKIT";
  34
  35 /*
  36  *  Driver needs to know address, irq and flag pin.
  37  */
  38
  39 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  40 #include <linux/usb/isp1760.h>
  41 static struct resource bfin_isp1760_resources[] = {
  42         [0] = {
  43                 .start  = 0x2C0C0000,
  44                 .end    = 0x2C0C0000 + 0xfffff,
  45                 .flags  = IORESOURCE_MEM,
  46         },
  47         [1] = {
  48                 .start  = IRQ_PG7,
  49                 .end    = IRQ_PG7,
  50                 .flags  = IORESOURCE_IRQ,
  51         },
  52 };
  53
  54 static struct isp1760_platform_data isp1760_priv = {
  55         .is_isp1761 = 0,
  56         .bus_width_16 = 1,
  57         .port1_otg = 0,
  58         .analog_oc = 0,
  59         .dack_polarity_high = 0,
  60         .dreq_polarity_high = 0,
  61 };
  62
  63 static struct platform_device bfin_isp1760_device = {
  64         .name           = "isp1760",
  65         .id             = 0,
  66         .dev = {
  67                 .platform_data = &isp1760_priv,
  68         },
  69         .num_resources  = ARRAY_SIZE(bfin_isp1760_resources),
  70         .resource       = bfin_isp1760_resources,
  71 };
  72 #endif
  73
  74 #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
  75 #include <asm/bfin_rotary.h>
  76
  77 static struct bfin_rotary_platform_data bfin_rotary_data = {
  78         /*.rotary_up_key     = KEY_UP,*/
  79         /*.rotary_down_key   = KEY_DOWN,*/
  80         .rotary_rel_code   = REL_WHEEL,
  81         .rotary_button_key = KEY_ENTER,
  82         .debounce          = 10,        /* 0..17 */
  83         .mode              = ROT_QUAD_ENC | ROT_DEBE,
  84 };
  85
  86 static struct resource bfin_rotary_resources[] = {
  87         {
  88                 .start = IRQ_CNT,
  89                 .end = IRQ_CNT,
  90                 .flags = IORESOURCE_IRQ,
  91         },
  92 };
  93
  94 static struct platform_device bfin_rotary_device = {
  95         .name           = "bfin-rotary",
  96         .id             = -1,
  97         .num_resources  = ARRAY_SIZE(bfin_rotary_resources),
  98         .resource       = bfin_rotary_resources,
  99         .dev            = {
 100                 .platform_data = &bfin_rotary_data,
 101         },
 102 };
 103 #endif
 104
 105 #if defined(CONFIG_STMMAC_ETH) || defined(CONFIG_STMMAC_ETH_MODULE)
 106 #include <linux/stmmac.h>
 107
 108 static unsigned short pins[] = P_RMII0;
 109
 110 static struct stmmac_mdio_bus_data phy_private_data = {
 111         .bus_id = 0,
 112         .phy_mask = 1,
 113 };
 114
 115 static struct plat_stmmacenet_data eth_private_data = {
 116         .bus_id   = 0,
 117         .enh_desc = 1,
 118         .phy_addr = 1,
 119         .mdio_bus_data = &phy_private_data,
 120 };
 121
 122 static struct platform_device bfin_eth_device = {
 123         .name           = "stmmaceth",
 124         .id             = 0,
 125         .num_resources  = 2,
 126         .resource       = (struct resource[]) {
 127                 {
 128                         .start  = EMAC0_MACCFG,
 129                         .end    = EMAC0_MACCFG + 0x1274,
 130                         .flags  = IORESOURCE_MEM,
 131                 },
 132                 {
 133                         .name   = "macirq",
 134                         .start  = IRQ_EMAC0_STAT,
 135                         .end    = IRQ_EMAC0_STAT,
 136                         .flags  = IORESOURCE_IRQ,
 137                 },
 138         },
 139         .dev = {
 140                 .power.can_wakeup = 1,
 141                 .platform_data = &eth_private_data,
 142         }
 143 };
 144 #endif
 145
 146 #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
 147 #include <linux/input/adxl34x.h>
 148 static const struct adxl34x_platform_data adxl34x_info = {
 149         .x_axis_offset = 0,
 150         .y_axis_offset = 0,
 151         .z_axis_offset = 0,
 152         .tap_threshold = 0x31,
 153         .tap_duration = 0x10,
 154         .tap_latency = 0x60,
 155         .tap_window = 0xF0,
 156         .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
 157         .act_axis_control = 0xFF,
 158         .activity_threshold = 5,
 159         .inactivity_threshold = 3,
 160         .inactivity_time = 4,
 161         .free_fall_threshold = 0x7,
 162         .free_fall_time = 0x20,
 163         .data_rate = 0x8,
 164         .data_range = ADXL_FULL_RES,
 165
 166         .ev_type = EV_ABS,
 167         .ev_code_x = ABS_X,             /* EV_REL */
 168         .ev_code_y = ABS_Y,             /* EV_REL */
 169         .ev_code_z = ABS_Z,             /* EV_REL */
 170
 171         .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
 172
 173 /*      .ev_code_ff = KEY_F,*/          /* EV_KEY */
 174 /*      .ev_code_act_inactivity = KEY_A,*/      /* EV_KEY */
 175         .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
 176         .fifo_mode = ADXL_FIFO_STREAM,
 177         .orientation_enable = ADXL_EN_ORIENTATION_3D,
 178         .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
 179         .divisor_length = ADXL_LP_FILTER_DIVISOR_16,
 180         /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
 181         .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
 182 };
 183 #endif
 184
 185 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 186 static struct platform_device rtc_device = {
 187         .name = "rtc-bfin",
 188         .id   = -1,
 189 };
 190 #endif
 191
 192 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 193 #ifdef CONFIG_SERIAL_BFIN_UART0
 194 static struct resource bfin_uart0_resources[] = {
 195         {
 196                 .start = UART0_REVID,
 197                 .end = UART0_RXDIV+4,
 198                 .flags = IORESOURCE_MEM,
 199         },
 200         {
 201                 .start = IRQ_UART0_TX,
 202                 .end = IRQ_UART0_TX,
 203                 .flags = IORESOURCE_IRQ,
 204         },
 205         {
 206                 .start = IRQ_UART0_RX,
 207                 .end = IRQ_UART0_RX,
 208                 .flags = IORESOURCE_IRQ,
 209         },
 210         {
 211                 .start = IRQ_UART0_STAT,
 212                 .end = IRQ_UART0_STAT,
 213                 .flags = IORESOURCE_IRQ,
 214         },
 215         {
 216                 .start = CH_UART0_TX,
 217                 .end = CH_UART0_TX,
 218                 .flags = IORESOURCE_DMA,
 219         },
 220         {
 221                 .start = CH_UART0_RX,
 222                 .end = CH_UART0_RX,
 223                 .flags = IORESOURCE_DMA,
 224         },
 225 #ifdef CONFIG_BFIN_UART0_CTSRTS
 226         {       /* CTS pin -- 0 means not supported */
 227                 .start = GPIO_PD10,
 228                 .end = GPIO_PD10,
 229                 .flags = IORESOURCE_IO,
 230         },
 231         {       /* RTS pin -- 0 means not supported */
 232                 .start = GPIO_PD9,
 233                 .end = GPIO_PD9,
 234                 .flags = IORESOURCE_IO,
 235         },
 236 #endif
 237 };
 238
 239 static unsigned short bfin_uart0_peripherals[] = {
 240         P_UART0_TX, P_UART0_RX,
 241 #ifdef CONFIG_BFIN_UART0_CTSRTS
 242         P_UART0_RTS, P_UART0_CTS,
 243 #endif
 244         0
 245 };
 246
 247 static struct platform_device bfin_uart0_device = {
 248         .name = "bfin-uart",
 249         .id = 0,
 250         .num_resources = ARRAY_SIZE(bfin_uart0_resources),
 251         .resource = bfin_uart0_resources,
 252         .dev = {
 253                 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
 254         },
 255 };
 256 #endif
 257 #ifdef CONFIG_SERIAL_BFIN_UART1
 258 static struct resource bfin_uart1_resources[] = {
 259         {
 260                 .start = UART1_REVID,
 261                 .end = UART1_RXDIV+4,
 262                 .flags = IORESOURCE_MEM,
 263         },
 264         {
 265                 .start = IRQ_UART1_TX,
 266                 .end = IRQ_UART1_TX,
 267                 .flags = IORESOURCE_IRQ,
 268         },
 269         {
 270                 .start = IRQ_UART1_RX,
 271                 .end = IRQ_UART1_RX,
 272                 .flags = IORESOURCE_IRQ,
 273         },
 274         {
 275                 .start = IRQ_UART1_STAT,
 276                 .end = IRQ_UART1_STAT,
 277                 .flags = IORESOURCE_IRQ,
 278         },
 279         {
 280                 .start = CH_UART1_TX,
 281                 .end = CH_UART1_TX,
 282                 .flags = IORESOURCE_DMA,
 283         },
 284         {
 285                 .start = CH_UART1_RX,
 286                 .end = CH_UART1_RX,
 287                 .flags = IORESOURCE_DMA,
 288         },
 289 #ifdef CONFIG_BFIN_UART1_CTSRTS
 290         {       /* CTS pin -- 0 means not supported */
 291                 .start = GPIO_PG13,
 292                 .end = GPIO_PG13,
 293                 .flags = IORESOURCE_IO,
 294         },
 295         {       /* RTS pin -- 0 means not supported */
 296                 .start = GPIO_PG10,
 297                 .end = GPIO_PG10,
 298                 .flags = IORESOURCE_IO,
 299         },
 300 #endif
 301 };
 302
 303 static unsigned short bfin_uart1_peripherals[] = {
 304         P_UART1_TX, P_UART1_RX,
 305 #ifdef CONFIG_BFIN_UART1_CTSRTS
 306         P_UART1_RTS, P_UART1_CTS,
 307 #endif
 308         0
 309 };
 310
 311 static struct platform_device bfin_uart1_device = {
 312         .name = "bfin-uart",
 313         .id = 1,
 314         .num_resources = ARRAY_SIZE(bfin_uart1_resources),
 315         .resource = bfin_uart1_resources,
 316         .dev = {
 317                 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
 318         },
 319 };
 320 #endif
 321 #endif
 322
 323 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 324 #ifdef CONFIG_BFIN_SIR0
 325 static struct resource bfin_sir0_resources[] = {
 326         {
 327                 .start = 0xFFC00400,
 328                 .end = 0xFFC004FF,
 329                 .flags = IORESOURCE_MEM,
 330         },
 331         {
 332                 .start = IRQ_UART0_TX,
 333                 .end = IRQ_UART0_TX+1,
 334                 .flags = IORESOURCE_IRQ,
 335         },
 336         {
 337                 .start = CH_UART0_TX,
 338                 .end = CH_UART0_TX+1,
 339                 .flags = IORESOURCE_DMA,
 340         },
 341 };
 342 static struct platform_device bfin_sir0_device = {
 343         .name = "bfin_sir",
 344         .id = 0,
 345         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 346         .resource = bfin_sir0_resources,
 347 };
 348 #endif
 349 #ifdef CONFIG_BFIN_SIR1
 350 static struct resource bfin_sir1_resources[] = {
 351         {
 352                 .start = 0xFFC02000,
 353                 .end = 0xFFC020FF,
 354                 .flags = IORESOURCE_MEM,
 355         },
 356         {
 357                 .start = IRQ_UART1_TX,
 358                 .end = IRQ_UART1_TX+1,
 359                 .flags = IORESOURCE_IRQ,
 360         },
 361         {
 362                 .start = CH_UART1_TX,
 363                 .end = CH_UART1_TX+1,
 364                 .flags = IORESOURCE_DMA,
 365         },
 366 };
 367 static struct platform_device bfin_sir1_device = {
 368         .name = "bfin_sir",
 369         .id = 1,
 370         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 371         .resource = bfin_sir1_resources,
 372 };
 373 #endif
 374 #endif
 375
 376 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
 377 static struct resource musb_resources[] = {
 378         [0] = {
 379                 .start  = 0xFFCC1000,
 380                 .end    = 0xFFCC1398,
 381                 .flags  = IORESOURCE_MEM,
 382         },
 383         [1] = { /* general IRQ */
 384                 .start  = IRQ_USB_STAT,
 385                 .end    = IRQ_USB_STAT,
 386                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 387                 .name   = "mc"
 388         },
 389         [2] = { /* DMA IRQ */
 390                 .start  = IRQ_USB_DMA,
 391                 .end    = IRQ_USB_DMA,
 392                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 393                 .name   = "dma"
 394         },
 395 };
 396
 397 static struct musb_hdrc_config musb_config = {
 398         .multipoint     = 1,
 399         .dyn_fifo       = 0,
 400         .dma            = 1,
 401         .num_eps        = 16,
 402         .dma_channels   = 8,
 403         .clkin          = 48,           /* musb CLKIN in MHZ */
 404 };
 405
 406 static struct musb_hdrc_platform_data musb_plat = {
 407 #if defined(CONFIG_USB_MUSB_HDRC) && defined(CONFIG_USB_GADGET_MUSB_HDRC)
 408         .mode           = MUSB_OTG,
 409 #elif defined(CONFIG_USB_MUSB_HDRC)
 410         .mode           = MUSB_HOST,
 411 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
 412         .mode           = MUSB_PERIPHERAL,
 413 #endif
 414         .config         = &musb_config,
 415 };
 416
 417 static u64 musb_dmamask = ~(u32)0;
 418
 419 static struct platform_device musb_device = {
 420         .name           = "musb-blackfin",
 421         .id             = 0,
 422         .dev = {
 423                 .dma_mask               = &musb_dmamask,
 424                 .coherent_dma_mask      = 0xffffffff,
 425                 .platform_data          = &musb_plat,
 426         },
 427         .num_resources  = ARRAY_SIZE(musb_resources),
 428         .resource       = musb_resources,
 429 };
 430 #endif
 431
 432 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 433 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 434 static struct resource bfin_sport0_uart_resources[] = {
 435         {
 436                 .start = SPORT0_TCR1,
 437                 .end = SPORT0_MRCS3+4,
 438                 .flags = IORESOURCE_MEM,
 439         },
 440         {
 441                 .start = IRQ_SPORT0_RX,
 442                 .end = IRQ_SPORT0_RX+1,
 443                 .flags = IORESOURCE_IRQ,
 444         },
 445         {
 446                 .start = IRQ_SPORT0_ERROR,
 447                 .end = IRQ_SPORT0_ERROR,
 448                 .flags = IORESOURCE_IRQ,
 449         },
 450 };
 451
 452 static unsigned short bfin_sport0_peripherals[] = {
 453         P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
 454         P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
 455 };
 456
 457 static struct platform_device bfin_sport0_uart_device = {
 458         .name = "bfin-sport-uart",
 459         .id = 0,
 460         .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
 461         .resource = bfin_sport0_uart_resources,
 462         .dev = {
 463                 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
 464         },
 465 };
 466 #endif
 467 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 468 static struct resource bfin_sport1_uart_resources[] = {
 469         {
 470                 .start = SPORT1_TCR1,
 471                 .end = SPORT1_MRCS3+4,
 472                 .flags = IORESOURCE_MEM,
 473         },
 474         {
 475                 .start = IRQ_SPORT1_RX,
 476                 .end = IRQ_SPORT1_RX+1,
 477                 .flags = IORESOURCE_IRQ,
 478         },
 479         {
 480                 .start = IRQ_SPORT1_ERROR,
 481                 .end = IRQ_SPORT1_ERROR,
 482                 .flags = IORESOURCE_IRQ,
 483         },
 484 };
 485
 486 static unsigned short bfin_sport1_peripherals[] = {
 487         P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
 488         P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
 489 };
 490
 491 static struct platform_device bfin_sport1_uart_device = {
 492         .name = "bfin-sport-uart",
 493         .id = 1,
 494         .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
 495         .resource = bfin_sport1_uart_resources,
 496         .dev = {
 497                 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
 498         },
 499 };
 500 #endif
 501 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
 502 static struct resource bfin_sport2_uart_resources[] = {
 503         {
 504                 .start = SPORT2_TCR1,
 505                 .end = SPORT2_MRCS3+4,
 506                 .flags = IORESOURCE_MEM,
 507         },
 508         {
 509                 .start = IRQ_SPORT2_RX,
 510                 .end = IRQ_SPORT2_RX+1,
 511                 .flags = IORESOURCE_IRQ,
 512         },
 513         {
 514                 .start = IRQ_SPORT2_ERROR,
 515                 .end = IRQ_SPORT2_ERROR,
 516                 .flags = IORESOURCE_IRQ,
 517         },
 518 };
 519
 520 static unsigned short bfin_sport2_peripherals[] = {
 521         P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,
 522         P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0
 523 };
 524
 525 static struct platform_device bfin_sport2_uart_device = {
 526         .name = "bfin-sport-uart",
 527         .id = 2,
 528         .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),
 529         .resource = bfin_sport2_uart_resources,
 530         .dev = {
 531                 .platform_data = &bfin_sport2_peripherals, /* Passed to driver */
 532         },
 533 };
 534 #endif
 535 #endif
 536
 537 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
 538
 539 static unsigned short bfin_can0_peripherals[] = {
 540         P_CAN0_RX, P_CAN0_TX, 0
 541 };
 542
 543 static struct resource bfin_can0_resources[] = {
 544         {
 545                 .start = 0xFFC00A00,
 546                 .end = 0xFFC00FFF,
 547                 .flags = IORESOURCE_MEM,
 548         },
 549         {
 550                 .start = IRQ_CAN0_RX,
 551                 .end = IRQ_CAN0_RX,
 552                 .flags = IORESOURCE_IRQ,
 553         },
 554         {
 555                 .start = IRQ_CAN0_TX,
 556                 .end = IRQ_CAN0_TX,
 557                 .flags = IORESOURCE_IRQ,
 558         },
 559         {
 560                 .start = IRQ_CAN0_STAT,
 561                 .end = IRQ_CAN0_STAT,
 562                 .flags = IORESOURCE_IRQ,
 563         },
 564 };
 565
 566 static struct platform_device bfin_can0_device = {
 567         .name = "bfin_can",
 568         .id = 0,
 569         .num_resources = ARRAY_SIZE(bfin_can0_resources),
 570         .resource = bfin_can0_resources,
 571         .dev = {
 572                 .platform_data = &bfin_can0_peripherals, /* Passed to driver */
 573         },
 574 };
 575
 576 #endif
 577
 578 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
 579 static struct mtd_partition partition_info[] = {
 580         {
 581                 .name = "bootloader(nand)",
 582                 .offset = 0,
 583                 .size = 0x80000,
 584         }, {
 585                 .name = "linux kernel(nand)",
 586                 .offset = MTDPART_OFS_APPEND,
 587                 .size = 4 * 1024 * 1024,
 588         },
 589         {
 590                 .name = "file system(nand)",
 591                 .offset = MTDPART_OFS_APPEND,
 592                 .size = MTDPART_SIZ_FULL,
 593         },
 594 };
 595
 596 static struct bf5xx_nand_platform bfin_nand_platform = {
 597         .data_width = NFC_NWIDTH_8,
 598         .partitions = partition_info,
 599         .nr_partitions = ARRAY_SIZE(partition_info),
 600         .rd_dly = 3,
 601         .wr_dly = 3,
 602 };
 603
 604 static struct resource bfin_nand_resources[] = {
 605         {
 606                 .start = 0xFFC03B00,
 607                 .end = 0xFFC03B4F,
 608                 .flags = IORESOURCE_MEM,
 609         },
 610         {
 611                 .start = CH_NFC,
 612                 .end = CH_NFC,
 613                 .flags = IORESOURCE_IRQ,
 614         },
 615 };
 616
 617 static struct platform_device bfin_nand_device = {
 618         .name = "bfin-nand",
 619         .id = 0,
 620         .num_resources = ARRAY_SIZE(bfin_nand_resources),
 621         .resource = bfin_nand_resources,
 622         .dev = {
 623                 .platform_data = &bfin_nand_platform,
 624         },
 625 };
 626 #endif
 627
 628 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
 629
 630 static struct bfin_sd_host bfin_sdh_data = {
 631         .dma_chan = CH_RSI,
 632         .irq_int0 = IRQ_RSI_INT0,
 633         .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},
 634 };
 635
 636 static struct platform_device bfin_sdh_device = {
 637         .name = "bfin-sdh",
 638         .id = 0,
 639         .dev = {
 640                 .platform_data = &bfin_sdh_data,
 641         },
 642 };
 643 #endif
 644
 645 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 646 static struct mtd_partition ezkit_partitions[] = {
 647         {
 648                 .name       = "bootloader(nor)",
 649                 .size       = 0x80000,
 650                 .offset     = 0,
 651         }, {
 652                 .name       = "linux kernel(nor)",
 653                 .size       = 0x400000,
 654                 .offset     = MTDPART_OFS_APPEND,
 655         }, {
 656                 .name       = "file system(nor)",
 657                 .size       = 0x1000000 - 0x80000 - 0x400000,
 658                 .offset     = MTDPART_OFS_APPEND,
 659         },
 660 };
 661
 662 int bf609_nor_flash_init(struct platform_device *dev)
 663 {
 664 #define CONFIG_SMC_GCTL_VAL     0x00000010
 665         const unsigned short pins[] = {
 666                 P_A3, P_A4, P_A5, P_A6, P_A7, P_A8, P_A9, P_A10, P_A11, P_A12,
 667                 P_A13, P_A14, P_A15, P_A16, P_A17, P_A18, P_A19, P_A20, P_A21,
 668                 P_A22, P_A23, P_A24, P_A25, P_NORCK, 0,
 669         };
 670
 671         peripheral_request_list(pins, "smc0");
 672
 673         bfin_write32(SMC_GCTL, CONFIG_SMC_GCTL_VAL);
 674         bfin_write32(SMC_B0CTL, 0x01002011);
 675         bfin_write32(SMC_B0TIM, 0x08170977);
 676         bfin_write32(SMC_B0ETIM, 0x00092231);
 677         return 0;
 678 }
 679
 680 static struct physmap_flash_data ezkit_flash_data = {
 681         .width      = 2,
 682         .parts      = ezkit_partitions,
 683         .init       = bf609_nor_flash_init,
 684         .nr_parts   = ARRAY_SIZE(ezkit_partitions),
 685 };
 686
 687 static struct resource ezkit_flash_resource = {
 688         .start = 0xb0000000,
 689         .end   = 0xb0ffffff,
 690         .flags = IORESOURCE_MEM,
 691 };
 692
 693 static struct platform_device ezkit_flash_device = {
 694         .name          = "physmap-flash",
 695         .id            = 0,
 696         .dev = {
 697                 .platform_data = &ezkit_flash_data,
 698         },
 699         .num_resources = 1,
 700         .resource      = &ezkit_flash_resource,
 701 };
 702 #endif
 703
 704 #if defined(CONFIG_MTD_M25P80) \
 705         || defined(CONFIG_MTD_M25P80_MODULE)
 706 /* SPI flash chip (w25q32) */
 707 static struct mtd_partition bfin_spi_flash_partitions[] = {
 708         {
 709                 .name = "bootloader(spi)",
 710                 .size = 0x00080000,
 711                 .offset = 0,
 712                 .mask_flags = MTD_CAP_ROM
 713         }, {
 714                 .name = "linux kernel(spi)",
 715                 .size = 0x00180000,
 716                 .offset = MTDPART_OFS_APPEND,
 717         }, {
 718                 .name = "file system(spi)",
 719                 .size = MTDPART_SIZ_FULL,
 720                 .offset = MTDPART_OFS_APPEND,
 721         }
 722 };
 723
 724 static struct flash_platform_data bfin_spi_flash_data = {
 725         .name = "m25p80",
 726         .parts = bfin_spi_flash_partitions,
 727         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 728         .type = "w25q32",
 729 };
 730
 731 static struct bfin6xx_spi_chip spi_flash_chip_info = {
 732         .enable_dma = true,         /* use dma transfer with this chip*/
 733 };
 734 #endif
 735
 736 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 737 static struct bfin6xx_spi_chip spidev_chip_info = {
 738         .enable_dma = true,
 739 };
 740 #endif
 741
 742 #if defined(CONFIG_SND_BF6XX_I2S) || defined(CONFIG_SND_BF6XX_I2S_MODULE)
 743 static struct platform_device bfin_i2s_pcm = {
 744         .name = "bfin-i2s-pcm-audio",
 745         .id = -1,
 746 };
 747 #endif
 748
 749 #if defined(CONFIG_SND_BF6XX_SOC_I2S) || \
 750         defined(CONFIG_SND_BF6XX_SOC_I2S_MODULE)
 751 #include <asm/bfin_sport3.h>
 752 static struct resource bfin_snd_resources[] = {
 753         {
 754                 .start = SPORT0_CTL_A,
 755                 .end = SPORT0_CTL_A,
 756                 .flags = IORESOURCE_MEM,
 757         },
 758         {
 759                 .start = SPORT0_CTL_B,
 760                 .end = SPORT0_CTL_B,
 761                 .flags = IORESOURCE_MEM,
 762         },
 763         {
 764                 .start = CH_SPORT0_TX,
 765                 .end = CH_SPORT0_TX,
 766                 .flags = IORESOURCE_DMA,
 767         },
 768         {
 769                 .start = CH_SPORT0_RX,
 770                 .end = CH_SPORT0_RX,
 771                 .flags = IORESOURCE_DMA,
 772         },
 773         {
 774                 .start = IRQ_SPORT0_TX_STAT,
 775                 .end = IRQ_SPORT0_TX_STAT,
 776                 .flags = IORESOURCE_IRQ,
 777         },
 778         {
 779                 .start = IRQ_SPORT0_RX_STAT,
 780                 .end = IRQ_SPORT0_RX_STAT,
 781                 .flags = IORESOURCE_IRQ,
 782         },
 783 };
 784
 785 static const unsigned short bfin_snd_pin[] = {
 786         P_SPORT0_ACLK, P_SPORT0_AFS, P_SPORT0_AD0, P_SPORT0_BCLK,
 787         P_SPORT0_BFS, P_SPORT0_BD0, 0,
 788 };
 789
 790 static struct bfin_snd_platform_data bfin_snd_data = {
 791         .pin_req = bfin_snd_pin,
 792 };
 793
 794 static struct platform_device bfin_i2s = {
 795         .name = "bfin-i2s",
 796         .num_resources = ARRAY_SIZE(bfin_snd_resources),
 797         .resource = bfin_snd_resources,
 798         .dev = {
 799                 .platform_data = &bfin_snd_data,
 800         },
 801 };
 802 #endif
 803
 804 #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61) || \
 805         defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61_MODULE)
 806 static struct platform_device adau1761_device = {
 807         .name = "bfin-eval-adau1x61",
 808 };
 809 #endif
 810
 811 #if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
 812 #include <sound/adau17x1.h>
 813 static struct adau1761_platform_data adau1761_info = {
 814         .lineout_mode = ADAU1761_OUTPUT_MODE_LINE,
 815         .headphone_mode = ADAU1761_OUTPUT_MODE_HEADPHONE_CAPLESS,
 816 };
 817 #endif
 818
 819 #if defined(CONFIG_VIDEO_BLACKFIN_CAPTURE) \
 820         || defined(CONFIG_VIDEO_BLACKFIN_CAPTURE_MODULE)
 821 #include <linux/videodev2.h>
 822 #include <media/blackfin/bfin_capture.h>
 823 #include <media/blackfin/ppi.h>
 824
 825 static const unsigned short ppi_req[] = {
 826         P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3,
 827         P_PPI0_D4, P_PPI0_D5, P_PPI0_D6, P_PPI0_D7,
 828         P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,
 829         0,
 830 };
 831
 832 static const struct ppi_info ppi_info = {
 833         .type = PPI_TYPE_EPPI3,
 834         .dma_ch = CH_EPPI0_CH0,
 835         .irq_err = IRQ_EPPI0_STAT,
 836         .base = (void __iomem *)EPPI0_STAT,
 837         .pin_req = ppi_req,
 838 };
 839
 840 #if defined(CONFIG_VIDEO_VS6624) \
 841         || defined(CONFIG_VIDEO_VS6624_MODULE)
 842 static struct v4l2_input vs6624_inputs[] = {
 843         {
 844                 .index = 0,
 845                 .name = "Camera",
 846                 .type = V4L2_INPUT_TYPE_CAMERA,
 847                 .std = V4L2_STD_UNKNOWN,
 848         },
 849 };
 850
 851 static struct bcap_route vs6624_routes[] = {
 852         {
 853                 .input = 0,
 854                 .output = 0,
 855         },
 856 };
 857
 858 static const unsigned vs6624_ce_pin = GPIO_PD1;
 859
 860 static struct bfin_capture_config bfin_capture_data = {
 861         .card_name = "BF609",
 862         .inputs = vs6624_inputs,
 863         .num_inputs = ARRAY_SIZE(vs6624_inputs),
 864         .routes = vs6624_routes,
 865         .i2c_adapter_id = 0,
 866         .board_info = {
 867                 .type = "vs6624",
 868                 .addr = 0x10,
 869                 .platform_data = (void *)&vs6624_ce_pin,
 870         },
 871         .ppi_info = &ppi_info,
 872         .ppi_control = (PACK_EN | DLEN_8 | EPPI_CTL_FS1HI_FS2HI
 873                         | EPPI_CTL_POLC3 | EPPI_CTL_SYNC2 | EPPI_CTL_NON656),
 874         .blank_clocks = 8,
 875 };
 876 #endif
 877
 878 static struct platform_device bfin_capture_device = {
 879         .name = "bfin_capture",
 880         .dev = {
 881                 .platform_data = &bfin_capture_data,
 882         },
 883 };
 884 #endif
 885
 886 #if defined(CONFIG_BFIN_CRC)
 887 #define BFIN_CRC_NAME "bfin-crc"
 888
 889 static struct resource bfin_crc0_resources[] = {
 890         {
 891                 .start = REG_CRC0_CTL,
 892                 .end = REG_CRC0_REVID+4,
 893                 .flags = IORESOURCE_MEM,
 894         },
 895         {
 896                 .start = IRQ_CRC0_DCNTEXP,
 897                 .end = IRQ_CRC0_DCNTEXP,
 898                 .flags = IORESOURCE_IRQ,
 899         },
 900         {
 901                 .start = CH_MEM_STREAM0_SRC_CRC0,
 902                 .end = CH_MEM_STREAM0_SRC_CRC0,
 903                 .flags = IORESOURCE_DMA,
 904         },
 905         {
 906                 .start = CH_MEM_STREAM0_DEST_CRC0,
 907                 .end = CH_MEM_STREAM0_DEST_CRC0,
 908                 .flags = IORESOURCE_DMA,
 909         },
 910 };
 911
 912 static struct platform_device bfin_crc0_device = {
 913         .name = BFIN_CRC_NAME,
 914         .id = 0,
 915         .num_resources = ARRAY_SIZE(bfin_crc0_resources),
 916         .resource = bfin_crc0_resources,
 917 };
 918
 919 static struct resource bfin_crc1_resources[] = {
 920         {
 921                 .start = REG_CRC1_CTL,
 922                 .end = REG_CRC1_REVID+4,
 923                 .flags = IORESOURCE_MEM,
 924         },
 925         {
 926                 .start = IRQ_CRC1_DCNTEXP,
 927                 .end = IRQ_CRC1_DCNTEXP,
 928                 .flags = IORESOURCE_IRQ,
 929         },
 930         {
 931                 .start = CH_MEM_STREAM1_SRC_CRC1,
 932                 .end = CH_MEM_STREAM1_SRC_CRC1,
 933                 .flags = IORESOURCE_DMA,
 934         },
 935         {
 936                 .start = CH_MEM_STREAM1_DEST_CRC1,
 937                 .end = CH_MEM_STREAM1_DEST_CRC1,
 938                 .flags = IORESOURCE_DMA,
 939         },
 940 };
 941
 942 static struct platform_device bfin_crc1_device = {
 943         .name = BFIN_CRC_NAME,
 944         .id = 1,
 945         .num_resources = ARRAY_SIZE(bfin_crc1_resources),
 946         .resource = bfin_crc1_resources,
 947 };
 948 #endif
 949
 950 #if defined(CONFIG_CRYPTO_DEV_BFIN_CRC)
 951 #define BFIN_CRYPTO_CRC_NAME            "bfin-hmac-crc"
 952 #define BFIN_CRYPTO_CRC_POLY_DATA       0x5c5c5c5c
 953
 954 static struct resource bfin_crypto_crc_resources[] = {
 955         {
 956                 .start = REG_CRC0_CTL,
 957                 .end = REG_CRC0_REVID+4,
 958                 .flags = IORESOURCE_MEM,
 959         },
 960         {
 961                 .start = IRQ_CRC0_DCNTEXP,
 962                 .end = IRQ_CRC0_DCNTEXP,
 963                 .flags = IORESOURCE_IRQ,
 964         },
 965         {
 966                 .start = CH_MEM_STREAM0_SRC_CRC0,
 967                 .end = CH_MEM_STREAM0_SRC_CRC0,
 968                 .flags = IORESOURCE_DMA,
 969         },
 970         {
 971                 .start = CH_MEM_STREAM0_DEST_CRC0,
 972                 .end = CH_MEM_STREAM0_DEST_CRC0,
 973                 .flags = IORESOURCE_DMA,
 974         },
 975 };
 976
 977 static struct platform_device bfin_crypto_crc_device = {
 978         .name = BFIN_CRYPTO_CRC_NAME,
 979         .id = 0,
 980         .num_resources = ARRAY_SIZE(bfin_crypto_crc_resources),
 981         .resource = bfin_crypto_crc_resources,
 982         .dev = {
 983                 .platform_data = (void *)BFIN_CRYPTO_CRC_POLY_DATA,
 984         },
 985 };
 986 #endif
 987
 988 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
 989 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
 990         .model                  = 7877,
 991         .vref_delay_usecs       = 50,   /* internal, no capacitor */
 992         .x_plate_ohms           = 419,
 993         .y_plate_ohms           = 486,
 994         .pressure_max           = 1000,
 995         .pressure_min           = 0,
 996         .stopacq_polarity       = 1,
 997         .first_conversion_delay = 3,
 998         .acquisition_time       = 1,
 999         .averaging              = 1,
1000         .pen_down_acc_interval  = 1,
1001 };
1002 #endif
1003
1004 static struct spi_board_info bfin_spi_board_info[] __initdata = {
1005 #if defined(CONFIG_MTD_M25P80) \
1006         || defined(CONFIG_MTD_M25P80_MODULE)
1007         {
1008                 /* the modalias must be the same as spi device driver name */
1009                 .modalias = "m25p80", /* Name of spi_driver for this device */
1010                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
1011                 .bus_num = 0, /* Framework bus number */
1012                 .chip_select = 1, /* SPI_SSEL1*/
1013                 .platform_data = &bfin_spi_flash_data,
1014                 .controller_data = &spi_flash_chip_info,
1015                 .mode = SPI_MODE_3,
1016         },
1017 #endif
1018 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
1019         {
1020                 .modalias               = "ad7877",
1021                 .platform_data          = &bfin_ad7877_ts_info,
1022                 .irq                    = IRQ_PD9,
1023                 .max_speed_hz           = 12500000,     /* max spi clock (SCK) speed in HZ */
1024                 .bus_num                = 0,
1025                 .chip_select            = 4,
1026         },
1027 #endif
1028 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
1029         {
1030                 .modalias = "spidev",
1031                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
1032                 .bus_num = 0,
1033                 .chip_select = 1,
1034                 .controller_data = &spidev_chip_info,
1035         },
1036 #endif
1037 #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
1038         {
1039                 .modalias               = "adxl34x",
1040                 .platform_data          = &adxl34x_info,
1041                 .irq                    = IRQ_PC5,
1042                 .max_speed_hz           = 5000000,     /* max spi clock (SCK) speed in HZ */
1043                 .bus_num                = 1,
1044                 .chip_select            = 2,
1045                 .mode = SPI_MODE_3,
1046         },
1047 #endif
1048 };
1049 #if defined(CONFIG_SPI_BFIN6XX) || defined(CONFIG_SPI_BFIN6XX_MODULE)
1050 /* SPI (0) */
1051 static struct resource bfin_spi0_resource[] = {
1052         {
1053                 .start = SPI0_REGBASE,
1054                 .end   = SPI0_REGBASE + 0xFF,
1055                 .flags = IORESOURCE_MEM,
1056         },
1057         {
1058                 .start = CH_SPI0_TX,
1059                 .end   = CH_SPI0_TX,
1060                 .flags = IORESOURCE_DMA,
1061         },
1062         {
1063                 .start = CH_SPI0_RX,
1064                 .end   = CH_SPI0_RX,
1065                 .flags = IORESOURCE_DMA,
1066         },
1067 };
1068
1069 /* SPI (1) */
1070 static struct resource bfin_spi1_resource[] = {
1071         {
1072                 .start = SPI1_REGBASE,
1073                 .end   = SPI1_REGBASE + 0xFF,
1074                 .flags = IORESOURCE_MEM,
1075         },
1076         {
1077                 .start = CH_SPI1_TX,
1078                 .end   = CH_SPI1_TX,
1079                 .flags = IORESOURCE_DMA,
1080         },
1081         {
1082                 .start = CH_SPI1_RX,
1083                 .end   = CH_SPI1_RX,
1084                 .flags = IORESOURCE_DMA,
1085         },
1086
1087 };
1088
1089 /* SPI controller data */
1090 static struct bfin6xx_spi_master bf60x_spi_master_info0 = {
1091         .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
1092         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1093 };
1094
1095 static struct platform_device bf60x_spi_master0 = {
1096         .name = "bfin-spi",
1097         .id = 0, /* Bus number */
1098         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
1099         .resource = bfin_spi0_resource,
1100         .dev = {
1101                 .platform_data = &bf60x_spi_master_info0, /* Passed to driver */
1102         },
1103 };
1104
1105 static struct bfin6xx_spi_master bf60x_spi_master_info1 = {
1106         .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
1107         .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
1108 };
1109
1110 static struct platform_device bf60x_spi_master1 = {
1111         .name = "bfin-spi",
1112         .id = 1, /* Bus number */
1113         .num_resources = ARRAY_SIZE(bfin_spi1_resource),
1114         .resource = bfin_spi1_resource,
1115         .dev = {
1116                 .platform_data = &bf60x_spi_master_info1, /* Passed to driver */
1117         },
1118 };
1119 #endif  /* spi master and devices */
1120
1121 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1122 static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
1123
1124 static struct resource bfin_twi0_resource[] = {
1125         [0] = {
1126                 .start = TWI0_CLKDIV,
1127                 .end   = TWI0_CLKDIV + 0xFF,
1128                 .flags = IORESOURCE_MEM,
1129         },
1130         [1] = {
1131                 .start = IRQ_TWI0,
1132                 .end   = IRQ_TWI0,
1133                 .flags = IORESOURCE_IRQ,
1134         },
1135 };
1136
1137 static struct platform_device i2c_bfin_twi0_device = {
1138         .name = "i2c-bfin-twi",
1139         .id = 0,
1140         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
1141         .resource = bfin_twi0_resource,
1142         .dev = {
1143                 .platform_data = &bfin_twi0_pins,
1144         },
1145 };
1146
1147 static const u16 bfin_twi1_pins[] = {P_TWI1_SCL, P_TWI1_SDA, 0};
1148
1149 static struct resource bfin_twi1_resource[] = {
1150         [0] = {
1151                 .start = TWI1_CLKDIV,
1152                 .end   = TWI1_CLKDIV + 0xFF,
1153                 .flags = IORESOURCE_MEM,
1154         },
1155         [1] = {
1156                 .start = IRQ_TWI1,
1157                 .end   = IRQ_TWI1,
1158                 .flags = IORESOURCE_IRQ,
1159         },
1160 };
1161
1162 static struct platform_device i2c_bfin_twi1_device = {
1163         .name = "i2c-bfin-twi",
1164         .id = 1,
1165         .num_resources = ARRAY_SIZE(bfin_twi1_resource),
1166         .resource = bfin_twi1_resource,
1167         .dev = {
1168                 .platform_data = &bfin_twi1_pins,
1169         },
1170 };
1171 #endif
1172
1173 static struct i2c_board_info __initdata bfin_i2c_board_info0[] = {
1174 #if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
1175         {
1176                 I2C_BOARD_INFO("adxl34x", 0x53),
1177                 .irq = IRQ_PC5,
1178                 .platform_data = (void *)&adxl34x_info,
1179         },
1180 #endif
1181 #if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
1182         {
1183                 I2C_BOARD_INFO("adau1761", 0x38),
1184                 .platform_data = (void *)&adau1761_info
1185         },
1186 #endif
1187 };
1188
1189 static struct i2c_board_info __initdata bfin_i2c_board_info1[] = {
1190 };
1191
1192 static const unsigned int cclk_vlev_datasheet[] =
1193 {
1194 /*
1195  * Internal VLEV BF54XSBBC1533
1196  ****temporarily using these values until data sheet is updated
1197  */
1198         VRPAIR(VLEV_085, 150000000),
1199         VRPAIR(VLEV_090, 250000000),
1200         VRPAIR(VLEV_110, 276000000),
1201         VRPAIR(VLEV_115, 301000000),
1202         VRPAIR(VLEV_120, 525000000),
1203         VRPAIR(VLEV_125, 550000000),
1204         VRPAIR(VLEV_130, 600000000),
1205 };
1206
1207 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
1208         .tuple_tab = cclk_vlev_datasheet,
1209         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
1210         .vr_settling_time = 25 /* us */,
1211 };
1212
1213 static struct platform_device bfin_dpmc = {
1214         .name = "bfin dpmc",
1215         .dev = {
1216                 .platform_data = &bfin_dmpc_vreg_data,
1217         },
1218 };
1219
1220 static struct platform_device *ezkit_devices[] __initdata = {
1221
1222         &bfin_dpmc,
1223
1224 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
1225         &rtc_device,
1226 #endif
1227
1228 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
1229 #ifdef CONFIG_SERIAL_BFIN_UART0
1230         &bfin_uart0_device,
1231 #endif
1232 #ifdef CONFIG_SERIAL_BFIN_UART1
1233         &bfin_uart1_device,
1234 #endif
1235 #endif
1236
1237 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
1238 #ifdef CONFIG_BFIN_SIR0
1239         &bfin_sir0_device,
1240 #endif
1241 #ifdef CONFIG_BFIN_SIR1
1242         &bfin_sir1_device,
1243 #endif
1244 #endif
1245
1246 #if defined(CONFIG_STMMAC_ETH) || defined(CONFIG_STMMAC_ETH_MODULE)
1247         &bfin_eth_device,
1248 #endif
1249
1250 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
1251         &musb_device,
1252 #endif
1253
1254 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
1255         &bfin_isp1760_device,
1256 #endif
1257
1258 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
1259 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1260         &bfin_sport0_uart_device,
1261 #endif
1262 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1263         &bfin_sport1_uart_device,
1264 #endif
1265 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
1266         &bfin_sport2_uart_device,
1267 #endif
1268 #endif
1269
1270 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
1271         &bfin_can0_device,
1272 #endif
1273
1274 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
1275         &bfin_nand_device,
1276 #endif
1277
1278 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
1279         &bfin_sdh_device,
1280 #endif
1281
1282 #if defined(CONFIG_SPI_BFIN6XX) || defined(CONFIG_SPI_BFIN6XX_MODULE)
1283         &bf60x_spi_master0,
1284         &bf60x_spi_master1,
1285 #endif
1286
1287 #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
1288         &bfin_rotary_device,
1289 #endif
1290
1291 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1292         &i2c_bfin_twi0_device,
1293 #if !defined(CONFIG_BF542)
1294         &i2c_bfin_twi1_device,
1295 #endif
1296 #endif
1297
1298 #if defined(CONFIG_BFIN_CRC)
1299         &bfin_crc0_device,
1300         &bfin_crc1_device,
1301 #endif
1302 #if defined(CONFIG_CRYPTO_DEV_BFIN_CRC)
1303         &bfin_crypto_crc_device,
1304 #endif
1305
1306 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1307         &bfin_device_gpiokeys,
1308 #endif
1309
1310 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
1311         &ezkit_flash_device,
1312 #endif
1313 #if defined(CONFIG_SND_BF6XX_I2S) || defined(CONFIG_SND_BF6XX_I2S_MODULE)
1314         &bfin_i2s_pcm,
1315 #endif
1316 #if defined(CONFIG_SND_BF6XX_SOC_I2S) || \
1317         defined(CONFIG_SND_BF6XX_SOC_I2S_MODULE)
1318         &bfin_i2s,
1319 #endif
1320 #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61) || \
1321         defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61_MODULE)
1322         &adau1761_device,
1323 #endif
1324 #if defined(CONFIG_VIDEO_BLACKFIN_CAPTURE) \
1325         || defined(CONFIG_VIDEO_BLACKFIN_CAPTURE_MODULE)
1326         &bfin_capture_device,
1327 #endif
1328 };
1329
1330 static int __init ezkit_init(void)
1331 {
1332         printk(KERN_INFO "%s(): registering device resources\n", __func__);
1333
1334         i2c_register_board_info(0, bfin_i2c_board_info0,
1335                                 ARRAY_SIZE(bfin_i2c_board_info0));
1336         i2c_register_board_info(1, bfin_i2c_board_info1,
1337                                 ARRAY_SIZE(bfin_i2c_board_info1));
1338
1339 #if defined(CONFIG_STMMAC_ETH) || defined(CONFIG_STMMAC_ETH_MODULE)
1340         if (!peripheral_request_list(pins, "emac0"))
1341                 printk(KERN_ERR "%s(): request emac pins failed\n", __func__);
1342 #endif
1343
1344         platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices));
1345
1346         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
1347
1348         return 0;
1349 }
1350
1351 arch_initcall(ezkit_init);
1352
1353 static struct platform_device *ezkit_early_devices[] __initdata = {
1354 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1355 #ifdef CONFIG_SERIAL_BFIN_UART0
1356         &bfin_uart0_device,
1357 #endif
1358 #ifdef CONFIG_SERIAL_BFIN_UART1
1359         &bfin_uart1_device,
1360 #endif
1361 #endif
1362
1363 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
1364 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1365         &bfin_sport0_uart_device,
1366 #endif
1367 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1368         &bfin_sport1_uart_device,
1369 #endif
1370 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
1371         &bfin_sport2_uart_device,
1372 #endif
1373 #endif
1374 };
1375
1376 void __init native_machine_early_platform_add_devices(void)
1377 {
1378         printk(KERN_INFO "register early platform devices\n");
1379         early_platform_add_devices(ezkit_early_devices,
1380                 ARRAY_SIZE(ezkit_early_devices));
1381 }