2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2005 National ICT Australia (NICTA)
4 * Aidan Williams <aidan@nicta.com.au>
6 * Licensed under the GPL-2 or later.
9 #include <linux/device.h>
10 #include <linux/platform_device.h>
11 #include <linux/mtd/mtd.h>
12 #include <linux/mtd/partitions.h>
13 #include <linux/mtd/physmap.h>
14 #include <linux/spi/spi.h>
15 #include <linux/spi/flash.h>
16 #include <linux/irq.h>
17 #include <linux/i2c.h>
18 #include <linux/interrupt.h>
19 #include <linux/usb/musb.h>
20 #include <linux/pinctrl/machine.h>
21 #include <linux/pinctrl/pinconf-generic.h>
22 #include <linux/platform_data/pinctrl-adi2.h>
23 #include <linux/spi/adi_spi3.h>
28 #include <asm/portmux.h>
29 #include <asm/bfin_sdh.h>
30 #include <linux/input.h>
31 #include <linux/spi/ad7877.h>
34 * Name the Board for the /proc/cpuinfo
36 const char bfin_board_name
[] = "ADI BF609-EZKIT";
39 * Driver needs to know address, irq and flag pin.
42 #if IS_ENABLED(CONFIG_USB_ISP1760_HCD)
43 #include <linux/usb/isp1760.h>
44 static struct resource bfin_isp1760_resources
[] = {
47 .end
= 0x2C0C0000 + 0xfffff,
48 .flags
= IORESOURCE_MEM
,
53 .flags
= IORESOURCE_IRQ
,
57 static struct isp1760_platform_data isp1760_priv
= {
62 .dack_polarity_high
= 0,
63 .dreq_polarity_high
= 0,
66 static struct platform_device bfin_isp1760_device
= {
70 .platform_data
= &isp1760_priv
,
72 .num_resources
= ARRAY_SIZE(bfin_isp1760_resources
),
73 .resource
= bfin_isp1760_resources
,
77 #if IS_ENABLED(CONFIG_INPUT_BFIN_ROTARY)
78 #include <asm/bfin_rotary.h>
80 static struct bfin_rotary_platform_data bfin_rotary_data
= {
81 /*.rotary_up_key = KEY_UP,*/
82 /*.rotary_down_key = KEY_DOWN,*/
83 .rotary_rel_code
= REL_WHEEL
,
84 .rotary_button_key
= KEY_ENTER
,
85 .debounce
= 10, /* 0..17 */
86 .mode
= ROT_QUAD_ENC
| ROT_DEBE
,
89 static struct resource bfin_rotary_resources
[] = {
93 .flags
= IORESOURCE_IRQ
,
97 static struct platform_device bfin_rotary_device
= {
98 .name
= "bfin-rotary",
100 .num_resources
= ARRAY_SIZE(bfin_rotary_resources
),
101 .resource
= bfin_rotary_resources
,
103 .platform_data
= &bfin_rotary_data
,
108 #if IS_ENABLED(CONFIG_STMMAC_ETH)
109 #include <linux/stmmac.h>
110 #include <linux/phy.h>
112 static struct stmmac_mdio_bus_data phy_private_data
= {
116 static struct stmmac_dma_cfg eth_dma_cfg
= {
120 int stmmac_ptp_clk_init(struct platform_device
*pdev
, void *priv
)
122 bfin_write32(PADS0_EMAC_PTP_CLKSEL
, 0);
126 static struct plat_stmmacenet_data eth_private_data
= {
131 .mdio_bus_data
= &phy_private_data
,
132 .dma_cfg
= ð_dma_cfg
,
133 .force_thresh_dma_mode
= 1,
134 .interface
= PHY_INTERFACE_MODE_RMII
,
135 .init
= stmmac_ptp_clk_init
,
138 static struct platform_device bfin_eth_device
= {
142 .resource
= (struct resource
[]) {
144 .start
= EMAC0_MACCFG
,
145 .end
= EMAC0_MACCFG
+ 0x1274,
146 .flags
= IORESOURCE_MEM
,
150 .start
= IRQ_EMAC0_STAT
,
151 .end
= IRQ_EMAC0_STAT
,
152 .flags
= IORESOURCE_IRQ
,
156 .power
.can_wakeup
= 1,
157 .platform_data
= ð_private_data
,
162 #if IS_ENABLED(CONFIG_INPUT_ADXL34X)
163 #include <linux/input/adxl34x.h>
164 static const struct adxl34x_platform_data adxl34x_info
= {
168 .tap_threshold
= 0x31,
169 .tap_duration
= 0x10,
172 .tap_axis_control
= ADXL_TAP_X_EN
| ADXL_TAP_Y_EN
| ADXL_TAP_Z_EN
,
173 .act_axis_control
= 0xFF,
174 .activity_threshold
= 5,
175 .inactivity_threshold
= 3,
176 .inactivity_time
= 4,
177 .free_fall_threshold
= 0x7,
178 .free_fall_time
= 0x20,
180 .data_range
= ADXL_FULL_RES
,
183 .ev_code_x
= ABS_X
, /* EV_REL */
184 .ev_code_y
= ABS_Y
, /* EV_REL */
185 .ev_code_z
= ABS_Z
, /* EV_REL */
187 .ev_code_tap
= {BTN_TOUCH
, BTN_TOUCH
, BTN_TOUCH
}, /* EV_KEY x,y,z */
189 /* .ev_code_ff = KEY_F,*/ /* EV_KEY */
190 /* .ev_code_act_inactivity = KEY_A,*/ /* EV_KEY */
191 .power_mode
= ADXL_AUTO_SLEEP
| ADXL_LINK
,
192 .fifo_mode
= ADXL_FIFO_STREAM
,
193 .orientation_enable
= ADXL_EN_ORIENTATION_3D
,
194 .deadzone_angle
= ADXL_DEADZONE_ANGLE_10p8
,
195 .divisor_length
= ADXL_LP_FILTER_DIVISOR_16
,
196 /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
197 .ev_codes_orient_3d
= {BTN_Z
, BTN_Y
, BTN_X
, BTN_A
, BTN_B
, BTN_C
},
201 #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
202 static struct platform_device rtc_device
= {
208 #if IS_ENABLED(CONFIG_SERIAL_BFIN)
209 #ifdef CONFIG_SERIAL_BFIN_UART0
210 static struct resource bfin_uart0_resources
[] = {
212 .start
= UART0_REVID
,
213 .end
= UART0_RXDIV
+4,
214 .flags
= IORESOURCE_MEM
,
216 #ifdef CONFIG_EARLY_PRINTK
220 .flags
= IORESOURCE_REG
,
225 .flags
= IORESOURCE_REG
,
229 .start
= IRQ_UART0_TX
,
231 .flags
= IORESOURCE_IRQ
,
234 .start
= IRQ_UART0_RX
,
236 .flags
= IORESOURCE_IRQ
,
239 .start
= IRQ_UART0_STAT
,
240 .end
= IRQ_UART0_STAT
,
241 .flags
= IORESOURCE_IRQ
,
244 .start
= CH_UART0_TX
,
246 .flags
= IORESOURCE_DMA
,
249 .start
= CH_UART0_RX
,
251 .flags
= IORESOURCE_DMA
,
253 #ifdef CONFIG_BFIN_UART0_CTSRTS
254 { /* CTS pin -- 0 means not supported */
257 .flags
= IORESOURCE_IO
,
259 { /* RTS pin -- 0 means not supported */
262 .flags
= IORESOURCE_IO
,
267 static unsigned short bfin_uart0_peripherals
[] = {
268 P_UART0_TX
, P_UART0_RX
,
269 #ifdef CONFIG_BFIN_UART0_CTSRTS
270 P_UART0_RTS
, P_UART0_CTS
,
275 static struct platform_device bfin_uart0_device
= {
278 .num_resources
= ARRAY_SIZE(bfin_uart0_resources
),
279 .resource
= bfin_uart0_resources
,
281 .platform_data
= &bfin_uart0_peripherals
, /* Passed to driver */
285 #ifdef CONFIG_SERIAL_BFIN_UART1
286 static struct resource bfin_uart1_resources
[] = {
288 .start
= UART1_REVID
,
289 .end
= UART1_RXDIV
+4,
290 .flags
= IORESOURCE_MEM
,
292 #ifdef CONFIG_EARLY_PRINTK
294 .start
= PORTG_FER_SET
,
295 .end
= PORTG_FER_SET
+2,
296 .flags
= IORESOURCE_REG
,
300 .start
= IRQ_UART1_TX
,
302 .flags
= IORESOURCE_IRQ
,
305 .start
= IRQ_UART1_RX
,
307 .flags
= IORESOURCE_IRQ
,
310 .start
= IRQ_UART1_STAT
,
311 .end
= IRQ_UART1_STAT
,
312 .flags
= IORESOURCE_IRQ
,
315 .start
= CH_UART1_TX
,
317 .flags
= IORESOURCE_DMA
,
320 .start
= CH_UART1_RX
,
322 .flags
= IORESOURCE_DMA
,
324 #ifdef CONFIG_BFIN_UART1_CTSRTS
325 { /* CTS pin -- 0 means not supported */
328 .flags
= IORESOURCE_IO
,
330 { /* RTS pin -- 0 means not supported */
333 .flags
= IORESOURCE_IO
,
338 static unsigned short bfin_uart1_peripherals
[] = {
339 P_UART1_TX
, P_UART1_RX
,
340 #ifdef CONFIG_BFIN_UART1_CTSRTS
341 P_UART1_RTS
, P_UART1_CTS
,
346 static struct platform_device bfin_uart1_device
= {
349 .num_resources
= ARRAY_SIZE(bfin_uart1_resources
),
350 .resource
= bfin_uart1_resources
,
352 .platform_data
= &bfin_uart1_peripherals
, /* Passed to driver */
358 #if IS_ENABLED(CONFIG_BFIN_SIR)
359 #ifdef CONFIG_BFIN_SIR0
360 static struct resource bfin_sir0_resources
[] = {
364 .flags
= IORESOURCE_MEM
,
367 .start
= IRQ_UART0_TX
,
368 .end
= IRQ_UART0_TX
+1,
369 .flags
= IORESOURCE_IRQ
,
372 .start
= CH_UART0_TX
,
373 .end
= CH_UART0_TX
+1,
374 .flags
= IORESOURCE_DMA
,
377 static struct platform_device bfin_sir0_device
= {
380 .num_resources
= ARRAY_SIZE(bfin_sir0_resources
),
381 .resource
= bfin_sir0_resources
,
384 #ifdef CONFIG_BFIN_SIR1
385 static struct resource bfin_sir1_resources
[] = {
389 .flags
= IORESOURCE_MEM
,
392 .start
= IRQ_UART1_TX
,
393 .end
= IRQ_UART1_TX
+1,
394 .flags
= IORESOURCE_IRQ
,
397 .start
= CH_UART1_TX
,
398 .end
= CH_UART1_TX
+1,
399 .flags
= IORESOURCE_DMA
,
402 static struct platform_device bfin_sir1_device
= {
405 .num_resources
= ARRAY_SIZE(bfin_sir1_resources
),
406 .resource
= bfin_sir1_resources
,
411 #if IS_ENABLED(CONFIG_USB_MUSB_HDRC)
412 static struct resource musb_resources
[] = {
416 .flags
= IORESOURCE_MEM
,
418 [1] = { /* general IRQ */
419 .start
= IRQ_USB_STAT
,
421 .flags
= IORESOURCE_IRQ
| IORESOURCE_IRQ_HIGHLEVEL
,
424 [2] = { /* DMA IRQ */
425 .start
= IRQ_USB_DMA
,
427 .flags
= IORESOURCE_IRQ
| IORESOURCE_IRQ_HIGHLEVEL
,
432 static struct musb_hdrc_config musb_config
= {
438 .clkin
= 48, /* musb CLKIN in MHZ */
441 static struct musb_hdrc_platform_data musb_plat
= {
442 #if defined(CONFIG_USB_MUSB_HDRC) && defined(CONFIG_USB_GADGET_MUSB_HDRC)
444 #elif defined(CONFIG_USB_MUSB_HDRC)
446 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
447 .mode
= MUSB_PERIPHERAL
,
449 .config
= &musb_config
,
452 static u64 musb_dmamask
= ~(u32
)0;
454 static struct platform_device musb_device
= {
455 .name
= "musb-blackfin",
458 .dma_mask
= &musb_dmamask
,
459 .coherent_dma_mask
= 0xffffffff,
460 .platform_data
= &musb_plat
,
462 .num_resources
= ARRAY_SIZE(musb_resources
),
463 .resource
= musb_resources
,
467 #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
468 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
469 static struct resource bfin_sport0_uart_resources
[] = {
471 .start
= SPORT0_TCR1
,
472 .end
= SPORT0_MRCS3
+4,
473 .flags
= IORESOURCE_MEM
,
476 .start
= IRQ_SPORT0_RX
,
477 .end
= IRQ_SPORT0_RX
+1,
478 .flags
= IORESOURCE_IRQ
,
481 .start
= IRQ_SPORT0_ERROR
,
482 .end
= IRQ_SPORT0_ERROR
,
483 .flags
= IORESOURCE_IRQ
,
487 static unsigned short bfin_sport0_peripherals
[] = {
488 P_SPORT0_TFS
, P_SPORT0_DTPRI
, P_SPORT0_TSCLK
, P_SPORT0_RFS
,
489 P_SPORT0_DRPRI
, P_SPORT0_RSCLK
, 0
492 static struct platform_device bfin_sport0_uart_device
= {
493 .name
= "bfin-sport-uart",
495 .num_resources
= ARRAY_SIZE(bfin_sport0_uart_resources
),
496 .resource
= bfin_sport0_uart_resources
,
498 .platform_data
= &bfin_sport0_peripherals
, /* Passed to driver */
502 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
503 static struct resource bfin_sport1_uart_resources
[] = {
505 .start
= SPORT1_TCR1
,
506 .end
= SPORT1_MRCS3
+4,
507 .flags
= IORESOURCE_MEM
,
510 .start
= IRQ_SPORT1_RX
,
511 .end
= IRQ_SPORT1_RX
+1,
512 .flags
= IORESOURCE_IRQ
,
515 .start
= IRQ_SPORT1_ERROR
,
516 .end
= IRQ_SPORT1_ERROR
,
517 .flags
= IORESOURCE_IRQ
,
521 static unsigned short bfin_sport1_peripherals
[] = {
522 P_SPORT1_TFS
, P_SPORT1_DTPRI
, P_SPORT1_TSCLK
, P_SPORT1_RFS
,
523 P_SPORT1_DRPRI
, P_SPORT1_RSCLK
, 0
526 static struct platform_device bfin_sport1_uart_device
= {
527 .name
= "bfin-sport-uart",
529 .num_resources
= ARRAY_SIZE(bfin_sport1_uart_resources
),
530 .resource
= bfin_sport1_uart_resources
,
532 .platform_data
= &bfin_sport1_peripherals
, /* Passed to driver */
536 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
537 static struct resource bfin_sport2_uart_resources
[] = {
539 .start
= SPORT2_TCR1
,
540 .end
= SPORT2_MRCS3
+4,
541 .flags
= IORESOURCE_MEM
,
544 .start
= IRQ_SPORT2_RX
,
545 .end
= IRQ_SPORT2_RX
+1,
546 .flags
= IORESOURCE_IRQ
,
549 .start
= IRQ_SPORT2_ERROR
,
550 .end
= IRQ_SPORT2_ERROR
,
551 .flags
= IORESOURCE_IRQ
,
555 static unsigned short bfin_sport2_peripherals
[] = {
556 P_SPORT2_TFS
, P_SPORT2_DTPRI
, P_SPORT2_TSCLK
, P_SPORT2_RFS
,
557 P_SPORT2_DRPRI
, P_SPORT2_RSCLK
, P_SPORT2_DRSEC
, P_SPORT2_DTSEC
, 0
560 static struct platform_device bfin_sport2_uart_device
= {
561 .name
= "bfin-sport-uart",
563 .num_resources
= ARRAY_SIZE(bfin_sport2_uart_resources
),
564 .resource
= bfin_sport2_uart_resources
,
566 .platform_data
= &bfin_sport2_peripherals
, /* Passed to driver */
572 #if IS_ENABLED(CONFIG_CAN_BFIN)
574 static unsigned short bfin_can0_peripherals
[] = {
575 P_CAN0_RX
, P_CAN0_TX
, 0
578 static struct resource bfin_can0_resources
[] = {
582 .flags
= IORESOURCE_MEM
,
585 .start
= IRQ_CAN0_RX
,
587 .flags
= IORESOURCE_IRQ
,
590 .start
= IRQ_CAN0_TX
,
592 .flags
= IORESOURCE_IRQ
,
595 .start
= IRQ_CAN0_STAT
,
596 .end
= IRQ_CAN0_STAT
,
597 .flags
= IORESOURCE_IRQ
,
601 static struct platform_device bfin_can0_device
= {
604 .num_resources
= ARRAY_SIZE(bfin_can0_resources
),
605 .resource
= bfin_can0_resources
,
607 .platform_data
= &bfin_can0_peripherals
, /* Passed to driver */
613 #if IS_ENABLED(CONFIG_MTD_NAND_BF5XX)
614 static struct mtd_partition partition_info
[] = {
616 .name
= "bootloader(nand)",
620 .name
= "linux kernel(nand)",
621 .offset
= MTDPART_OFS_APPEND
,
622 .size
= 4 * 1024 * 1024,
625 .name
= "file system(nand)",
626 .offset
= MTDPART_OFS_APPEND
,
627 .size
= MTDPART_SIZ_FULL
,
631 static struct bf5xx_nand_platform bfin_nand_platform
= {
632 .data_width
= NFC_NWIDTH_8
,
633 .partitions
= partition_info
,
634 .nr_partitions
= ARRAY_SIZE(partition_info
),
639 static struct resource bfin_nand_resources
[] = {
643 .flags
= IORESOURCE_MEM
,
648 .flags
= IORESOURCE_IRQ
,
652 static struct platform_device bfin_nand_device
= {
655 .num_resources
= ARRAY_SIZE(bfin_nand_resources
),
656 .resource
= bfin_nand_resources
,
658 .platform_data
= &bfin_nand_platform
,
663 #if IS_ENABLED(CONFIG_SDH_BFIN)
665 static struct bfin_sd_host bfin_sdh_data
= {
667 .irq_int0
= IRQ_RSI_INT0
,
668 .pin_req
= {P_RSI_DATA0
, P_RSI_DATA1
, P_RSI_DATA2
, P_RSI_DATA3
, P_RSI_CMD
, P_RSI_CLK
, 0},
671 static struct platform_device bfin_sdh_device
= {
675 .platform_data
= &bfin_sdh_data
,
680 #if IS_ENABLED(CONFIG_MTD_PHYSMAP)
681 static struct mtd_partition ezkit_partitions
[] = {
683 .name
= "bootloader(nor)",
687 .name
= "linux kernel(nor)",
689 .offset
= MTDPART_OFS_APPEND
,
691 .name
= "file system(nor)",
692 .size
= 0x1000000 - 0x80000 - 0x400000,
693 .offset
= MTDPART_OFS_APPEND
,
697 int bf609_nor_flash_init(struct platform_device
*pdev
)
699 #define CONFIG_SMC_GCTL_VAL 0x00000010
701 bfin_write32(SMC_GCTL
, CONFIG_SMC_GCTL_VAL
);
702 bfin_write32(SMC_B0CTL
, 0x01002011);
703 bfin_write32(SMC_B0TIM
, 0x08170977);
704 bfin_write32(SMC_B0ETIM
, 0x00092231);
708 void bf609_nor_flash_exit(struct platform_device
*pdev
)
710 bfin_write32(SMC_GCTL
, 0);
713 static struct physmap_flash_data ezkit_flash_data
= {
715 .parts
= ezkit_partitions
,
716 .init
= bf609_nor_flash_init
,
717 .exit
= bf609_nor_flash_exit
,
718 .nr_parts
= ARRAY_SIZE(ezkit_partitions
),
719 #ifdef CONFIG_ROMKERNEL
720 .probe_type
= "map_rom",
724 static struct resource ezkit_flash_resource
= {
727 .flags
= IORESOURCE_MEM
,
730 static struct platform_device ezkit_flash_device
= {
731 .name
= "physmap-flash",
734 .platform_data
= &ezkit_flash_data
,
737 .resource
= &ezkit_flash_resource
,
741 #if IS_ENABLED(CONFIG_MTD_M25P80)
742 /* SPI flash chip (w25q32) */
743 static struct mtd_partition bfin_spi_flash_partitions
[] = {
745 .name
= "bootloader(spi)",
748 .mask_flags
= MTD_CAP_ROM
750 .name
= "linux kernel(spi)",
752 .offset
= MTDPART_OFS_APPEND
,
754 .name
= "file system(spi)",
755 .size
= MTDPART_SIZ_FULL
,
756 .offset
= MTDPART_OFS_APPEND
,
760 static struct flash_platform_data bfin_spi_flash_data
= {
762 .parts
= bfin_spi_flash_partitions
,
763 .nr_parts
= ARRAY_SIZE(bfin_spi_flash_partitions
),
767 static struct adi_spi3_chip spi_flash_chip_info
= {
768 .enable_dma
= true, /* use dma transfer with this chip*/
772 #if IS_ENABLED(CONFIG_SPI_SPIDEV)
773 static struct adi_spi3_chip spidev_chip_info
= {
778 #if IS_ENABLED(CONFIG_SND_BF5XX_I2S)
779 static struct platform_device bfin_i2s_pcm
= {
780 .name
= "bfin-i2s-pcm-audio",
785 #if IS_ENABLED(CONFIG_SND_BF6XX_SOC_I2S)
786 #include <asm/bfin_sport3.h>
787 static struct resource bfin_snd_resources
[] = {
789 .start
= SPORT0_CTL_A
,
791 .flags
= IORESOURCE_MEM
,
794 .start
= SPORT0_CTL_B
,
796 .flags
= IORESOURCE_MEM
,
799 .start
= CH_SPORT0_TX
,
801 .flags
= IORESOURCE_DMA
,
804 .start
= CH_SPORT0_RX
,
806 .flags
= IORESOURCE_DMA
,
809 .start
= IRQ_SPORT0_TX_STAT
,
810 .end
= IRQ_SPORT0_TX_STAT
,
811 .flags
= IORESOURCE_IRQ
,
814 .start
= IRQ_SPORT0_RX_STAT
,
815 .end
= IRQ_SPORT0_RX_STAT
,
816 .flags
= IORESOURCE_IRQ
,
820 static const unsigned short bfin_snd_pin
[] = {
821 P_SPORT0_ACLK
, P_SPORT0_AFS
, P_SPORT0_AD0
, P_SPORT0_BCLK
,
822 P_SPORT0_BFS
, P_SPORT0_BD0
, 0,
825 static struct bfin_snd_platform_data bfin_snd_data
= {
826 .pin_req
= bfin_snd_pin
,
829 static struct platform_device bfin_i2s
= {
831 .num_resources
= ARRAY_SIZE(bfin_snd_resources
),
832 .resource
= bfin_snd_resources
,
834 .platform_data
= &bfin_snd_data
,
839 #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD1836)
840 static const char * const ad1836_link
[] = {
844 static struct platform_device bfin_ad1836_machine
= {
845 .name
= "bfin-snd-ad1836",
848 .platform_data
= (void *)ad1836_link
,
853 #if IS_ENABLED(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61)
854 static struct platform_device adau1761_device
= {
855 .name
= "bfin-eval-adau1x61",
859 #if IS_ENABLED(CONFIG_SND_SOC_ADAU1761)
860 #include <sound/adau17x1.h>
861 static struct adau1761_platform_data adau1761_info
= {
862 .lineout_mode
= ADAU1761_OUTPUT_MODE_LINE
,
863 .headphone_mode
= ADAU1761_OUTPUT_MODE_HEADPHONE_CAPLESS
,
867 #if IS_ENABLED(CONFIG_VIDEO_BLACKFIN_CAPTURE)
868 #include <linux/videodev2.h>
869 #include <media/blackfin/bfin_capture.h>
870 #include <media/blackfin/ppi.h>
872 static const unsigned short ppi_req
[] = {
873 P_PPI0_D0
, P_PPI0_D1
, P_PPI0_D2
, P_PPI0_D3
,
874 P_PPI0_D4
, P_PPI0_D5
, P_PPI0_D6
, P_PPI0_D7
,
875 P_PPI0_D8
, P_PPI0_D9
, P_PPI0_D10
, P_PPI0_D11
,
876 P_PPI0_D12
, P_PPI0_D13
, P_PPI0_D14
, P_PPI0_D15
,
877 #if !IS_ENABLED(CONFIG_VIDEO_VS6624)
878 P_PPI0_D16
, P_PPI0_D17
, P_PPI0_D18
, P_PPI0_D19
,
879 P_PPI0_D20
, P_PPI0_D21
, P_PPI0_D22
, P_PPI0_D23
,
881 P_PPI0_CLK
, P_PPI0_FS1
, P_PPI0_FS2
,
885 static const struct ppi_info ppi_info
= {
886 .type
= PPI_TYPE_EPPI3
,
887 .dma_ch
= CH_EPPI0_CH0
,
888 .irq_err
= IRQ_EPPI0_STAT
,
889 .base
= (void __iomem
*)EPPI0_STAT
,
893 #if IS_ENABLED(CONFIG_VIDEO_VS6624)
894 static struct v4l2_input vs6624_inputs
[] = {
898 .type
= V4L2_INPUT_TYPE_CAMERA
,
899 .std
= V4L2_STD_UNKNOWN
,
903 static struct bcap_route vs6624_routes
[] = {
910 static const unsigned vs6624_ce_pin
= GPIO_PE4
;
912 static struct bfin_capture_config bfin_capture_data
= {
913 .card_name
= "BF609",
914 .inputs
= vs6624_inputs
,
915 .num_inputs
= ARRAY_SIZE(vs6624_inputs
),
916 .routes
= vs6624_routes
,
921 .platform_data
= (void *)&vs6624_ce_pin
,
923 .ppi_info
= &ppi_info
,
924 .ppi_control
= (PACK_EN
| DLEN_8
| EPPI_CTL_FS1HI_FS2HI
925 | EPPI_CTL_POLC3
| EPPI_CTL_SYNC2
| EPPI_CTL_NON656
),
930 #if IS_ENABLED(CONFIG_VIDEO_ADV7842)
931 #include <media/adv7842.h>
933 static struct v4l2_input adv7842_inputs
[] = {
937 .type
= V4L2_INPUT_TYPE_CAMERA
,
939 .capabilities
= V4L2_IN_CAP_STD
,
944 .type
= V4L2_INPUT_TYPE_CAMERA
,
946 .capabilities
= V4L2_IN_CAP_STD
,
951 .type
= V4L2_INPUT_TYPE_CAMERA
,
952 .capabilities
= V4L2_IN_CAP_DV_TIMINGS
,
957 .type
= V4L2_INPUT_TYPE_CAMERA
,
958 .capabilities
= V4L2_IN_CAP_DV_TIMINGS
,
963 .type
= V4L2_INPUT_TYPE_CAMERA
,
964 .capabilities
= V4L2_IN_CAP_DV_TIMINGS
,
968 static struct bcap_route adv7842_routes
[] = {
972 .ppi_control
= (PACK_EN
| DLEN_8
| EPPI_CTL_FLDSEL
973 | EPPI_CTL_ACTIVE656
),
990 .ppi_control
= (EPPI_CTL_SPLTWRD
| PACK_EN
| DLEN_16
991 | EPPI_CTL_FS1LO_FS2LO
| EPPI_CTL_POLC2
992 | EPPI_CTL_SYNC2
| EPPI_CTL_NON656
),
996 static struct adv7842_output_format adv7842_opf
[] = {
998 .op_ch_sel
= ADV7842_OP_CH_SEL_BRG
,
999 .op_format_sel
= ADV7842_OP_FORMAT_SEL_SDR_ITU656_8
,
1002 .insert_av_codes
= 1,
1005 .op_ch_sel
= ADV7842_OP_CH_SEL_RGB
,
1006 .op_format_sel
= ADV7842_OP_FORMAT_SEL_SDR_ITU656_16
,
1012 static struct adv7842_platform_data adv7842_data
= {
1014 .num_opf
= ARRAY_SIZE(adv7842_opf
),
1015 .ain_sel
= ADV7842_AIN10_11_12_NC_SYNC_4_1
,
1016 .prim_mode
= ADV7842_PRIM_MODE_SDP
,
1017 .vid_std_select
= ADV7842_SDP_VID_STD_CVBS_SD_4x1
,
1018 .hdmi_free_run_enable
= 1,
1019 .sdp_free_run_auto
= 1,
1020 .llc_dll_phase
= 0x10,
1027 .i2c_repeater
= 0x46,
1029 .i2c_infoframe
= 0x48,
1035 static struct bfin_capture_config bfin_capture_data
= {
1036 .card_name
= "BF609",
1037 .inputs
= adv7842_inputs
,
1038 .num_inputs
= ARRAY_SIZE(adv7842_inputs
),
1039 .routes
= adv7842_routes
,
1040 .i2c_adapter_id
= 0,
1044 .platform_data
= (void *)&adv7842_data
,
1046 .ppi_info
= &ppi_info
,
1047 .ppi_control
= (PACK_EN
| DLEN_8
| EPPI_CTL_FLDSEL
1048 | EPPI_CTL_ACTIVE656
),
1052 static struct platform_device bfin_capture_device
= {
1053 .name
= "bfin_capture",
1055 .platform_data
= &bfin_capture_data
,
1060 #if IS_ENABLED(CONFIG_VIDEO_BLACKFIN_DISPLAY)
1061 #include <linux/videodev2.h>
1062 #include <media/blackfin/bfin_display.h>
1063 #include <media/blackfin/ppi.h>
1065 static const unsigned short ppi_req_disp
[] = {
1066 P_PPI0_D0
, P_PPI0_D1
, P_PPI0_D2
, P_PPI0_D3
,
1067 P_PPI0_D4
, P_PPI0_D5
, P_PPI0_D6
, P_PPI0_D7
,
1068 P_PPI0_D8
, P_PPI0_D9
, P_PPI0_D10
, P_PPI0_D11
,
1069 P_PPI0_D12
, P_PPI0_D13
, P_PPI0_D14
, P_PPI0_D15
,
1070 P_PPI0_CLK
, P_PPI0_FS1
, P_PPI0_FS2
,
1074 static const struct ppi_info ppi_info
= {
1075 .type
= PPI_TYPE_EPPI3
,
1076 .dma_ch
= CH_EPPI0_CH0
,
1077 .irq_err
= IRQ_EPPI0_STAT
,
1078 .base
= (void __iomem
*)EPPI0_STAT
,
1079 .pin_req
= ppi_req_disp
,
1082 #if IS_ENABLED(CONFIG_VIDEO_ADV7511)
1083 #include <media/adv7511.h>
1085 static struct v4l2_output adv7511_outputs
[] = {
1089 .type
= V4L2_INPUT_TYPE_CAMERA
,
1090 .capabilities
= V4L2_OUT_CAP_DV_TIMINGS
,
1094 static struct disp_route adv7511_routes
[] = {
1100 static struct adv7511_platform_data adv7511_data
= {
1105 static struct bfin_display_config bfin_display_data
= {
1106 .card_name
= "BF609",
1107 .outputs
= adv7511_outputs
,
1108 .num_outputs
= ARRAY_SIZE(adv7511_outputs
),
1109 .routes
= adv7511_routes
,
1110 .i2c_adapter_id
= 0,
1114 .platform_data
= (void *)&adv7511_data
,
1116 .ppi_info
= &ppi_info
,
1117 .ppi_control
= (EPPI_CTL_SPLTWRD
| PACK_EN
| DLEN_16
1118 | EPPI_CTL_FS1LO_FS2LO
| EPPI_CTL_POLC3
1119 | EPPI_CTL_IFSGEN
| EPPI_CTL_SYNC2
1120 | EPPI_CTL_NON656
| EPPI_CTL_DIR
),
1124 #if IS_ENABLED(CONFIG_VIDEO_ADV7343)
1125 #include <media/adv7343.h>
1127 static struct v4l2_output adv7343_outputs
[] = {
1130 .name
= "Composite",
1131 .type
= V4L2_OUTPUT_TYPE_ANALOG
,
1132 .std
= V4L2_STD_ALL
,
1133 .capabilities
= V4L2_OUT_CAP_STD
,
1138 .type
= V4L2_OUTPUT_TYPE_ANALOG
,
1139 .std
= V4L2_STD_ALL
,
1140 .capabilities
= V4L2_OUT_CAP_STD
,
1144 .name
= "Component",
1145 .type
= V4L2_OUTPUT_TYPE_ANALOG
,
1146 .std
= V4L2_STD_ALL
,
1147 .capabilities
= V4L2_OUT_CAP_STD
,
1152 static struct disp_route adv7343_routes
[] = {
1154 .output
= ADV7343_COMPOSITE_ID
,
1157 .output
= ADV7343_SVIDEO_ID
,
1160 .output
= ADV7343_COMPONENT_ID
,
1164 static struct adv7343_platform_data adv7343_data
= {
1166 .sleep_mode
= false,
1167 .pll_control
= false,
1176 .sd_dac_out1
= false,
1177 .sd_dac_out2
= false,
1181 static struct bfin_display_config bfin_display_data
= {
1182 .card_name
= "BF609",
1183 .outputs
= adv7343_outputs
,
1184 .num_outputs
= ARRAY_SIZE(adv7343_outputs
),
1185 .routes
= adv7343_routes
,
1186 .i2c_adapter_id
= 0,
1190 .platform_data
= (void *)&adv7343_data
,
1192 .ppi_info
= &ppi_info_disp
,
1193 .ppi_control
= (PACK_EN
| DLEN_8
| EPPI_CTL_FS1LO_FS2LO
1194 | EPPI_CTL_POLC3
| EPPI_CTL_BLANKGEN
| EPPI_CTL_SYNC2
1195 | EPPI_CTL_NON656
| EPPI_CTL_DIR
),
1199 static struct platform_device bfin_display_device
= {
1200 .name
= "bfin_display",
1202 .platform_data
= &bfin_display_data
,
1207 #if defined(CONFIG_BFIN_CRC)
1208 #define BFIN_CRC_NAME "bfin-crc"
1210 static struct resource bfin_crc0_resources
[] = {
1212 .start
= REG_CRC0_CTL
,
1213 .end
= REG_CRC0_REVID
+4,
1214 .flags
= IORESOURCE_MEM
,
1217 .start
= IRQ_CRC0_DCNTEXP
,
1218 .end
= IRQ_CRC0_DCNTEXP
,
1219 .flags
= IORESOURCE_IRQ
,
1222 .start
= CH_MEM_STREAM0_SRC_CRC0
,
1223 .end
= CH_MEM_STREAM0_SRC_CRC0
,
1224 .flags
= IORESOURCE_DMA
,
1227 .start
= CH_MEM_STREAM0_DEST_CRC0
,
1228 .end
= CH_MEM_STREAM0_DEST_CRC0
,
1229 .flags
= IORESOURCE_DMA
,
1233 static struct platform_device bfin_crc0_device
= {
1234 .name
= BFIN_CRC_NAME
,
1236 .num_resources
= ARRAY_SIZE(bfin_crc0_resources
),
1237 .resource
= bfin_crc0_resources
,
1240 static struct resource bfin_crc1_resources
[] = {
1242 .start
= REG_CRC1_CTL
,
1243 .end
= REG_CRC1_REVID
+4,
1244 .flags
= IORESOURCE_MEM
,
1247 .start
= IRQ_CRC1_DCNTEXP
,
1248 .end
= IRQ_CRC1_DCNTEXP
,
1249 .flags
= IORESOURCE_IRQ
,
1252 .start
= CH_MEM_STREAM1_SRC_CRC1
,
1253 .end
= CH_MEM_STREAM1_SRC_CRC1
,
1254 .flags
= IORESOURCE_DMA
,
1257 .start
= CH_MEM_STREAM1_DEST_CRC1
,
1258 .end
= CH_MEM_STREAM1_DEST_CRC1
,
1259 .flags
= IORESOURCE_DMA
,
1263 static struct platform_device bfin_crc1_device
= {
1264 .name
= BFIN_CRC_NAME
,
1266 .num_resources
= ARRAY_SIZE(bfin_crc1_resources
),
1267 .resource
= bfin_crc1_resources
,
1271 #if defined(CONFIG_CRYPTO_DEV_BFIN_CRC)
1272 #define BFIN_CRYPTO_CRC_NAME "bfin-hmac-crc"
1273 #define BFIN_CRYPTO_CRC_POLY_DATA 0x5c5c5c5c
1275 static struct resource bfin_crypto_crc_resources
[] = {
1277 .start
= REG_CRC0_CTL
,
1278 .end
= REG_CRC0_REVID
+4,
1279 .flags
= IORESOURCE_MEM
,
1282 .start
= IRQ_CRC0_DCNTEXP
,
1283 .end
= IRQ_CRC0_DCNTEXP
,
1284 .flags
= IORESOURCE_IRQ
,
1287 .start
= CH_MEM_STREAM0_SRC_CRC0
,
1288 .end
= CH_MEM_STREAM0_SRC_CRC0
,
1289 .flags
= IORESOURCE_DMA
,
1293 static struct platform_device bfin_crypto_crc_device
= {
1294 .name
= BFIN_CRYPTO_CRC_NAME
,
1296 .num_resources
= ARRAY_SIZE(bfin_crypto_crc_resources
),
1297 .resource
= bfin_crypto_crc_resources
,
1299 .platform_data
= (void *)BFIN_CRYPTO_CRC_POLY_DATA
,
1304 #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7877)
1305 static const struct ad7877_platform_data bfin_ad7877_ts_info
= {
1307 .vref_delay_usecs
= 50, /* internal, no capacitor */
1308 .x_plate_ohms
= 419,
1309 .y_plate_ohms
= 486,
1310 .pressure_max
= 1000,
1312 .stopacq_polarity
= 1,
1313 .first_conversion_delay
= 3,
1314 .acquisition_time
= 1,
1316 .pen_down_acc_interval
= 1,
1320 #ifdef CONFIG_PINCTRL_ADI2
1322 # define ADI_PINT_DEVNAME "adi-gpio-pint"
1323 # define ADI_GPIO_DEVNAME "adi-gpio"
1324 # define ADI_PINCTRL_DEVNAME "pinctrl-adi2"
1326 static struct platform_device bfin_pinctrl_device
= {
1327 .name
= ADI_PINCTRL_DEVNAME
,
1331 static struct resource bfin_pint0_resources
[] = {
1333 .start
= PINT0_MASK_SET
,
1334 .end
= PINT0_LATCH
+ 3,
1335 .flags
= IORESOURCE_MEM
,
1340 .flags
= IORESOURCE_IRQ
,
1344 static struct platform_device bfin_pint0_device
= {
1345 .name
= ADI_PINT_DEVNAME
,
1347 .num_resources
= ARRAY_SIZE(bfin_pint0_resources
),
1348 .resource
= bfin_pint0_resources
,
1351 static struct resource bfin_pint1_resources
[] = {
1353 .start
= PINT1_MASK_SET
,
1354 .end
= PINT1_LATCH
+ 3,
1355 .flags
= IORESOURCE_MEM
,
1360 .flags
= IORESOURCE_IRQ
,
1364 static struct platform_device bfin_pint1_device
= {
1365 .name
= ADI_PINT_DEVNAME
,
1367 .num_resources
= ARRAY_SIZE(bfin_pint1_resources
),
1368 .resource
= bfin_pint1_resources
,
1371 static struct resource bfin_pint2_resources
[] = {
1373 .start
= PINT2_MASK_SET
,
1374 .end
= PINT2_LATCH
+ 3,
1375 .flags
= IORESOURCE_MEM
,
1380 .flags
= IORESOURCE_IRQ
,
1384 static struct platform_device bfin_pint2_device
= {
1385 .name
= ADI_PINT_DEVNAME
,
1387 .num_resources
= ARRAY_SIZE(bfin_pint2_resources
),
1388 .resource
= bfin_pint2_resources
,
1391 static struct resource bfin_pint3_resources
[] = {
1393 .start
= PINT3_MASK_SET
,
1394 .end
= PINT3_LATCH
+ 3,
1395 .flags
= IORESOURCE_MEM
,
1400 .flags
= IORESOURCE_IRQ
,
1404 static struct platform_device bfin_pint3_device
= {
1405 .name
= ADI_PINT_DEVNAME
,
1407 .num_resources
= ARRAY_SIZE(bfin_pint3_resources
),
1408 .resource
= bfin_pint3_resources
,
1411 static struct resource bfin_pint4_resources
[] = {
1413 .start
= PINT4_MASK_SET
,
1414 .end
= PINT4_LATCH
+ 3,
1415 .flags
= IORESOURCE_MEM
,
1420 .flags
= IORESOURCE_IRQ
,
1424 static struct platform_device bfin_pint4_device
= {
1425 .name
= ADI_PINT_DEVNAME
,
1427 .num_resources
= ARRAY_SIZE(bfin_pint4_resources
),
1428 .resource
= bfin_pint4_resources
,
1431 static struct resource bfin_pint5_resources
[] = {
1433 .start
= PINT5_MASK_SET
,
1434 .end
= PINT5_LATCH
+ 3,
1435 .flags
= IORESOURCE_MEM
,
1440 .flags
= IORESOURCE_IRQ
,
1444 static struct platform_device bfin_pint5_device
= {
1445 .name
= ADI_PINT_DEVNAME
,
1447 .num_resources
= ARRAY_SIZE(bfin_pint5_resources
),
1448 .resource
= bfin_pint5_resources
,
1451 static struct resource bfin_gpa_resources
[] = {
1454 .end
= PORTA_MUX
+ 3,
1455 .flags
= IORESOURCE_MEM
,
1460 .flags
= IORESOURCE_IRQ
,
1464 static struct adi_pinctrl_gpio_platform_data bfin_gpa_pdata
= {
1465 .port_pin_base
= GPIO_PA0
,
1466 .port_width
= GPIO_BANKSIZE
,
1467 .pint_id
= 0, /* PINT0 */
1468 .pint_assign
= true, /* PINT upper 16 bit */
1469 .pint_map
= 0, /* mapping mask in PINT */
1472 static struct platform_device bfin_gpa_device
= {
1473 .name
= ADI_GPIO_DEVNAME
,
1475 .num_resources
= ARRAY_SIZE(bfin_gpa_resources
),
1476 .resource
= bfin_gpa_resources
,
1478 .platform_data
= &bfin_gpa_pdata
, /* Passed to driver */
1482 static struct resource bfin_gpb_resources
[] = {
1485 .end
= PORTB_MUX
+ 3,
1486 .flags
= IORESOURCE_MEM
,
1491 .flags
= IORESOURCE_IRQ
,
1495 static struct adi_pinctrl_gpio_platform_data bfin_gpb_pdata
= {
1496 .port_pin_base
= GPIO_PB0
,
1497 .port_width
= GPIO_BANKSIZE
,
1499 .pint_assign
= false,
1503 static struct platform_device bfin_gpb_device
= {
1504 .name
= ADI_GPIO_DEVNAME
,
1506 .num_resources
= ARRAY_SIZE(bfin_gpb_resources
),
1507 .resource
= bfin_gpb_resources
,
1509 .platform_data
= &bfin_gpb_pdata
, /* Passed to driver */
1513 static struct resource bfin_gpc_resources
[] = {
1516 .end
= PORTC_MUX
+ 3,
1517 .flags
= IORESOURCE_MEM
,
1522 .flags
= IORESOURCE_IRQ
,
1526 static struct adi_pinctrl_gpio_platform_data bfin_gpc_pdata
= {
1527 .port_pin_base
= GPIO_PC0
,
1528 .port_width
= GPIO_BANKSIZE
,
1530 .pint_assign
= false,
1534 static struct platform_device bfin_gpc_device
= {
1535 .name
= ADI_GPIO_DEVNAME
,
1537 .num_resources
= ARRAY_SIZE(bfin_gpc_resources
),
1538 .resource
= bfin_gpc_resources
,
1540 .platform_data
= &bfin_gpc_pdata
, /* Passed to driver */
1544 static struct resource bfin_gpd_resources
[] = {
1547 .end
= PORTD_MUX
+ 3,
1548 .flags
= IORESOURCE_MEM
,
1553 .flags
= IORESOURCE_IRQ
,
1557 static struct adi_pinctrl_gpio_platform_data bfin_gpd_pdata
= {
1558 .port_pin_base
= GPIO_PD0
,
1559 .port_width
= GPIO_BANKSIZE
,
1561 .pint_assign
= false,
1565 static struct platform_device bfin_gpd_device
= {
1566 .name
= ADI_GPIO_DEVNAME
,
1568 .num_resources
= ARRAY_SIZE(bfin_gpd_resources
),
1569 .resource
= bfin_gpd_resources
,
1571 .platform_data
= &bfin_gpd_pdata
, /* Passed to driver */
1575 static struct resource bfin_gpe_resources
[] = {
1578 .end
= PORTE_MUX
+ 3,
1579 .flags
= IORESOURCE_MEM
,
1584 .flags
= IORESOURCE_IRQ
,
1588 static struct adi_pinctrl_gpio_platform_data bfin_gpe_pdata
= {
1589 .port_pin_base
= GPIO_PE0
,
1590 .port_width
= GPIO_BANKSIZE
,
1592 .pint_assign
= false,
1596 static struct platform_device bfin_gpe_device
= {
1597 .name
= ADI_GPIO_DEVNAME
,
1599 .num_resources
= ARRAY_SIZE(bfin_gpe_resources
),
1600 .resource
= bfin_gpe_resources
,
1602 .platform_data
= &bfin_gpe_pdata
, /* Passed to driver */
1606 static struct resource bfin_gpf_resources
[] = {
1609 .end
= PORTF_MUX
+ 3,
1610 .flags
= IORESOURCE_MEM
,
1615 .flags
= IORESOURCE_IRQ
,
1619 static struct adi_pinctrl_gpio_platform_data bfin_gpf_pdata
= {
1620 .port_pin_base
= GPIO_PF0
,
1621 .port_width
= GPIO_BANKSIZE
,
1623 .pint_assign
= false,
1627 static struct platform_device bfin_gpf_device
= {
1628 .name
= ADI_GPIO_DEVNAME
,
1630 .num_resources
= ARRAY_SIZE(bfin_gpf_resources
),
1631 .resource
= bfin_gpf_resources
,
1633 .platform_data
= &bfin_gpf_pdata
, /* Passed to driver */
1637 static struct resource bfin_gpg_resources
[] = {
1640 .end
= PORTG_MUX
+ 3,
1641 .flags
= IORESOURCE_MEM
,
1646 .flags
= IORESOURCE_IRQ
,
1650 static struct adi_pinctrl_gpio_platform_data bfin_gpg_pdata
= {
1651 .port_pin_base
= GPIO_PG0
,
1652 .port_width
= GPIO_BANKSIZE
,
1654 .pint_assign
= false,
1658 static struct platform_device bfin_gpg_device
= {
1659 .name
= ADI_GPIO_DEVNAME
,
1661 .num_resources
= ARRAY_SIZE(bfin_gpg_resources
),
1662 .resource
= bfin_gpg_resources
,
1664 .platform_data
= &bfin_gpg_pdata
, /* Passed to driver */
1670 #if IS_ENABLED(CONFIG_KEYBOARD_GPIO)
1671 #include <linux/input.h>
1672 #include <linux/gpio_keys.h>
1674 static struct gpio_keys_button bfin_gpio_keys_table
[] = {
1675 {BTN_0
, GPIO_PB10
, 1, "gpio-keys: BTN0"},
1676 {BTN_1
, GPIO_PE1
, 1, "gpio-keys: BTN1"},
1679 static struct gpio_keys_platform_data bfin_gpio_keys_data
= {
1680 .buttons
= bfin_gpio_keys_table
,
1681 .nbuttons
= ARRAY_SIZE(bfin_gpio_keys_table
),
1684 static struct platform_device bfin_device_gpiokeys
= {
1685 .name
= "gpio-keys",
1687 .platform_data
= &bfin_gpio_keys_data
,
1692 static struct spi_board_info bfin_spi_board_info
[] __initdata
= {
1693 #if IS_ENABLED(CONFIG_MTD_M25P80)
1695 /* the modalias must be the same as spi device driver name */
1696 .modalias
= "m25p80", /* Name of spi_driver for this device */
1697 .max_speed_hz
= 25000000, /* max spi clock (SCK) speed in HZ */
1698 .bus_num
= 0, /* Framework bus number */
1699 .chip_select
= MAX_CTRL_CS
+ GPIO_PD11
, /* SPI_SSEL1*/
1700 .platform_data
= &bfin_spi_flash_data
,
1701 .controller_data
= &spi_flash_chip_info
,
1705 #if IS_ENABLED(CONFIG_TOUCHSCREEN_AD7877)
1707 .modalias
= "ad7877",
1708 .platform_data
= &bfin_ad7877_ts_info
,
1710 .max_speed_hz
= 12500000, /* max spi clock (SCK) speed in HZ */
1712 .chip_select
= MAX_CTRL_CS
+ GPIO_PC15
, /* SPI_SSEL4 */
1715 #if IS_ENABLED(CONFIG_SPI_SPIDEV)
1717 .modalias
= "spidev",
1718 .max_speed_hz
= 3125000, /* max spi clock (SCK) speed in HZ */
1720 .chip_select
= MAX_CTRL_CS
+ GPIO_PD11
, /* SPI_SSEL1*/
1721 .controller_data
= &spidev_chip_info
,
1724 #if IS_ENABLED(CONFIG_INPUT_ADXL34X_SPI)
1726 .modalias
= "adxl34x",
1727 .platform_data
= &adxl34x_info
,
1729 .max_speed_hz
= 5000000, /* max spi clock (SCK) speed in HZ */
1736 #if IS_ENABLED(CONFIG_SPI_ADI_V3)
1738 static struct resource bfin_spi0_resource
[] = {
1740 .start
= SPI0_REGBASE
,
1741 .end
= SPI0_REGBASE
+ 0xFF,
1742 .flags
= IORESOURCE_MEM
,
1745 .start
= CH_SPI0_TX
,
1747 .flags
= IORESOURCE_DMA
,
1750 .start
= CH_SPI0_RX
,
1752 .flags
= IORESOURCE_DMA
,
1757 static struct resource bfin_spi1_resource
[] = {
1759 .start
= SPI1_REGBASE
,
1760 .end
= SPI1_REGBASE
+ 0xFF,
1761 .flags
= IORESOURCE_MEM
,
1764 .start
= CH_SPI1_TX
,
1766 .flags
= IORESOURCE_DMA
,
1769 .start
= CH_SPI1_RX
,
1771 .flags
= IORESOURCE_DMA
,
1776 /* SPI controller data */
1777 static struct adi_spi3_master bf60x_spi_master_info0
= {
1778 .num_chipselect
= MAX_CTRL_CS
+ MAX_BLACKFIN_GPIOS
,
1779 .pin_req
= {P_SPI0_SCK
, P_SPI0_MISO
, P_SPI0_MOSI
, 0},
1782 static struct platform_device bf60x_spi_master0
= {
1784 .id
= 0, /* Bus number */
1785 .num_resources
= ARRAY_SIZE(bfin_spi0_resource
),
1786 .resource
= bfin_spi0_resource
,
1788 .platform_data
= &bf60x_spi_master_info0
, /* Passed to driver */
1792 static struct adi_spi3_master bf60x_spi_master_info1
= {
1793 .num_chipselect
= MAX_CTRL_CS
+ MAX_BLACKFIN_GPIOS
,
1794 .pin_req
= {P_SPI1_SCK
, P_SPI1_MISO
, P_SPI1_MOSI
, 0},
1797 static struct platform_device bf60x_spi_master1
= {
1799 .id
= 1, /* Bus number */
1800 .num_resources
= ARRAY_SIZE(bfin_spi1_resource
),
1801 .resource
= bfin_spi1_resource
,
1803 .platform_data
= &bf60x_spi_master_info1
, /* Passed to driver */
1806 #endif /* spi master and devices */
1808 #if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
1809 static const u16 bfin_twi0_pins
[] = {P_TWI0_SCL
, P_TWI0_SDA
, 0};
1811 static struct resource bfin_twi0_resource
[] = {
1813 .start
= TWI0_CLKDIV
,
1814 .end
= TWI0_CLKDIV
+ 0xFF,
1815 .flags
= IORESOURCE_MEM
,
1820 .flags
= IORESOURCE_IRQ
,
1824 static struct platform_device i2c_bfin_twi0_device
= {
1825 .name
= "i2c-bfin-twi",
1827 .num_resources
= ARRAY_SIZE(bfin_twi0_resource
),
1828 .resource
= bfin_twi0_resource
,
1830 .platform_data
= &bfin_twi0_pins
,
1834 static const u16 bfin_twi1_pins
[] = {P_TWI1_SCL
, P_TWI1_SDA
, 0};
1836 static struct resource bfin_twi1_resource
[] = {
1838 .start
= TWI1_CLKDIV
,
1839 .end
= TWI1_CLKDIV
+ 0xFF,
1840 .flags
= IORESOURCE_MEM
,
1845 .flags
= IORESOURCE_IRQ
,
1849 static struct platform_device i2c_bfin_twi1_device
= {
1850 .name
= "i2c-bfin-twi",
1852 .num_resources
= ARRAY_SIZE(bfin_twi1_resource
),
1853 .resource
= bfin_twi1_resource
,
1855 .platform_data
= &bfin_twi1_pins
,
1860 static struct i2c_board_info __initdata bfin_i2c_board_info0
[] = {
1861 #if IS_ENABLED(CONFIG_INPUT_ADXL34X_I2C)
1863 I2C_BOARD_INFO("adxl34x", 0x53),
1865 .platform_data
= (void *)&adxl34x_info
,
1868 #if IS_ENABLED(CONFIG_SND_SOC_ADAU1761)
1870 I2C_BOARD_INFO("adau1761", 0x38),
1871 .platform_data
= (void *)&adau1761_info
1874 #if IS_ENABLED(CONFIG_SND_SOC_SSM2602)
1876 I2C_BOARD_INFO("ssm2602", 0x1b),
1881 static struct i2c_board_info __initdata bfin_i2c_board_info1
[] = {
1884 static const unsigned int cclk_vlev_datasheet
[] =
1887 * Internal VLEV BF54XSBBC1533
1888 ****temporarily using these values until data sheet is updated
1890 VRPAIR(VLEV_085
, 150000000),
1891 VRPAIR(VLEV_090
, 250000000),
1892 VRPAIR(VLEV_110
, 276000000),
1893 VRPAIR(VLEV_115
, 301000000),
1894 VRPAIR(VLEV_120
, 525000000),
1895 VRPAIR(VLEV_125
, 550000000),
1896 VRPAIR(VLEV_130
, 600000000),
1899 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data
= {
1900 .tuple_tab
= cclk_vlev_datasheet
,
1901 .tabsize
= ARRAY_SIZE(cclk_vlev_datasheet
),
1902 .vr_settling_time
= 25 /* us */,
1905 static struct platform_device bfin_dpmc
= {
1906 .name
= "bfin dpmc",
1908 .platform_data
= &bfin_dmpc_vreg_data
,
1912 static struct platform_device
*ezkit_devices
[] __initdata
= {
1915 #if defined(CONFIG_PINCTRL_ADI2)
1916 &bfin_pinctrl_device
,
1932 #if IS_ENABLED(CONFIG_RTC_DRV_BFIN)
1936 #if IS_ENABLED(CONFIG_SERIAL_BFIN)
1937 #ifdef CONFIG_SERIAL_BFIN_UART0
1940 #ifdef CONFIG_SERIAL_BFIN_UART1
1945 #if IS_ENABLED(CONFIG_BFIN_SIR)
1946 #ifdef CONFIG_BFIN_SIR0
1949 #ifdef CONFIG_BFIN_SIR1
1954 #if IS_ENABLED(CONFIG_STMMAC_ETH)
1958 #if IS_ENABLED(CONFIG_USB_MUSB_HDRC)
1962 #if IS_ENABLED(CONFIG_USB_ISP1760_HCD)
1963 &bfin_isp1760_device
,
1966 #if IS_ENABLED(CONFIG_SERIAL_BFIN_SPORT)
1967 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1968 &bfin_sport0_uart_device
,
1970 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1971 &bfin_sport1_uart_device
,
1973 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
1974 &bfin_sport2_uart_device
,
1978 #if IS_ENABLED(CONFIG_CAN_BFIN)
1982 #if IS_ENABLED(CONFIG_MTD_NAND_BF5XX)
1986 #if IS_ENABLED(CONFIG_SDH_BFIN)
1990 #if IS_ENABLED(CONFIG_SPI_ADI_V3)
1995 #if IS_ENABLED(CONFIG_INPUT_BFIN_ROTARY)
1996 &bfin_rotary_device
,
1999 #if IS_ENABLED(CONFIG_I2C_BLACKFIN_TWI)
2000 &i2c_bfin_twi0_device
,
2001 #if !defined(CONFIG_BF542)
2002 &i2c_bfin_twi1_device
,
2006 #if defined(CONFIG_BFIN_CRC)
2010 #if defined(CONFIG_CRYPTO_DEV_BFIN_CRC)
2011 &bfin_crypto_crc_device
,
2014 #if IS_ENABLED(CONFIG_KEYBOARD_GPIO)
2015 &bfin_device_gpiokeys
,
2018 #if IS_ENABLED(CONFIG_MTD_PHYSMAP)
2019 &ezkit_flash_device
,
2021 #if IS_ENABLED(CONFIG_SND_BF5XX_I2S)
2024 #if IS_ENABLED(CONFIG_SND_BF6XX_SOC_I2S)
2027 #if IS_ENABLED(CONFIG_SND_BF5XX_SOC_AD1836)
2028 &bfin_ad1836_machine
,
2030 #if IS_ENABLED(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61)
2033 #if IS_ENABLED(CONFIG_VIDEO_BLACKFIN_CAPTURE)
2034 &bfin_capture_device
,
2036 #if IS_ENABLED(CONFIG_VIDEO_BLACKFIN_DISPLAY)
2037 &bfin_display_device
,
2042 /* Pin control settings */
2043 static struct pinctrl_map __initdata bfin_pinmux_map
[] = {
2044 /* per-device maps */
2045 PIN_MAP_MUX_GROUP_DEFAULT("bfin-uart.0", "pinctrl-adi2.0", NULL
, "uart0"),
2046 PIN_MAP_MUX_GROUP_DEFAULT("bfin-uart.1", "pinctrl-adi2.0", NULL
, "uart1"),
2047 PIN_MAP_MUX_GROUP_DEFAULT("bfin_sir.0", "pinctrl-adi2.0", NULL
, "uart0"),
2048 PIN_MAP_MUX_GROUP_DEFAULT("bfin_sir.1", "pinctrl-adi2.0", NULL
, "uart1"),
2049 PIN_MAP_MUX_GROUP_DEFAULT("bfin-sdh.0", "pinctrl-adi2.0", NULL
, "rsi0"),
2050 PIN_MAP_MUX_GROUP_DEFAULT("stmmaceth.0", "pinctrl-adi2.0", NULL
, "eth0"),
2051 PIN_MAP_MUX_GROUP_DEFAULT("adi-spi3.0", "pinctrl-adi2.0", NULL
, "spi0"),
2052 PIN_MAP_MUX_GROUP_DEFAULT("adi-spi3.1", "pinctrl-adi2.0", NULL
, "spi1"),
2053 PIN_MAP_MUX_GROUP_DEFAULT("i2c-bfin-twi.0", "pinctrl-adi2.0", NULL
, "twi0"),
2054 PIN_MAP_MUX_GROUP_DEFAULT("i2c-bfin-twi.1", "pinctrl-adi2.0", NULL
, "twi1"),
2055 PIN_MAP_MUX_GROUP_DEFAULT("bfin-rotary", "pinctrl-adi2.0", NULL
, "rotary"),
2056 PIN_MAP_MUX_GROUP_DEFAULT("bfin_can.0", "pinctrl-adi2.0", NULL
, "can0"),
2057 PIN_MAP_MUX_GROUP_DEFAULT("physmap-flash.0", "pinctrl-adi2.0", NULL
, "smc0"),
2058 PIN_MAP_MUX_GROUP_DEFAULT("bf609_nl8048.2", "pinctrl-adi2.0", NULL
, "ppi2_16b"),
2059 PIN_MAP_MUX_GROUP_DEFAULT("bfin_display.0", "pinctrl-adi2.0", NULL
, "ppi0_16b"),
2060 #if IS_ENABLED(CONFIG_VIDEO_MT9M114)
2061 PIN_MAP_MUX_GROUP_DEFAULT("bfin_capture.0", "pinctrl-adi2.0", NULL
, "ppi0_8b"),
2062 #elif IS_ENABLED(CONFIG_VIDEO_VS6624)
2063 PIN_MAP_MUX_GROUP_DEFAULT("bfin_capture.0", "pinctrl-adi2.0", NULL
, "ppi0_16b"),
2065 PIN_MAP_MUX_GROUP_DEFAULT("bfin_capture.0", "pinctrl-adi2.0", NULL
, "ppi0_24b"),
2067 PIN_MAP_MUX_GROUP_DEFAULT("bfin-i2s.0", "pinctrl-adi2.0", NULL
, "sport0"),
2068 PIN_MAP_MUX_GROUP_DEFAULT("bfin-tdm.0", "pinctrl-adi2.0", NULL
, "sport0"),
2069 PIN_MAP_MUX_GROUP_DEFAULT("bfin-i2s.1", "pinctrl-adi2.0", NULL
, "sport1"),
2070 PIN_MAP_MUX_GROUP_DEFAULT("bfin-tdm.1", "pinctrl-adi2.0", NULL
, "sport1"),
2071 PIN_MAP_MUX_GROUP_DEFAULT("bfin-i2s.2", "pinctrl-adi2.0", NULL
, "sport2"),
2072 PIN_MAP_MUX_GROUP_DEFAULT("bfin-tdm.2", "pinctrl-adi2.0", NULL
, "sport2"),
2075 static int __init
ezkit_init(void)
2077 printk(KERN_INFO
"%s(): registering device resources\n", __func__
);
2079 /* Initialize pinmuxing */
2080 pinctrl_register_mappings(bfin_pinmux_map
,
2081 ARRAY_SIZE(bfin_pinmux_map
));
2083 i2c_register_board_info(0, bfin_i2c_board_info0
,
2084 ARRAY_SIZE(bfin_i2c_board_info0
));
2085 i2c_register_board_info(1, bfin_i2c_board_info1
,
2086 ARRAY_SIZE(bfin_i2c_board_info1
));
2088 platform_add_devices(ezkit_devices
, ARRAY_SIZE(ezkit_devices
));
2090 spi_register_board_info(bfin_spi_board_info
, ARRAY_SIZE(bfin_spi_board_info
));
2095 arch_initcall(ezkit_init
);
2097 static struct platform_device
*ezkit_early_devices
[] __initdata
= {
2098 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
2099 #ifdef CONFIG_SERIAL_BFIN_UART0
2102 #ifdef CONFIG_SERIAL_BFIN_UART1
2108 void __init
native_machine_early_platform_add_devices(void)
2110 printk(KERN_INFO
"register early platform devices\n");
2111 early_platform_add_devices(ezkit_early_devices
,
2112 ARRAY_SIZE(ezkit_early_devices
));