arch/blackfin/mach-bf609/boards/ezkit.c

   1 /*
   2  * Copyright 2004-2009 Analog Devices Inc.
   3  *                2005 National ICT Australia (NICTA)
   4  *                      Aidan Williams <aidan@nicta.com.au>
   5  *
   6  * Licensed under the GPL-2 or later.
   7  */
   8
   9 #include <linux/device.h>
  10 #include <linux/platform_device.h>
  11 #include <linux/mtd/mtd.h>
  12 #include <linux/mtd/partitions.h>
  13 #include <linux/mtd/physmap.h>
  14 #include <linux/spi/spi.h>
  15 #include <linux/spi/flash.h>
  16 #include <linux/irq.h>
  17 #include <linux/i2c.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/usb/musb.h>
  20 #include <asm/bfin6xx_spi.h>
  21 #include <asm/dma.h>
  22 #include <asm/gpio.h>
  23 #include <asm/nand.h>
  24 #include <asm/dpmc.h>
  25 #include <asm/portmux.h>
  26 #include <asm/bfin_sdh.h>
  27 #include <linux/input.h>
  28 #include <linux/spi/ad7877.h>
  29
  30 /*
  31  * Name the Board for the /proc/cpuinfo
  32  */
  33 const char bfin_board_name[] = "ADI BF609-EZKIT";
  34
  35 /*
  36  *  Driver needs to know address, irq and flag pin.
  37  */
  38
  39 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  40 #include <linux/usb/isp1760.h>
  41 static struct resource bfin_isp1760_resources[] = {
  42         [0] = {
  43                 .start  = 0x2C0C0000,
  44                 .end    = 0x2C0C0000 + 0xfffff,
  45                 .flags  = IORESOURCE_MEM,
  46         },
  47         [1] = {
  48                 .start  = IRQ_PG7,
  49                 .end    = IRQ_PG7,
  50                 .flags  = IORESOURCE_IRQ,
  51         },
  52 };
  53
  54 static struct isp1760_platform_data isp1760_priv = {
  55         .is_isp1761 = 0,
  56         .bus_width_16 = 1,
  57         .port1_otg = 0,
  58         .analog_oc = 0,
  59         .dack_polarity_high = 0,
  60         .dreq_polarity_high = 0,
  61 };
  62
  63 static struct platform_device bfin_isp1760_device = {
  64         .name           = "isp1760",
  65         .id             = 0,
  66         .dev = {
  67                 .platform_data = &isp1760_priv,
  68         },
  69         .num_resources  = ARRAY_SIZE(bfin_isp1760_resources),
  70         .resource       = bfin_isp1760_resources,
  71 };
  72 #endif
  73
  74 #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
  75 #include <asm/bfin_rotary.h>
  76
  77 static struct bfin_rotary_platform_data bfin_rotary_data = {
  78         /*.rotary_up_key     = KEY_UP,*/
  79         /*.rotary_down_key   = KEY_DOWN,*/
  80         .rotary_rel_code   = REL_WHEEL,
  81         .rotary_button_key = KEY_ENTER,
  82         .debounce          = 10,        /* 0..17 */
  83         .mode              = ROT_QUAD_ENC | ROT_DEBE,
  84 };
  85
  86 static struct resource bfin_rotary_resources[] = {
  87         {
  88                 .start = IRQ_CNT,
  89                 .end = IRQ_CNT,
  90                 .flags = IORESOURCE_IRQ,
  91         },
  92 };
  93
  94 static struct platform_device bfin_rotary_device = {
  95         .name           = "bfin-rotary",
  96         .id             = -1,
  97         .num_resources  = ARRAY_SIZE(bfin_rotary_resources),
  98         .resource       = bfin_rotary_resources,
  99         .dev            = {
 100                 .platform_data = &bfin_rotary_data,
 101         },
 102 };
 103 #endif
 104
 105 #if defined(CONFIG_STMMAC_ETH) || defined(CONFIG_STMMAC_ETH_MODULE)
 106 #include <linux/stmmac.h>
 107
 108 static unsigned short pins[] = P_RMII0;
 109
 110 static struct stmmac_mdio_bus_data phy_private_data = {
 111         .bus_id = 0,
 112         .phy_mask = 1,
 113 };
 114
 115 static struct plat_stmmacenet_data eth_private_data = {
 116         .bus_id   = 0,
 117         .enh_desc = 1,
 118         .phy_addr = 1,
 119         .mdio_bus_data = &phy_private_data,
 120 };
 121
 122 static struct platform_device bfin_eth_device = {
 123         .name           = "stmmaceth",
 124         .id             = 0,
 125         .num_resources  = 2,
 126         .resource       = (struct resource[]) {
 127                 {
 128                         .start  = EMAC0_MACCFG,
 129                         .end    = EMAC0_MACCFG + 0x1274,
 130                         .flags  = IORESOURCE_MEM,
 131                 },
 132                 {
 133                         .name   = "macirq",
 134                         .start  = IRQ_EMAC0_STAT,
 135                         .end    = IRQ_EMAC0_STAT,
 136                         .flags  = IORESOURCE_IRQ,
 137                 },
 138         },
 139         .dev = {
 140                 .power.can_wakeup = 1,
 141                 .platform_data = &eth_private_data,
 142         }
 143 };
 144 #endif
 145
 146 #if defined(CONFIG_INPUT_ADXL34X) || defined(CONFIG_INPUT_ADXL34X_MODULE)
 147 #include <linux/input/adxl34x.h>
 148 static const struct adxl34x_platform_data adxl34x_info = {
 149         .x_axis_offset = 0,
 150         .y_axis_offset = 0,
 151         .z_axis_offset = 0,
 152         .tap_threshold = 0x31,
 153         .tap_duration = 0x10,
 154         .tap_latency = 0x60,
 155         .tap_window = 0xF0,
 156         .tap_axis_control = ADXL_TAP_X_EN | ADXL_TAP_Y_EN | ADXL_TAP_Z_EN,
 157         .act_axis_control = 0xFF,
 158         .activity_threshold = 5,
 159         .inactivity_threshold = 3,
 160         .inactivity_time = 4,
 161         .free_fall_threshold = 0x7,
 162         .free_fall_time = 0x20,
 163         .data_rate = 0x8,
 164         .data_range = ADXL_FULL_RES,
 165
 166         .ev_type = EV_ABS,
 167         .ev_code_x = ABS_X,             /* EV_REL */
 168         .ev_code_y = ABS_Y,             /* EV_REL */
 169         .ev_code_z = ABS_Z,             /* EV_REL */
 170
 171         .ev_code_tap = {BTN_TOUCH, BTN_TOUCH, BTN_TOUCH}, /* EV_KEY x,y,z */
 172
 173 /*      .ev_code_ff = KEY_F,*/          /* EV_KEY */
 174 /*      .ev_code_act_inactivity = KEY_A,*/      /* EV_KEY */
 175         .power_mode = ADXL_AUTO_SLEEP | ADXL_LINK,
 176         .fifo_mode = ADXL_FIFO_STREAM,
 177         .orientation_enable = ADXL_EN_ORIENTATION_3D,
 178         .deadzone_angle = ADXL_DEADZONE_ANGLE_10p8,
 179         .divisor_length = ADXL_LP_FILTER_DIVISOR_16,
 180         /* EV_KEY {+Z, +Y, +X, -X, -Y, -Z} */
 181         .ev_codes_orient_3d = {BTN_Z, BTN_Y, BTN_X, BTN_A, BTN_B, BTN_C},
 182 };
 183 #endif
 184
 185 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 186 static struct platform_device rtc_device = {
 187         .name = "rtc-bfin",
 188         .id   = -1,
 189 };
 190 #endif
 191
 192 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 193 #ifdef CONFIG_SERIAL_BFIN_UART0
 194 static struct resource bfin_uart0_resources[] = {
 195         {
 196                 .start = UART0_REVID,
 197                 .end = UART0_RXDIV+4,
 198                 .flags = IORESOURCE_MEM,
 199         },
 200         {
 201                 .start = IRQ_UART0_TX,
 202                 .end = IRQ_UART0_TX,
 203                 .flags = IORESOURCE_IRQ,
 204         },
 205         {
 206                 .start = IRQ_UART0_RX,
 207                 .end = IRQ_UART0_RX,
 208                 .flags = IORESOURCE_IRQ,
 209         },
 210         {
 211                 .start = IRQ_UART0_STAT,
 212                 .end = IRQ_UART0_STAT,
 213                 .flags = IORESOURCE_IRQ,
 214         },
 215         {
 216                 .start = CH_UART0_TX,
 217                 .end = CH_UART0_TX,
 218                 .flags = IORESOURCE_DMA,
 219         },
 220         {
 221                 .start = CH_UART0_RX,
 222                 .end = CH_UART0_RX,
 223                 .flags = IORESOURCE_DMA,
 224         },
 225 #ifdef CONFIG_BFIN_UART0_CTSRTS
 226         {       /* CTS pin -- 0 means not supported */
 227                 .start = GPIO_PD10,
 228                 .end = GPIO_PD10,
 229                 .flags = IORESOURCE_IO,
 230         },
 231         {       /* RTS pin -- 0 means not supported */
 232                 .start = GPIO_PD9,
 233                 .end = GPIO_PD9,
 234                 .flags = IORESOURCE_IO,
 235         },
 236 #endif
 237 };
 238
 239 static unsigned short bfin_uart0_peripherals[] = {
 240         P_UART0_TX, P_UART0_RX,
 241 #ifdef CONFIG_BFIN_UART0_CTSRTS
 242         P_UART0_RTS, P_UART0_CTS,
 243 #endif
 244         0
 245 };
 246
 247 static struct platform_device bfin_uart0_device = {
 248         .name = "bfin-uart",
 249         .id = 0,
 250         .num_resources = ARRAY_SIZE(bfin_uart0_resources),
 251         .resource = bfin_uart0_resources,
 252         .dev = {
 253                 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
 254         },
 255 };
 256 #endif
 257 #ifdef CONFIG_SERIAL_BFIN_UART1
 258 static struct resource bfin_uart1_resources[] = {
 259         {
 260                 .start = UART1_REVID,
 261                 .end = UART1_RXDIV+4,
 262                 .flags = IORESOURCE_MEM,
 263         },
 264         {
 265                 .start = IRQ_UART1_TX,
 266                 .end = IRQ_UART1_TX,
 267                 .flags = IORESOURCE_IRQ,
 268         },
 269         {
 270                 .start = IRQ_UART1_RX,
 271                 .end = IRQ_UART1_RX,
 272                 .flags = IORESOURCE_IRQ,
 273         },
 274         {
 275                 .start = IRQ_UART1_STAT,
 276                 .end = IRQ_UART1_STAT,
 277                 .flags = IORESOURCE_IRQ,
 278         },
 279         {
 280                 .start = CH_UART1_TX,
 281                 .end = CH_UART1_TX,
 282                 .flags = IORESOURCE_DMA,
 283         },
 284         {
 285                 .start = CH_UART1_RX,
 286                 .end = CH_UART1_RX,
 287                 .flags = IORESOURCE_DMA,
 288         },
 289 #ifdef CONFIG_BFIN_UART1_CTSRTS
 290         {       /* CTS pin -- 0 means not supported */
 291                 .start = GPIO_PG13,
 292                 .end = GPIO_PG13,
 293                 .flags = IORESOURCE_IO,
 294         },
 295         {       /* RTS pin -- 0 means not supported */
 296                 .start = GPIO_PG10,
 297                 .end = GPIO_PG10,
 298                 .flags = IORESOURCE_IO,
 299         },
 300 #endif
 301 };
 302
 303 static unsigned short bfin_uart1_peripherals[] = {
 304         P_UART1_TX, P_UART1_RX,
 305 #ifdef CONFIG_BFIN_UART1_CTSRTS
 306         P_UART1_RTS, P_UART1_CTS,
 307 #endif
 308         0
 309 };
 310
 311 static struct platform_device bfin_uart1_device = {
 312         .name = "bfin-uart",
 313         .id = 1,
 314         .num_resources = ARRAY_SIZE(bfin_uart1_resources),
 315         .resource = bfin_uart1_resources,
 316         .dev = {
 317                 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
 318         },
 319 };
 320 #endif
 321 #endif
 322
 323 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 324 #ifdef CONFIG_BFIN_SIR0
 325 static struct resource bfin_sir0_resources[] = {
 326         {
 327                 .start = 0xFFC00400,
 328                 .end = 0xFFC004FF,
 329                 .flags = IORESOURCE_MEM,
 330         },
 331         {
 332                 .start = IRQ_UART0_TX,
 333                 .end = IRQ_UART0_TX+1,
 334                 .flags = IORESOURCE_IRQ,
 335         },
 336         {
 337                 .start = CH_UART0_TX,
 338                 .end = CH_UART0_TX+1,
 339                 .flags = IORESOURCE_DMA,
 340         },
 341 };
 342 static struct platform_device bfin_sir0_device = {
 343         .name = "bfin_sir",
 344         .id = 0,
 345         .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 346         .resource = bfin_sir0_resources,
 347 };
 348 #endif
 349 #ifdef CONFIG_BFIN_SIR1
 350 static struct resource bfin_sir1_resources[] = {
 351         {
 352                 .start = 0xFFC02000,
 353                 .end = 0xFFC020FF,
 354                 .flags = IORESOURCE_MEM,
 355         },
 356         {
 357                 .start = IRQ_UART1_TX,
 358                 .end = IRQ_UART1_TX+1,
 359                 .flags = IORESOURCE_IRQ,
 360         },
 361         {
 362                 .start = CH_UART1_TX,
 363                 .end = CH_UART1_TX+1,
 364                 .flags = IORESOURCE_DMA,
 365         },
 366 };
 367 static struct platform_device bfin_sir1_device = {
 368         .name = "bfin_sir",
 369         .id = 1,
 370         .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 371         .resource = bfin_sir1_resources,
 372 };
 373 #endif
 374 #endif
 375
 376 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
 377 static struct resource musb_resources[] = {
 378         [0] = {
 379                 .start  = 0xFFCC1000,
 380                 .end    = 0xFFCC1398,
 381                 .flags  = IORESOURCE_MEM,
 382         },
 383         [1] = { /* general IRQ */
 384                 .start  = IRQ_USB_STAT,
 385                 .end    = IRQ_USB_STAT,
 386                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 387                 .name   = "mc"
 388         },
 389         [2] = { /* DMA IRQ */
 390                 .start  = IRQ_USB_DMA,
 391                 .end    = IRQ_USB_DMA,
 392                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 393                 .name   = "dma"
 394         },
 395 };
 396
 397 static struct musb_hdrc_config musb_config = {
 398         .multipoint     = 1,
 399         .dyn_fifo       = 0,
 400         .dma            = 1,
 401         .num_eps        = 16,
 402         .dma_channels   = 8,
 403         .clkin          = 48,           /* musb CLKIN in MHZ */
 404 };
 405
 406 static struct musb_hdrc_platform_data musb_plat = {
 407 #if defined(CONFIG_USB_MUSB_HDRC) && defined(CONFIG_USB_GADGET_MUSB_HDRC)
 408         .mode           = MUSB_OTG,
 409 #elif defined(CONFIG_USB_MUSB_HDRC)
 410         .mode           = MUSB_HOST,
 411 #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
 412         .mode           = MUSB_PERIPHERAL,
 413 #endif
 414         .config         = &musb_config,
 415 };
 416
 417 static u64 musb_dmamask = ~(u32)0;
 418
 419 static struct platform_device musb_device = {
 420         .name           = "musb-blackfin",
 421         .id             = 0,
 422         .dev = {
 423                 .dma_mask               = &musb_dmamask,
 424                 .coherent_dma_mask      = 0xffffffff,
 425                 .platform_data          = &musb_plat,
 426         },
 427         .num_resources  = ARRAY_SIZE(musb_resources),
 428         .resource       = musb_resources,
 429 };
 430 #endif
 431
 432 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 433 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 434 static struct resource bfin_sport0_uart_resources[] = {
 435         {
 436                 .start = SPORT0_TCR1,
 437                 .end = SPORT0_MRCS3+4,
 438                 .flags = IORESOURCE_MEM,
 439         },
 440         {
 441                 .start = IRQ_SPORT0_RX,
 442                 .end = IRQ_SPORT0_RX+1,
 443                 .flags = IORESOURCE_IRQ,
 444         },
 445         {
 446                 .start = IRQ_SPORT0_ERROR,
 447                 .end = IRQ_SPORT0_ERROR,
 448                 .flags = IORESOURCE_IRQ,
 449         },
 450 };
 451
 452 static unsigned short bfin_sport0_peripherals[] = {
 453         P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
 454         P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
 455 };
 456
 457 static struct platform_device bfin_sport0_uart_device = {
 458         .name = "bfin-sport-uart",
 459         .id = 0,
 460         .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
 461         .resource = bfin_sport0_uart_resources,
 462         .dev = {
 463                 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
 464         },
 465 };
 466 #endif
 467 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 468 static struct resource bfin_sport1_uart_resources[] = {
 469         {
 470                 .start = SPORT1_TCR1,
 471                 .end = SPORT1_MRCS3+4,
 472                 .flags = IORESOURCE_MEM,
 473         },
 474         {
 475                 .start = IRQ_SPORT1_RX,
 476                 .end = IRQ_SPORT1_RX+1,
 477                 .flags = IORESOURCE_IRQ,
 478         },
 479         {
 480                 .start = IRQ_SPORT1_ERROR,
 481                 .end = IRQ_SPORT1_ERROR,
 482                 .flags = IORESOURCE_IRQ,
 483         },
 484 };
 485
 486 static unsigned short bfin_sport1_peripherals[] = {
 487         P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
 488         P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
 489 };
 490
 491 static struct platform_device bfin_sport1_uart_device = {
 492         .name = "bfin-sport-uart",
 493         .id = 1,
 494         .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
 495         .resource = bfin_sport1_uart_resources,
 496         .dev = {
 497                 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
 498         },
 499 };
 500 #endif
 501 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
 502 static struct resource bfin_sport2_uart_resources[] = {
 503         {
 504                 .start = SPORT2_TCR1,
 505                 .end = SPORT2_MRCS3+4,
 506                 .flags = IORESOURCE_MEM,
 507         },
 508         {
 509                 .start = IRQ_SPORT2_RX,
 510                 .end = IRQ_SPORT2_RX+1,
 511                 .flags = IORESOURCE_IRQ,
 512         },
 513         {
 514                 .start = IRQ_SPORT2_ERROR,
 515                 .end = IRQ_SPORT2_ERROR,
 516                 .flags = IORESOURCE_IRQ,
 517         },
 518 };
 519
 520 static unsigned short bfin_sport2_peripherals[] = {
 521         P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, P_SPORT2_RFS,
 522         P_SPORT2_DRPRI, P_SPORT2_RSCLK, P_SPORT2_DRSEC, P_SPORT2_DTSEC, 0
 523 };
 524
 525 static struct platform_device bfin_sport2_uart_device = {
 526         .name = "bfin-sport-uart",
 527         .id = 2,
 528         .num_resources = ARRAY_SIZE(bfin_sport2_uart_resources),
 529         .resource = bfin_sport2_uart_resources,
 530         .dev = {
 531                 .platform_data = &bfin_sport2_peripherals, /* Passed to driver */
 532         },
 533 };
 534 #endif
 535 #endif
 536
 537 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
 538
 539 static unsigned short bfin_can0_peripherals[] = {
 540         P_CAN0_RX, P_CAN0_TX, 0
 541 };
 542
 543 static struct resource bfin_can0_resources[] = {
 544         {
 545                 .start = 0xFFC00A00,
 546                 .end = 0xFFC00FFF,
 547                 .flags = IORESOURCE_MEM,
 548         },
 549         {
 550                 .start = IRQ_CAN0_RX,
 551                 .end = IRQ_CAN0_RX,
 552                 .flags = IORESOURCE_IRQ,
 553         },
 554         {
 555                 .start = IRQ_CAN0_TX,
 556                 .end = IRQ_CAN0_TX,
 557                 .flags = IORESOURCE_IRQ,
 558         },
 559         {
 560                 .start = IRQ_CAN0_STAT,
 561                 .end = IRQ_CAN0_STAT,
 562                 .flags = IORESOURCE_IRQ,
 563         },
 564 };
 565
 566 static struct platform_device bfin_can0_device = {
 567         .name = "bfin_can",
 568         .id = 0,
 569         .num_resources = ARRAY_SIZE(bfin_can0_resources),
 570         .resource = bfin_can0_resources,
 571         .dev = {
 572                 .platform_data = &bfin_can0_peripherals, /* Passed to driver */
 573         },
 574 };
 575
 576 #endif
 577
 578 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
 579 static struct mtd_partition partition_info[] = {
 580         {
 581                 .name = "bootloader(nand)",
 582                 .offset = 0,
 583                 .size = 0x80000,
 584         }, {
 585                 .name = "linux kernel(nand)",
 586                 .offset = MTDPART_OFS_APPEND,
 587                 .size = 4 * 1024 * 1024,
 588         },
 589         {
 590                 .name = "file system(nand)",
 591                 .offset = MTDPART_OFS_APPEND,
 592                 .size = MTDPART_SIZ_FULL,
 593         },
 594 };
 595
 596 static struct bf5xx_nand_platform bfin_nand_platform = {
 597         .data_width = NFC_NWIDTH_8,
 598         .partitions = partition_info,
 599         .nr_partitions = ARRAY_SIZE(partition_info),
 600         .rd_dly = 3,
 601         .wr_dly = 3,
 602 };
 603
 604 static struct resource bfin_nand_resources[] = {
 605         {
 606                 .start = 0xFFC03B00,
 607                 .end = 0xFFC03B4F,
 608                 .flags = IORESOURCE_MEM,
 609         },
 610         {
 611                 .start = CH_NFC,
 612                 .end = CH_NFC,
 613                 .flags = IORESOURCE_IRQ,
 614         },
 615 };
 616
 617 static struct platform_device bfin_nand_device = {
 618         .name = "bfin-nand",
 619         .id = 0,
 620         .num_resources = ARRAY_SIZE(bfin_nand_resources),
 621         .resource = bfin_nand_resources,
 622         .dev = {
 623                 .platform_data = &bfin_nand_platform,
 624         },
 625 };
 626 #endif
 627
 628 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
 629
 630 static struct bfin_sd_host bfin_sdh_data = {
 631         .dma_chan = CH_RSI,
 632         .irq_int0 = IRQ_RSI_INT0,
 633         .pin_req = {P_RSI_DATA0, P_RSI_DATA1, P_RSI_DATA2, P_RSI_DATA3, P_RSI_CMD, P_RSI_CLK, 0},
 634 };
 635
 636 static struct platform_device bfin_sdh_device = {
 637         .name = "bfin-sdh",
 638         .id = 0,
 639         .dev = {
 640                 .platform_data = &bfin_sdh_data,
 641         },
 642 };
 643 #endif
 644
 645 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 646 static struct mtd_partition ezkit_partitions[] = {
 647         {
 648                 .name       = "bootloader(nor)",
 649                 .size       = 0x80000,
 650                 .offset     = 0,
 651         }, {
 652                 .name       = "linux kernel(nor)",
 653                 .size       = 0x400000,
 654                 .offset     = MTDPART_OFS_APPEND,
 655         }, {
 656                 .name       = "file system(nor)",
 657                 .size       = 0x1000000 - 0x80000 - 0x400000,
 658                 .offset     = MTDPART_OFS_APPEND,
 659         },
 660 };
 661
 662 int bf609_nor_flash_init(struct platform_device *dev)
 663 {
 664 #define CONFIG_SMC_GCTL_VAL     0x00000010
 665         const unsigned short pins[] = {
 666                 P_A3, P_A4, P_A5, P_A6, P_A7, P_A8, P_A9, P_A10, P_A11, P_A12,
 667                 P_A13, P_A14, P_A15, P_A16, P_A17, P_A18, P_A19, P_A20, P_A21,
 668                 P_A22, P_A23, P_A24, P_A25, P_NORCK, 0,
 669         };
 670
 671         peripheral_request_list(pins, "smc0");
 672
 673         bfin_write32(SMC_GCTL, CONFIG_SMC_GCTL_VAL);
 674         bfin_write32(SMC_B0CTL, 0x01002011);
 675         bfin_write32(SMC_B0TIM, 0x08170977);
 676         bfin_write32(SMC_B0ETIM, 0x00092231);
 677         return 0;
 678 }
 679
 680 void bf609_nor_flash_exit(struct platform_device *dev)
 681 {
 682         const unsigned short pins[] = {
 683                 P_A3, P_A4, P_A5, P_A6, P_A7, P_A8, P_A9, P_A10, P_A11, P_A12,
 684                 P_A13, P_A14, P_A15, P_A16, P_A17, P_A18, P_A19, P_A20, P_A21,
 685                 P_A22, P_A23, P_A24, P_A25, P_NORCK, 0,
 686         };
 687
 688         peripheral_free_list(pins);
 689
 690         bfin_write32(SMC_GCTL, 0);
 691 }
 692
 693 static struct physmap_flash_data ezkit_flash_data = {
 694         .width      = 2,
 695         .parts      = ezkit_partitions,
 696         .init       = bf609_nor_flash_init,
 697         .exit       = bf609_nor_flash_exit,
 698         .nr_parts   = ARRAY_SIZE(ezkit_partitions),
 699 #ifdef CONFIG_ROMKERNEL
 700         .probe_type = "map_rom",
 701 #endif
 702 };
 703
 704 static struct resource ezkit_flash_resource = {
 705         .start = 0xb0000000,
 706         .end   = 0xb0ffffff,
 707         .flags = IORESOURCE_MEM,
 708 };
 709
 710 static struct platform_device ezkit_flash_device = {
 711         .name          = "physmap-flash",
 712         .id            = 0,
 713         .dev = {
 714                 .platform_data = &ezkit_flash_data,
 715         },
 716         .num_resources = 1,
 717         .resource      = &ezkit_flash_resource,
 718 };
 719 #endif
 720
 721 #if defined(CONFIG_MTD_M25P80) \
 722         || defined(CONFIG_MTD_M25P80_MODULE)
 723 /* SPI flash chip (w25q32) */
 724 static struct mtd_partition bfin_spi_flash_partitions[] = {
 725         {
 726                 .name = "bootloader(spi)",
 727                 .size = 0x00080000,
 728                 .offset = 0,
 729                 .mask_flags = MTD_CAP_ROM
 730         }, {
 731                 .name = "linux kernel(spi)",
 732                 .size = 0x00180000,
 733                 .offset = MTDPART_OFS_APPEND,
 734         }, {
 735                 .name = "file system(spi)",
 736                 .size = MTDPART_SIZ_FULL,
 737                 .offset = MTDPART_OFS_APPEND,
 738         }
 739 };
 740
 741 static struct flash_platform_data bfin_spi_flash_data = {
 742         .name = "m25p80",
 743         .parts = bfin_spi_flash_partitions,
 744         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 745         .type = "w25q32",
 746 };
 747
 748 static struct bfin6xx_spi_chip spi_flash_chip_info = {
 749         .enable_dma = true,         /* use dma transfer with this chip*/
 750 };
 751 #endif
 752
 753 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 754 static struct bfin6xx_spi_chip spidev_chip_info = {
 755         .enable_dma = true,
 756 };
 757 #endif
 758
 759 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
 760 static struct platform_device bfin_i2s_pcm = {
 761         .name = "bfin-i2s-pcm-audio",
 762         .id = -1,
 763 };
 764 #endif
 765
 766 #if defined(CONFIG_SND_BF6XX_SOC_I2S) || \
 767         defined(CONFIG_SND_BF6XX_SOC_I2S_MODULE)
 768 #include <asm/bfin_sport3.h>
 769 static struct resource bfin_snd_resources[] = {
 770         {
 771                 .start = SPORT0_CTL_A,
 772                 .end = SPORT0_CTL_A,
 773                 .flags = IORESOURCE_MEM,
 774         },
 775         {
 776                 .start = SPORT0_CTL_B,
 777                 .end = SPORT0_CTL_B,
 778                 .flags = IORESOURCE_MEM,
 779         },
 780         {
 781                 .start = CH_SPORT0_TX,
 782                 .end = CH_SPORT0_TX,
 783                 .flags = IORESOURCE_DMA,
 784         },
 785         {
 786                 .start = CH_SPORT0_RX,
 787                 .end = CH_SPORT0_RX,
 788                 .flags = IORESOURCE_DMA,
 789         },
 790         {
 791                 .start = IRQ_SPORT0_TX_STAT,
 792                 .end = IRQ_SPORT0_TX_STAT,
 793                 .flags = IORESOURCE_IRQ,
 794         },
 795         {
 796                 .start = IRQ_SPORT0_RX_STAT,
 797                 .end = IRQ_SPORT0_RX_STAT,
 798                 .flags = IORESOURCE_IRQ,
 799         },
 800 };
 801
 802 static const unsigned short bfin_snd_pin[] = {
 803         P_SPORT0_ACLK, P_SPORT0_AFS, P_SPORT0_AD0, P_SPORT0_BCLK,
 804         P_SPORT0_BFS, P_SPORT0_BD0, 0,
 805 };
 806
 807 static struct bfin_snd_platform_data bfin_snd_data = {
 808         .pin_req = bfin_snd_pin,
 809 };
 810
 811 static struct platform_device bfin_i2s = {
 812         .name = "bfin-i2s",
 813         .num_resources = ARRAY_SIZE(bfin_snd_resources),
 814         .resource = bfin_snd_resources,
 815         .dev = {
 816                 .platform_data = &bfin_snd_data,
 817         },
 818 };
 819 #endif
 820
 821 #if defined(CONFIG_SND_BF5XX_SOC_AD1836) \
 822                 || defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
 823 static const char * const ad1836_link[] = {
 824         "bfin-i2s.0",
 825         "spi0.76",
 826 };
 827 static struct platform_device bfin_ad1836_machine = {
 828         .name = "bfin-snd-ad1836",
 829         .id = -1,
 830         .dev = {
 831                 .platform_data = (void *)ad1836_link,
 832         },
 833 };
 834 #endif
 835
 836 #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61) || \
 837         defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61_MODULE)
 838 static struct platform_device adau1761_device = {
 839         .name = "bfin-eval-adau1x61",
 840 };
 841 #endif
 842
 843 #if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
 844 #include <sound/adau17x1.h>
 845 static struct adau1761_platform_data adau1761_info = {
 846         .lineout_mode = ADAU1761_OUTPUT_MODE_LINE,
 847         .headphone_mode = ADAU1761_OUTPUT_MODE_HEADPHONE_CAPLESS,
 848 };
 849 #endif
 850
 851 #if defined(CONFIG_VIDEO_BLACKFIN_CAPTURE) \
 852         || defined(CONFIG_VIDEO_BLACKFIN_CAPTURE_MODULE)
 853 #include <linux/videodev2.h>
 854 #include <media/blackfin/bfin_capture.h>
 855 #include <media/blackfin/ppi.h>
 856
 857 static const unsigned short ppi_req[] = {
 858         P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3,
 859         P_PPI0_D4, P_PPI0_D5, P_PPI0_D6, P_PPI0_D7,
 860         P_PPI0_D8, P_PPI0_D9, P_PPI0_D10, P_PPI0_D11,
 861         P_PPI0_D12, P_PPI0_D13, P_PPI0_D14, P_PPI0_D15,
 862 #if !defined(CONFIG_VIDEO_VS6624) && !defined(CONFIG_VIDEO_VS6624_MODULE)
 863         P_PPI0_D16, P_PPI0_D17, P_PPI0_D18, P_PPI0_D19,
 864         P_PPI0_D20, P_PPI0_D21, P_PPI0_D22, P_PPI0_D23,
 865 #endif
 866         P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,
 867         0,
 868 };
 869
 870 static const struct ppi_info ppi_info = {
 871         .type = PPI_TYPE_EPPI3,
 872         .dma_ch = CH_EPPI0_CH0,
 873         .irq_err = IRQ_EPPI0_STAT,
 874         .base = (void __iomem *)EPPI0_STAT,
 875         .pin_req = ppi_req,
 876 };
 877
 878 #if defined(CONFIG_VIDEO_VS6624) \
 879         || defined(CONFIG_VIDEO_VS6624_MODULE)
 880 static struct v4l2_input vs6624_inputs[] = {
 881         {
 882                 .index = 0,
 883                 .name = "Camera",
 884                 .type = V4L2_INPUT_TYPE_CAMERA,
 885                 .std = V4L2_STD_UNKNOWN,
 886         },
 887 };
 888
 889 static struct bcap_route vs6624_routes[] = {
 890         {
 891                 .input = 0,
 892                 .output = 0,
 893         },
 894 };
 895
 896 static const unsigned vs6624_ce_pin = GPIO_PE4;
 897
 898 static struct bfin_capture_config bfin_capture_data = {
 899         .card_name = "BF609",
 900         .inputs = vs6624_inputs,
 901         .num_inputs = ARRAY_SIZE(vs6624_inputs),
 902         .routes = vs6624_routes,
 903         .i2c_adapter_id = 0,
 904         .board_info = {
 905                 .type = "vs6624",
 906                 .addr = 0x10,
 907                 .platform_data = (void *)&vs6624_ce_pin,
 908         },
 909         .ppi_info = &ppi_info,
 910         .ppi_control = (PACK_EN | DLEN_8 | EPPI_CTL_FS1HI_FS2HI
 911                         | EPPI_CTL_POLC3 | EPPI_CTL_SYNC2 | EPPI_CTL_NON656),
 912         .blank_pixels = 4,
 913 };
 914 #endif
 915
 916 #if defined(CONFIG_VIDEO_ADV7842) \
 917         || defined(CONFIG_VIDEO_ADV7842_MODULE)
 918 #include <media/adv7842.h>
 919
 920 static struct v4l2_input adv7842_inputs[] = {
 921         {
 922                 .index = 0,
 923                 .name = "Composite",
 924                 .type = V4L2_INPUT_TYPE_CAMERA,
 925                 .std = V4L2_STD_ALL,
 926                 .capabilities = V4L2_IN_CAP_STD,
 927         },
 928         {
 929                 .index = 1,
 930                 .name = "S-Video",
 931                 .type = V4L2_INPUT_TYPE_CAMERA,
 932                 .std = V4L2_STD_ALL,
 933                 .capabilities = V4L2_IN_CAP_STD,
 934         },
 935         {
 936                 .index = 2,
 937                 .name = "Component",
 938                 .type = V4L2_INPUT_TYPE_CAMERA,
 939                 .capabilities = V4L2_IN_CAP_DV_TIMINGS,
 940         },
 941         {
 942                 .index = 3,
 943                 .name = "VGA",
 944                 .type = V4L2_INPUT_TYPE_CAMERA,
 945                 .capabilities = V4L2_IN_CAP_DV_TIMINGS,
 946         },
 947         {
 948                 .index = 4,
 949                 .name = "HDMI",
 950                 .type = V4L2_INPUT_TYPE_CAMERA,
 951                 .capabilities = V4L2_IN_CAP_DV_TIMINGS,
 952         },
 953 };
 954
 955 static struct bcap_route adv7842_routes[] = {
 956         {
 957                 .input = 3,
 958                 .output = 0,
 959                 .ppi_control = (PACK_EN | DLEN_8 | EPPI_CTL_FLDSEL
 960                                 | EPPI_CTL_ACTIVE656),
 961         },
 962         {
 963                 .input = 4,
 964                 .output = 0,
 965         },
 966         {
 967                 .input = 2,
 968                 .output = 0,
 969         },
 970         {
 971                 .input = 1,
 972                 .output = 0,
 973         },
 974         {
 975                 .input = 0,
 976                 .output = 1,
 977                 .ppi_control = (EPPI_CTL_SPLTWRD | PACK_EN | DLEN_16
 978                                 | EPPI_CTL_FS1LO_FS2LO | EPPI_CTL_POLC2
 979                                 | EPPI_CTL_SYNC2 | EPPI_CTL_NON656),
 980         },
 981 };
 982
 983 static struct adv7842_output_format adv7842_opf[] = {
 984         {
 985                 .op_ch_sel = ADV7842_OP_CH_SEL_BRG,
 986                 .op_format_sel = ADV7842_OP_FORMAT_SEL_SDR_ITU656_8,
 987                 .op_656_range = 1,
 988                 .blank_data = 1,
 989                 .insert_av_codes = 1,
 990         },
 991         {
 992                 .op_ch_sel = ADV7842_OP_CH_SEL_RGB,
 993                 .op_format_sel = ADV7842_OP_FORMAT_SEL_SDR_ITU656_16,
 994                 .op_656_range = 1,
 995                 .blank_data = 1,
 996         },
 997 };
 998
 999 static struct adv7842_platform_data adv7842_data = {
1000         .opf = adv7842_opf,
1001         .num_opf = ARRAY_SIZE(adv7842_opf),
1002         .ain_sel = ADV7842_AIN10_11_12_NC_SYNC_4_1,
1003         .prim_mode = ADV7842_PRIM_MODE_SDP,
1004         .vid_std_select = ADV7842_SDP_VID_STD_CVBS_SD_4x1,
1005         .inp_color_space = ADV7842_INP_COLOR_SPACE_AUTO,
1006         .i2c_sdp_io = 0x40,
1007         .i2c_sdp = 0x41,
1008         .i2c_cp = 0x42,
1009         .i2c_vdp = 0x43,
1010         .i2c_afe = 0x44,
1011         .i2c_hdmi = 0x45,
1012         .i2c_repeater = 0x46,
1013         .i2c_edid = 0x47,
1014         .i2c_infoframe = 0x48,
1015         .i2c_cec = 0x49,
1016         .i2c_avlink = 0x4a,
1017         .i2c_ex = 0x26,
1018 };
1019
1020 static struct bfin_capture_config bfin_capture_data = {
1021         .card_name = "BF609",
1022         .inputs = adv7842_inputs,
1023         .num_inputs = ARRAY_SIZE(adv7842_inputs),
1024         .routes = adv7842_routes,
1025         .i2c_adapter_id = 0,
1026         .board_info = {
1027                 .type = "adv7842",
1028                 .addr = 0x20,
1029                 .platform_data = (void *)&adv7842_data,
1030         },
1031         .ppi_info = &ppi_info,
1032         .ppi_control = (PACK_EN | DLEN_8 | EPPI_CTL_FLDSEL
1033                         | EPPI_CTL_ACTIVE656),
1034 };
1035 #endif
1036
1037 static struct platform_device bfin_capture_device = {
1038         .name = "bfin_capture",
1039         .dev = {
1040                 .platform_data = &bfin_capture_data,
1041         },
1042 };
1043 #endif
1044
1045 #if defined(CONFIG_VIDEO_BLACKFIN_DISPLAY) \
1046         || defined(CONFIG_VIDEO_BLACKFIN_DISPLAY_MODULE)
1047 #include <linux/videodev2.h>
1048 #include <media/blackfin/bfin_display.h>
1049 #include <media/blackfin/ppi.h>
1050
1051 static const unsigned short ppi_req_disp[] = {
1052         P_PPI0_D0, P_PPI0_D1, P_PPI0_D2, P_PPI0_D3,
1053         P_PPI0_D4, P_PPI0_D5, P_PPI0_D6, P_PPI0_D7,
1054         P_PPI0_D8, P_PPI0_D9, P_PPI0_D10, P_PPI0_D11,
1055         P_PPI0_D12, P_PPI0_D13, P_PPI0_D14, P_PPI0_D15,
1056         P_PPI0_CLK, P_PPI0_FS1, P_PPI0_FS2,
1057         0,
1058 };
1059
1060 static const struct ppi_info ppi_info = {
1061         .type = PPI_TYPE_EPPI3,
1062         .dma_ch = CH_EPPI0_CH0,
1063         .irq_err = IRQ_EPPI0_STAT,
1064         .base = (void __iomem *)EPPI0_STAT,
1065         .pin_req = ppi_req_disp,
1066 };
1067
1068 #if defined(CONFIG_VIDEO_ADV7511) \
1069         || defined(CONFIG_VIDEO_ADV7511_MODULE)
1070 #include <media/adv7511.h>
1071
1072 static struct v4l2_output adv7511_outputs[] = {
1073         {
1074                 .index = 0,
1075                 .name = "HDMI",
1076                 .type = V4L2_INPUT_TYPE_CAMERA,
1077                 .capabilities = V4L2_OUT_CAP_DV_TIMINGS,
1078         },
1079 };
1080
1081 static struct disp_route adv7511_routes[] = {
1082         {
1083                 .output = 0,
1084         },
1085 };
1086
1087 static struct adv7511_platform_data adv7511_data = {
1088         .edid_addr = 0x7e,
1089         .i2c_ex = 0x25,
1090 };
1091
1092 static struct bfin_display_config bfin_display_data = {
1093         .card_name = "BF609",
1094         .outputs = adv7511_outputs,
1095         .num_outputs = ARRAY_SIZE(adv7511_outputs),
1096         .routes = adv7511_routes,
1097         .i2c_adapter_id = 0,
1098         .board_info = {
1099                 .type = "adv7511",
1100                 .addr = 0x39,
1101                 .platform_data = (void *)&adv7511_data,
1102         },
1103         .ppi_info = &ppi_info,
1104         .ppi_control = (EPPI_CTL_SPLTWRD | PACK_EN | DLEN_16
1105                         | EPPI_CTL_FS1LO_FS2LO | EPPI_CTL_POLC3
1106                         | EPPI_CTL_IFSGEN | EPPI_CTL_SYNC2
1107                         | EPPI_CTL_NON656 | EPPI_CTL_DIR),
1108 };
1109 #endif
1110
1111 static struct platform_device bfin_display_device = {
1112         .name = "bfin_display",
1113         .dev = {
1114                 .platform_data = &bfin_display_data,
1115         },
1116 };
1117 #endif
1118
1119 #if defined(CONFIG_BFIN_CRC)
1120 #define BFIN_CRC_NAME "bfin-crc"
1121
1122 static struct resource bfin_crc0_resources[] = {
1123         {
1124                 .start = REG_CRC0_CTL,
1125                 .end = REG_CRC0_REVID+4,
1126                 .flags = IORESOURCE_MEM,
1127         },
1128         {
1129                 .start = IRQ_CRC0_DCNTEXP,
1130                 .end = IRQ_CRC0_DCNTEXP,
1131                 .flags = IORESOURCE_IRQ,
1132         },
1133         {
1134                 .start = CH_MEM_STREAM0_SRC_CRC0,
1135                 .end = CH_MEM_STREAM0_SRC_CRC0,
1136                 .flags = IORESOURCE_DMA,
1137         },
1138         {
1139                 .start = CH_MEM_STREAM0_DEST_CRC0,
1140                 .end = CH_MEM_STREAM0_DEST_CRC0,
1141                 .flags = IORESOURCE_DMA,
1142         },
1143 };
1144
1145 static struct platform_device bfin_crc0_device = {
1146         .name = BFIN_CRC_NAME,
1147         .id = 0,
1148         .num_resources = ARRAY_SIZE(bfin_crc0_resources),
1149         .resource = bfin_crc0_resources,
1150 };
1151
1152 static struct resource bfin_crc1_resources[] = {
1153         {
1154                 .start = REG_CRC1_CTL,
1155                 .end = REG_CRC1_REVID+4,
1156                 .flags = IORESOURCE_MEM,
1157         },
1158         {
1159                 .start = IRQ_CRC1_DCNTEXP,
1160                 .end = IRQ_CRC1_DCNTEXP,
1161                 .flags = IORESOURCE_IRQ,
1162         },
1163         {
1164                 .start = CH_MEM_STREAM1_SRC_CRC1,
1165                 .end = CH_MEM_STREAM1_SRC_CRC1,
1166                 .flags = IORESOURCE_DMA,
1167         },
1168         {
1169                 .start = CH_MEM_STREAM1_DEST_CRC1,
1170                 .end = CH_MEM_STREAM1_DEST_CRC1,
1171                 .flags = IORESOURCE_DMA,
1172         },
1173 };
1174
1175 static struct platform_device bfin_crc1_device = {
1176         .name = BFIN_CRC_NAME,
1177         .id = 1,
1178         .num_resources = ARRAY_SIZE(bfin_crc1_resources),
1179         .resource = bfin_crc1_resources,
1180 };
1181 #endif
1182
1183 #if defined(CONFIG_CRYPTO_DEV_BFIN_CRC)
1184 #define BFIN_CRYPTO_CRC_NAME            "bfin-hmac-crc"
1185 #define BFIN_CRYPTO_CRC_POLY_DATA       0x5c5c5c5c
1186
1187 static struct resource bfin_crypto_crc_resources[] = {
1188         {
1189                 .start = REG_CRC0_CTL,
1190                 .end = REG_CRC0_REVID+4,
1191                 .flags = IORESOURCE_MEM,
1192         },
1193         {
1194                 .start = IRQ_CRC0_DCNTEXP,
1195                 .end = IRQ_CRC0_DCNTEXP,
1196                 .flags = IORESOURCE_IRQ,
1197         },
1198         {
1199                 .start = CH_MEM_STREAM0_SRC_CRC0,
1200                 .end = CH_MEM_STREAM0_SRC_CRC0,
1201                 .flags = IORESOURCE_DMA,
1202         },
1203 };
1204
1205 static struct platform_device bfin_crypto_crc_device = {
1206         .name = BFIN_CRYPTO_CRC_NAME,
1207         .id = 0,
1208         .num_resources = ARRAY_SIZE(bfin_crypto_crc_resources),
1209         .resource = bfin_crypto_crc_resources,
1210         .dev = {
1211                 .platform_data = (void *)BFIN_CRYPTO_CRC_POLY_DATA,
1212         },
1213 };
1214 #endif
1215
1216 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
1217 static const struct ad7877_platform_data bfin_ad7877_ts_info = {
1218         .model                  = 7877,
1219         .vref_delay_usecs       = 50,   /* internal, no capacitor */
1220         .x_plate_ohms           = 419,
1221         .y_plate_ohms           = 486,
1222         .pressure_max           = 1000,
1223         .pressure_min           = 0,
1224         .stopacq_polarity       = 1,
1225         .first_conversion_delay = 3,
1226         .acquisition_time       = 1,
1227         .averaging              = 1,
1228         .pen_down_acc_interval  = 1,
1229 };
1230 #endif
1231
1232 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1233 #include <linux/input.h>
1234 #include <linux/gpio_keys.h>
1235
1236 static struct gpio_keys_button bfin_gpio_keys_table[] = {
1237         {BTN_0, GPIO_PB10, 1, "gpio-keys: BTN0"},
1238         {BTN_1, GPIO_PE1, 1, "gpio-keys: BTN1"},
1239 };
1240
1241 static struct gpio_keys_platform_data bfin_gpio_keys_data = {
1242         .buttons        = bfin_gpio_keys_table,
1243         .nbuttons       = ARRAY_SIZE(bfin_gpio_keys_table),
1244 };
1245
1246 static struct platform_device bfin_device_gpiokeys = {
1247         .name      = "gpio-keys",
1248         .dev = {
1249                 .platform_data = &bfin_gpio_keys_data,
1250         },
1251 };
1252 #endif
1253
1254 static struct spi_board_info bfin_spi_board_info[] __initdata = {
1255 #if defined(CONFIG_MTD_M25P80) \
1256         || defined(CONFIG_MTD_M25P80_MODULE)
1257         {
1258                 /* the modalias must be the same as spi device driver name */
1259                 .modalias = "m25p80", /* Name of spi_driver for this device */
1260                 .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
1261                 .bus_num = 0, /* Framework bus number */
1262                 .chip_select = 1, /* SPI_SSEL1*/
1263                 .platform_data = &bfin_spi_flash_data,
1264                 .controller_data = &spi_flash_chip_info,
1265                 .mode = SPI_MODE_3,
1266         },
1267 #endif
1268 #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
1269         {
1270                 .modalias               = "ad7877",
1271                 .platform_data          = &bfin_ad7877_ts_info,
1272                 .irq                    = IRQ_PD9,
1273                 .max_speed_hz           = 12500000,     /* max spi clock (SCK) speed in HZ */
1274                 .bus_num                = 0,
1275                 .chip_select            = 4,
1276         },
1277 #endif
1278 #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
1279         {
1280                 .modalias = "spidev",
1281                 .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
1282                 .bus_num = 0,
1283                 .chip_select = 1,
1284                 .controller_data = &spidev_chip_info,
1285         },
1286 #endif
1287 #if defined(CONFIG_INPUT_ADXL34X_SPI) || defined(CONFIG_INPUT_ADXL34X_SPI_MODULE)
1288         {
1289                 .modalias               = "adxl34x",
1290                 .platform_data          = &adxl34x_info,
1291                 .irq                    = IRQ_PC5,
1292                 .max_speed_hz           = 5000000,     /* max spi clock (SCK) speed in HZ */
1293                 .bus_num                = 1,
1294                 .chip_select            = 2,
1295                 .mode = SPI_MODE_3,
1296         },
1297 #endif
1298 };
1299 #if defined(CONFIG_SPI_BFIN6XX) || defined(CONFIG_SPI_BFIN6XX_MODULE)
1300 /* SPI (0) */
1301 static struct resource bfin_spi0_resource[] = {
1302         {
1303                 .start = SPI0_REGBASE,
1304                 .end   = SPI0_REGBASE + 0xFF,
1305                 .flags = IORESOURCE_MEM,
1306         },
1307         {
1308                 .start = CH_SPI0_TX,
1309                 .end   = CH_SPI0_TX,
1310                 .flags = IORESOURCE_DMA,
1311         },
1312         {
1313                 .start = CH_SPI0_RX,
1314                 .end   = CH_SPI0_RX,
1315                 .flags = IORESOURCE_DMA,
1316         },
1317 };
1318
1319 /* SPI (1) */
1320 static struct resource bfin_spi1_resource[] = {
1321         {
1322                 .start = SPI1_REGBASE,
1323                 .end   = SPI1_REGBASE + 0xFF,
1324                 .flags = IORESOURCE_MEM,
1325         },
1326         {
1327                 .start = CH_SPI1_TX,
1328                 .end   = CH_SPI1_TX,
1329                 .flags = IORESOURCE_DMA,
1330         },
1331         {
1332                 .start = CH_SPI1_RX,
1333                 .end   = CH_SPI1_RX,
1334                 .flags = IORESOURCE_DMA,
1335         },
1336
1337 };
1338
1339 /* SPI controller data */
1340 static struct bfin6xx_spi_master bf60x_spi_master_info0 = {
1341         .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
1342         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
1343 };
1344
1345 static struct platform_device bf60x_spi_master0 = {
1346         .name = "bfin-spi",
1347         .id = 0, /* Bus number */
1348         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
1349         .resource = bfin_spi0_resource,
1350         .dev = {
1351                 .platform_data = &bf60x_spi_master_info0, /* Passed to driver */
1352         },
1353 };
1354
1355 static struct bfin6xx_spi_master bf60x_spi_master_info1 = {
1356         .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
1357         .pin_req = {P_SPI1_SCK, P_SPI1_MISO, P_SPI1_MOSI, 0},
1358 };
1359
1360 static struct platform_device bf60x_spi_master1 = {
1361         .name = "bfin-spi",
1362         .id = 1, /* Bus number */
1363         .num_resources = ARRAY_SIZE(bfin_spi1_resource),
1364         .resource = bfin_spi1_resource,
1365         .dev = {
1366                 .platform_data = &bf60x_spi_master_info1, /* Passed to driver */
1367         },
1368 };
1369 #endif  /* spi master and devices */
1370
1371 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1372 static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
1373
1374 static struct resource bfin_twi0_resource[] = {
1375         [0] = {
1376                 .start = TWI0_CLKDIV,
1377                 .end   = TWI0_CLKDIV + 0xFF,
1378                 .flags = IORESOURCE_MEM,
1379         },
1380         [1] = {
1381                 .start = IRQ_TWI0,
1382                 .end   = IRQ_TWI0,
1383                 .flags = IORESOURCE_IRQ,
1384         },
1385 };
1386
1387 static struct platform_device i2c_bfin_twi0_device = {
1388         .name = "i2c-bfin-twi",
1389         .id = 0,
1390         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
1391         .resource = bfin_twi0_resource,
1392         .dev = {
1393                 .platform_data = &bfin_twi0_pins,
1394         },
1395 };
1396
1397 static const u16 bfin_twi1_pins[] = {P_TWI1_SCL, P_TWI1_SDA, 0};
1398
1399 static struct resource bfin_twi1_resource[] = {
1400         [0] = {
1401                 .start = TWI1_CLKDIV,
1402                 .end   = TWI1_CLKDIV + 0xFF,
1403                 .flags = IORESOURCE_MEM,
1404         },
1405         [1] = {
1406                 .start = IRQ_TWI1,
1407                 .end   = IRQ_TWI1,
1408                 .flags = IORESOURCE_IRQ,
1409         },
1410 };
1411
1412 static struct platform_device i2c_bfin_twi1_device = {
1413         .name = "i2c-bfin-twi",
1414         .id = 1,
1415         .num_resources = ARRAY_SIZE(bfin_twi1_resource),
1416         .resource = bfin_twi1_resource,
1417         .dev = {
1418                 .platform_data = &bfin_twi1_pins,
1419         },
1420 };
1421 #endif
1422
1423 static struct i2c_board_info __initdata bfin_i2c_board_info0[] = {
1424 #if defined(CONFIG_INPUT_ADXL34X_I2C) || defined(CONFIG_INPUT_ADXL34X_I2C_MODULE)
1425         {
1426                 I2C_BOARD_INFO("adxl34x", 0x53),
1427                 .irq = IRQ_PC5,
1428                 .platform_data = (void *)&adxl34x_info,
1429         },
1430 #endif
1431 #if defined(CONFIG_SND_SOC_ADAU1761) || defined(CONFIG_SND_SOC_ADAU1761_MODULE)
1432         {
1433                 I2C_BOARD_INFO("adau1761", 0x38),
1434                 .platform_data = (void *)&adau1761_info
1435         },
1436 #endif
1437 #if defined(CONFIG_SND_SOC_SSM2602) || defined(CONFIG_SND_SOC_SSM2602_MODULE)
1438         {
1439                 I2C_BOARD_INFO("ssm2602", 0x1b),
1440         },
1441 #endif
1442 };
1443
1444 static struct i2c_board_info __initdata bfin_i2c_board_info1[] = {
1445 };
1446
1447 static const unsigned int cclk_vlev_datasheet[] =
1448 {
1449 /*
1450  * Internal VLEV BF54XSBBC1533
1451  ****temporarily using these values until data sheet is updated
1452  */
1453         VRPAIR(VLEV_085, 150000000),
1454         VRPAIR(VLEV_090, 250000000),
1455         VRPAIR(VLEV_110, 276000000),
1456         VRPAIR(VLEV_115, 301000000),
1457         VRPAIR(VLEV_120, 525000000),
1458         VRPAIR(VLEV_125, 550000000),
1459         VRPAIR(VLEV_130, 600000000),
1460 };
1461
1462 static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
1463         .tuple_tab = cclk_vlev_datasheet,
1464         .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
1465         .vr_settling_time = 25 /* us */,
1466 };
1467
1468 static struct platform_device bfin_dpmc = {
1469         .name = "bfin dpmc",
1470         .dev = {
1471                 .platform_data = &bfin_dmpc_vreg_data,
1472         },
1473 };
1474
1475 static struct platform_device *ezkit_devices[] __initdata = {
1476
1477         &bfin_dpmc,
1478
1479 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
1480         &rtc_device,
1481 #endif
1482
1483 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
1484 #ifdef CONFIG_SERIAL_BFIN_UART0
1485         &bfin_uart0_device,
1486 #endif
1487 #ifdef CONFIG_SERIAL_BFIN_UART1
1488         &bfin_uart1_device,
1489 #endif
1490 #endif
1491
1492 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
1493 #ifdef CONFIG_BFIN_SIR0
1494         &bfin_sir0_device,
1495 #endif
1496 #ifdef CONFIG_BFIN_SIR1
1497         &bfin_sir1_device,
1498 #endif
1499 #endif
1500
1501 #if defined(CONFIG_STMMAC_ETH) || defined(CONFIG_STMMAC_ETH_MODULE)
1502         &bfin_eth_device,
1503 #endif
1504
1505 #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
1506         &musb_device,
1507 #endif
1508
1509 #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
1510         &bfin_isp1760_device,
1511 #endif
1512
1513 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
1514 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1515         &bfin_sport0_uart_device,
1516 #endif
1517 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1518         &bfin_sport1_uart_device,
1519 #endif
1520 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
1521         &bfin_sport2_uart_device,
1522 #endif
1523 #endif
1524
1525 #if defined(CONFIG_CAN_BFIN) || defined(CONFIG_CAN_BFIN_MODULE)
1526         &bfin_can0_device,
1527 #endif
1528
1529 #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
1530         &bfin_nand_device,
1531 #endif
1532
1533 #if defined(CONFIG_SDH_BFIN) || defined(CONFIG_SDH_BFIN_MODULE)
1534         &bfin_sdh_device,
1535 #endif
1536
1537 #if defined(CONFIG_SPI_BFIN6XX) || defined(CONFIG_SPI_BFIN6XX_MODULE)
1538         &bf60x_spi_master0,
1539         &bf60x_spi_master1,
1540 #endif
1541
1542 #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
1543         &bfin_rotary_device,
1544 #endif
1545
1546 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
1547         &i2c_bfin_twi0_device,
1548 #if !defined(CONFIG_BF542)
1549         &i2c_bfin_twi1_device,
1550 #endif
1551 #endif
1552
1553 #if defined(CONFIG_BFIN_CRC)
1554         &bfin_crc0_device,
1555         &bfin_crc1_device,
1556 #endif
1557 #if defined(CONFIG_CRYPTO_DEV_BFIN_CRC)
1558         &bfin_crypto_crc_device,
1559 #endif
1560
1561 #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
1562         &bfin_device_gpiokeys,
1563 #endif
1564
1565 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
1566         &ezkit_flash_device,
1567 #endif
1568 #if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
1569         &bfin_i2s_pcm,
1570 #endif
1571 #if defined(CONFIG_SND_BF6XX_SOC_I2S) || \
1572         defined(CONFIG_SND_BF6XX_SOC_I2S_MODULE)
1573         &bfin_i2s,
1574 #endif
1575 #if defined(CONFIG_SND_BF5XX_SOC_AD1836) || \
1576         defined(CONFIG_SND_BF5XX_SOC_AD1836_MODULE)
1577         &bfin_ad1836_machine,
1578 #endif
1579 #if defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61) || \
1580         defined(CONFIG_SND_SOC_BFIN_EVAL_ADAU1X61_MODULE)
1581         &adau1761_device,
1582 #endif
1583 #if defined(CONFIG_VIDEO_BLACKFIN_CAPTURE) \
1584         || defined(CONFIG_VIDEO_BLACKFIN_CAPTURE_MODULE)
1585         &bfin_capture_device,
1586 #endif
1587 #if defined(CONFIG_VIDEO_BLACKFIN_DISPLAY) \
1588         || defined(CONFIG_VIDEO_BLACKFIN_DISPLAY_MODULE)
1589         &bfin_display_device,
1590 #endif
1591
1592 };
1593
1594 static int __init ezkit_init(void)
1595 {
1596         printk(KERN_INFO "%s(): registering device resources\n", __func__);
1597
1598         i2c_register_board_info(0, bfin_i2c_board_info0,
1599                                 ARRAY_SIZE(bfin_i2c_board_info0));
1600         i2c_register_board_info(1, bfin_i2c_board_info1,
1601                                 ARRAY_SIZE(bfin_i2c_board_info1));
1602
1603 #if defined(CONFIG_STMMAC_ETH) || defined(CONFIG_STMMAC_ETH_MODULE)
1604         if (!peripheral_request_list(pins, "emac0"))
1605                 printk(KERN_ERR "%s(): request emac pins failed\n", __func__);
1606 #endif
1607
1608         platform_add_devices(ezkit_devices, ARRAY_SIZE(ezkit_devices));
1609
1610         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
1611
1612         return 0;
1613 }
1614
1615 arch_initcall(ezkit_init);
1616
1617 static struct platform_device *ezkit_early_devices[] __initdata = {
1618 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1619 #ifdef CONFIG_SERIAL_BFIN_UART0
1620         &bfin_uart0_device,
1621 #endif
1622 #ifdef CONFIG_SERIAL_BFIN_UART1
1623         &bfin_uart1_device,
1624 #endif
1625 #endif
1626
1627 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
1628 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
1629         &bfin_sport0_uart_device,
1630 #endif
1631 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
1632         &bfin_sport1_uart_device,
1633 #endif
1634 #ifdef CONFIG_SERIAL_BFIN_SPORT2_UART
1635         &bfin_sport2_uart_device,
1636 #endif
1637 #endif
1638 };
1639
1640 void __init native_machine_early_platform_add_devices(void)
1641 {
1642         printk(KERN_INFO "register early platform devices\n");
1643         early_platform_add_devices(ezkit_early_devices,
1644                 ARRAY_SIZE(ezkit_early_devices));
1645 }