arch/i386/kernel/cpu/cpufreq/longhaul.c

   1 /*
   2  *  (C) 2001-2004  Dave Jones. <davej@codemonkey.org.uk>
   3  *  (C) 2002  Padraig Brady. <padraig@antefacto.com>
   4  *
   5  *  Licensed under the terms of the GNU GPL License version 2.
   6  *  Based upon datasheets & sample CPUs kindly provided by VIA.
   7  *
   8  *  VIA have currently 3 different versions of Longhaul.
   9  *  Version 1 (Longhaul) uses the BCR2 MSR at 0x1147.
  10  *   It is present only in Samuel 1 (C5A), Samuel 2 (C5B) stepping 0.
  11  *  Version 2 of longhaul is the same as v1, but adds voltage scaling.
  12  *   Present in Samuel 2 (steppings 1-7 only) (C5B), and Ezra (C5C)
  13  *   voltage scaling support has currently been disabled in this driver
  14  *   until we have code that gets it right.
  15  *  Version 3 of longhaul got renamed to Powersaver and redesigned
  16  *   to use the POWERSAVER MSR at 0x110a.
  17  *   It is present in Ezra-T (C5M), Nehemiah (C5X) and above.
  18  *   It's pretty much the same feature wise to longhaul v2, though
  19  *   there is provision for scaling FSB too, but this doesn't work
  20  *   too well in practice so we don't even try to use this.
  21  *
  22  *  BIG FAT DISCLAIMER: Work in progress code. Possibly *dangerous*
  23  */
  24
  25 #include <linux/kernel.h>
  26 #include <linux/module.h>
  27 #include <linux/moduleparam.h>
  28 #include <linux/init.h>
  29 #include <linux/cpufreq.h>
  30 #include <linux/slab.h>
  31 #include <linux/string.h>
  32 #include <linux/pci.h>
  33
  34 #include <asm/msr.h>
  35 #include <asm/timex.h>
  36 #include <asm/io.h>
  37
  38 #include "longhaul.h"
  39
  40 #define PFX "longhaul: "
  41
  42 #define TYPE_LONGHAUL_V1        1
  43 #define TYPE_LONGHAUL_V2        2
  44 #define TYPE_POWERSAVER         3
  45
  46 #define CPU_SAMUEL      1
  47 #define CPU_SAMUEL2     2
  48 #define CPU_EZRA        3
  49 #define CPU_EZRA_T      4
  50 #define CPU_NEHEMIAH    5
  51
  52 static int cpu_model;
  53 static unsigned int numscales=16, numvscales;
  54 static unsigned int fsb;
  55 static int minvid, maxvid;
  56 static unsigned int minmult, maxmult;
  57 static int can_scale_voltage;
  58 static int vrmrev;
  59
  60 /* Module parameters */
  61 static int dont_scale_voltage;
  62
  63
  64 #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "longhaul", msg)
  65
  66
  67 #define __hlt()     __asm__ __volatile__("hlt": : :"memory")
  68
  69 /* Clock ratios multiplied by 10 */
  70 static int clock_ratio[32];
  71 static int eblcr_table[32];
  72 static int voltage_table[32];
  73 static unsigned int highest_speed, lowest_speed; /* kHz */
  74 static int longhaul_version;
  75 static struct cpufreq_frequency_table *longhaul_table;
  76
  77 #ifdef CONFIG_CPU_FREQ_DEBUG
  78 static char speedbuffer[8];
  79
  80 static char *print_speed(int speed)
  81 {
  82         if (speed > 1000) {
  83                 if (speed%1000 == 0)
  84                         sprintf (speedbuffer, "%dGHz", speed/1000);
  85                 else
  86                         sprintf (speedbuffer, "%d.%dGHz", speed/1000, (speed%1000)/100);
  87         } else
  88                 sprintf (speedbuffer, "%dMHz", speed);
  89
  90         return speedbuffer;
  91 }
  92 #endif
  93
  94
  95 static unsigned int calc_speed(int mult)
  96 {
  97         int khz;
  98         khz = (mult/10)*fsb;
  99         if (mult%10)
 100                 khz += fsb/2;
 101         khz *= 1000;
 102         return khz;
 103 }
 104
 105
 106 static int longhaul_get_cpu_mult(void)
 107 {
 108         unsigned long invalue=0,lo, hi;
 109
 110         rdmsr (MSR_IA32_EBL_CR_POWERON, lo, hi);
 111         invalue = (lo & (1<<22|1<<23|1<<24|1<<25)) >>22;
 112         if (longhaul_version==TYPE_LONGHAUL_V2 || longhaul_version==TYPE_POWERSAVER) {
 113                 if (lo & (1<<27))
 114                         invalue+=16;
 115         }
 116         return eblcr_table[invalue];
 117 }
 118
 119
 120 static void do_powersaver(union msr_longhaul *longhaul,
 121                         unsigned int clock_ratio_index)
 122 {
 123         int version;
 124         unsigned long flags;
 125         struct pci_dev *dev;
 126         int i;
 127         u16 pci_cmd;
 128         u16 cmd_state[64];
 129
 130         switch (cpu_model) {
 131         case CPU_EZRA_T:
 132                 version = 3;
 133                 break;
 134         case CPU_NEHEMIAH:
 135                 version = 0xf;
 136                 break;
 137         default:
 138                 return;
 139         }
 140
 141         rdmsrl(MSR_VIA_LONGHAUL, longhaul->val);
 142         longhaul->bits.SoftBusRatio = clock_ratio_index & 0xf;
 143         longhaul->bits.SoftBusRatio4 = (clock_ratio_index & 0x10) >> 4;
 144         longhaul->bits.EnableSoftBusRatio = 1;
 145         longhaul->bits.RevisionKey = 0;
 146
 147         preempt_disable();
 148         local_irq_save(flags);
 149
 150         /*
 151          * get current pci bus master state for all devices
 152          * and clear bus master bit
 153          */
 154         dev = NULL;
 155         i = 0;
 156         do {
 157                 dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
 158                 if (dev != NULL) {
 159                         pci_read_config_word(dev, PCI_COMMAND, &pci_cmd);
 160                         cmd_state[i++] = pci_cmd;
 161                         pci_cmd &= ~PCI_COMMAND_MASTER;
 162                         pci_write_config_word(dev, PCI_COMMAND, pci_cmd);
 163                 }
 164         } while (dev != NULL);
 165
 166         local_irq_enable();
 167
 168         __hlt();
 169         wrmsrl(MSR_VIA_LONGHAUL, longhaul->val);
 170         __hlt();
 171
 172         local_irq_disable();
 173
 174         /* restore pci bus master state for all devices */
 175         dev = NULL;
 176         i = 0;
 177         do {
 178                 dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev);
 179                 if (dev != NULL) {
 180                         pci_cmd = cmd_state[i++];
 181                         pci_write_config_byte(dev, PCI_COMMAND, pci_cmd);
 182                 }
 183         } while (dev != NULL);
 184         local_irq_restore(flags);
 185         preempt_enable();
 186
 187         /* disable bus ratio bit */
 188         rdmsrl(MSR_VIA_LONGHAUL, longhaul->val);
 189         longhaul->bits.EnableSoftBusRatio = 0;
 190         longhaul->bits.RevisionKey = version;
 191         wrmsrl(MSR_VIA_LONGHAUL, longhaul->val);
 192 }
 193
 194 /**
 195  * longhaul_set_cpu_frequency()
 196  * @clock_ratio_index : bitpattern of the new multiplier.
 197  *
 198  * Sets a new clock ratio.
 199  */
 200
 201 static void longhaul_setstate(unsigned int clock_ratio_index)
 202 {
 203         int speed, mult;
 204         struct cpufreq_freqs freqs;
 205         union msr_longhaul longhaul;
 206         union msr_bcr2 bcr2;
 207         static unsigned int old_ratio=-1;
 208
 209         if (old_ratio == clock_ratio_index)
 210                 return;
 211         old_ratio = clock_ratio_index;
 212
 213         mult = clock_ratio[clock_ratio_index];
 214         if (mult == -1)
 215                 return;
 216
 217         speed = calc_speed(mult);
 218         if ((speed > highest_speed) || (speed < lowest_speed))
 219                 return;
 220
 221         freqs.old = calc_speed(longhaul_get_cpu_mult());
 222         freqs.new = speed;
 223         freqs.cpu = 0; /* longhaul.c is UP only driver */
 224
 225         cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
 226
 227         dprintk ("Setting to FSB:%dMHz Mult:%d.%dx (%s)\n",
 228                         fsb, mult/10, mult%10, print_speed(speed/1000));
 229
 230         switch (longhaul_version) {
 231
 232         /*
 233          * Longhaul v1. (Samuel[C5A] and Samuel2 stepping 0[C5B])
 234          * Software controlled multipliers only.
 235          *
 236          * *NB* Until we get voltage scaling working v1 & v2 are the same code.
 237          * Longhaul v2 appears in Samuel2 Steppings 1->7 [C5b] and Ezra [C5C]
 238          */
 239         case TYPE_LONGHAUL_V1:
 240         case TYPE_LONGHAUL_V2:
 241                 rdmsrl (MSR_VIA_BCR2, bcr2.val);
 242                 /* Enable software clock multiplier */
 243                 bcr2.bits.ESOFTBF = 1;
 244                 bcr2.bits.CLOCKMUL = clock_ratio_index;
 245                 local_irq_disable();
 246                 wrmsrl (MSR_VIA_BCR2, bcr2.val);
 247                 local_irq_enable();
 248
 249                 __hlt();
 250
 251                 /* Disable software clock multiplier */
 252                 rdmsrl (MSR_VIA_BCR2, bcr2.val);
 253                 bcr2.bits.ESOFTBF = 0;
 254                 local_irq_disable();
 255                 wrmsrl (MSR_VIA_BCR2, bcr2.val);
 256                 local_irq_enable();
 257                 break;
 258
 259         /*
 260          * Longhaul v3 (aka Powersaver). (Ezra-T [C5M] & Nehemiah [C5N])
 261          * We can scale voltage with this too, but that's currently
 262          * disabled until we come up with a decent 'match freq to voltage'
 263          * algorithm.
 264          * When we add voltage scaling, we will also need to do the
 265          * voltage/freq setting in order depending on the direction
 266          * of scaling (like we do in powernow-k7.c)
 267          * Nehemiah can do FSB scaling too, but this has never been proven
 268          * to work in practice.
 269          */
 270         case TYPE_POWERSAVER:
 271                 do_powersaver(&longhaul, clock_ratio_index);
 272                 break;
 273         }
 274
 275         cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
 276 }
 277
 278 /*
 279  * Centaur decided to make life a little more tricky.
 280  * Only longhaul v1 is allowed to read EBLCR BSEL[0:1].
 281  * Samuel2 and above have to try and guess what the FSB is.
 282  * We do this by assuming we booted at maximum multiplier, and interpolate
 283  * between that value multiplied by possible FSBs and cpu_mhz which
 284  * was calculated at boot time. Really ugly, but no other way to do this.
 285  */
 286
 287 #define ROUNDING        0xf
 288
 289 static int _guess(int guess)
 290 {
 291         int target;
 292
 293         target = ((maxmult/10)*guess);
 294         if (maxmult%10 != 0)
 295                 target += (guess/2);
 296         target += ROUNDING/2;
 297         target &= ~ROUNDING;
 298         return target;
 299 }
 300
 301
 302 static int guess_fsb(void)
 303 {
 304         int speed = (cpu_khz/1000);
 305         int i;
 306         int speeds[3] = { 66, 100, 133 };
 307
 308         speed += ROUNDING/2;
 309         speed &= ~ROUNDING;
 310
 311         for (i=0; i<3; i++) {
 312                 if (_guess(speeds[i]) == speed)
 313                         return speeds[i];
 314         }
 315         return 0;
 316 }
 317
 318
 319 static int __init longhaul_get_ranges(void)
 320 {
 321         unsigned long invalue;
 322         unsigned int multipliers[32]= {
 323                 50,30,40,100,55,35,45,95,90,70,80,60,120,75,85,65,
 324                 -1,110,120,-1,135,115,125,105,130,150,160,140,-1,155,-1,145 };
 325         unsigned int j, k = 0;
 326         union msr_longhaul longhaul;
 327         unsigned long lo, hi;
 328         unsigned int eblcr_fsb_table_v1[] = { 66, 133, 100, -1 };
 329         unsigned int eblcr_fsb_table_v2[] = { 133, 100, -1, 66 };
 330
 331         switch (longhaul_version) {
 332         case TYPE_LONGHAUL_V1:
 333         case TYPE_LONGHAUL_V2:
 334                 /* Ugh, Longhaul v1 didn't have the min/max MSRs.
 335                    Assume min=3.0x & max = whatever we booted at. */
 336                 minmult = 30;
 337                 maxmult = longhaul_get_cpu_mult();
 338                 rdmsr (MSR_IA32_EBL_CR_POWERON, lo, hi);
 339                 invalue = (lo & (1<<18|1<<19)) >>18;
 340                 if (cpu_model==CPU_SAMUEL || cpu_model==CPU_SAMUEL2)
 341                         fsb = eblcr_fsb_table_v1[invalue];
 342                 else
 343                         fsb = guess_fsb();
 344                 break;
 345
 346         case TYPE_POWERSAVER:
 347                 /* Ezra-T */
 348                 if (cpu_model==CPU_EZRA_T) {
 349                         rdmsrl (MSR_VIA_LONGHAUL, longhaul.val);
 350                         invalue = longhaul.bits.MaxMHzBR;
 351                         if (longhaul.bits.MaxMHzBR4)
 352                                 invalue += 16;
 353                         maxmult=multipliers[invalue];
 354
 355                         invalue = longhaul.bits.MinMHzBR;
 356                         if (longhaul.bits.MinMHzBR4 == 1)
 357                                 minmult = 30;
 358                         else
 359                                 minmult = multipliers[invalue];
 360                         fsb = eblcr_fsb_table_v2[longhaul.bits.MaxMHzFSB];
 361                         break;
 362                 }
 363
 364                 /* Nehemiah */
 365                 if (cpu_model==CPU_NEHEMIAH) {
 366                         rdmsrl (MSR_VIA_LONGHAUL, longhaul.val);
 367
 368                         /*
 369                          * TODO: This code works, but raises a lot of questions.
 370                          * - Some Nehemiah's seem to have broken Min/MaxMHzBR's.
 371                          *   We get around this by using a hardcoded multiplier of 4.0x
 372                          *   for the minimimum speed, and the speed we booted up at for the max.
 373                          *   This is done in longhaul_get_cpu_mult() by reading the EBLCR register.
 374                          * - According to some VIA documentation EBLCR is only
 375                          *   in pre-Nehemiah C3s. How this still works is a mystery.
 376                          *   We're possibly using something undocumented and unsupported,
 377                          *   But it works, so we don't grumble.
 378                          */
 379                         minmult=40;
 380                         maxmult=longhaul_get_cpu_mult();
 381
 382                         /* Starting with the 1.2GHz parts, theres a 200MHz bus. */
 383                         if ((cpu_khz/1000) > 1200)
 384                                 fsb = 200;
 385                         else
 386                                 fsb = eblcr_fsb_table_v2[longhaul.bits.MaxMHzFSB];
 387                         break;
 388                 }
 389         }
 390
 391         dprintk ("MinMult:%d.%dx MaxMult:%d.%dx\n",
 392                  minmult/10, minmult%10, maxmult/10, maxmult%10);
 393
 394         if (fsb == -1) {
 395                 printk (KERN_INFO PFX "Invalid (reserved) FSB!\n");
 396                 return -EINVAL;
 397         }
 398
 399         highest_speed = calc_speed(maxmult);
 400         lowest_speed = calc_speed(minmult);
 401         dprintk ("FSB:%dMHz  Lowest speed: %s   Highest speed:%s\n", fsb,
 402                  print_speed(lowest_speed/1000),
 403                  print_speed(highest_speed/1000));
 404
 405         if (lowest_speed == highest_speed) {
 406                 printk (KERN_INFO PFX "highestspeed == lowest, aborting.\n");
 407                 return -EINVAL;
 408         }
 409         if (lowest_speed > highest_speed) {
 410                 printk (KERN_INFO PFX "nonsense! lowest (%d > %d) !\n",
 411                         lowest_speed, highest_speed);
 412                 return -EINVAL;
 413         }
 414
 415         longhaul_table = kmalloc((numscales + 1) * sizeof(struct cpufreq_frequency_table), GFP_KERNEL);
 416         if(!longhaul_table)
 417                 return -ENOMEM;
 418
 419         for (j=0; j < numscales; j++) {
 420                 unsigned int ratio;
 421                 ratio = clock_ratio[j];
 422                 if (ratio == -1)
 423                         continue;
 424                 if (ratio > maxmult || ratio < minmult)
 425                         continue;
 426                 longhaul_table[k].frequency = calc_speed(ratio);
 427                 longhaul_table[k].index = j;
 428                 k++;
 429         }
 430
 431         longhaul_table[k].frequency = CPUFREQ_TABLE_END;
 432         if (!k) {
 433                 kfree (longhaul_table);
 434                 return -EINVAL;
 435         }
 436
 437         return 0;
 438 }
 439
 440
 441 static void __init longhaul_setup_voltagescaling(void)
 442 {
 443         union msr_longhaul longhaul;
 444
 445         rdmsrl (MSR_VIA_LONGHAUL, longhaul.val);
 446
 447         if (!(longhaul.bits.RevisionID & 1))
 448                 return;
 449
 450         minvid = longhaul.bits.MinimumVID;
 451         maxvid = longhaul.bits.MaximumVID;
 452         vrmrev = longhaul.bits.VRMRev;
 453
 454         if (minvid == 0 || maxvid == 0) {
 455                 printk (KERN_INFO PFX "Bogus values Min:%d.%03d Max:%d.%03d. "
 456                                         "Voltage scaling disabled.\n",
 457                                         minvid/1000, minvid%1000, maxvid/1000, maxvid%1000);
 458                 return;
 459         }
 460
 461         if (minvid == maxvid) {
 462                 printk (KERN_INFO PFX "Claims to support voltage scaling but min & max are "
 463                                 "both %d.%03d. Voltage scaling disabled\n",
 464                                 maxvid/1000, maxvid%1000);
 465                 return;
 466         }
 467
 468         if (vrmrev==0) {
 469                 dprintk ("VRM 8.5 \n");
 470                 memcpy (voltage_table, vrm85scales, sizeof(voltage_table));
 471                 numvscales = (voltage_table[maxvid]-voltage_table[minvid])/25;
 472         } else {
 473                 dprintk ("Mobile VRM \n");
 474                 memcpy (voltage_table, mobilevrmscales, sizeof(voltage_table));
 475                 numvscales = (voltage_table[maxvid]-voltage_table[minvid])/5;
 476         }
 477
 478         /* Current voltage isn't readable at first, so we need to
 479            set it to a known value. The spec says to use maxvid */
 480         longhaul.bits.RevisionKey = longhaul.bits.RevisionID;   /* FIXME: This is bad. */
 481         longhaul.bits.EnableSoftVID = 1;
 482         longhaul.bits.SoftVID = maxvid;
 483         wrmsrl (MSR_VIA_LONGHAUL, longhaul.val);
 484
 485         minvid = voltage_table[minvid];
 486         maxvid = voltage_table[maxvid];
 487
 488         dprintk ("Min VID=%d.%03d Max VID=%d.%03d, %d possible voltage scales\n",
 489                 maxvid/1000, maxvid%1000, minvid/1000, minvid%1000, numvscales);
 490
 491         can_scale_voltage = 1;
 492 }
 493
 494
 495 static int longhaul_verify(struct cpufreq_policy *policy)
 496 {
 497         return cpufreq_frequency_table_verify(policy, longhaul_table);
 498 }
 499
 500
 501 static int longhaul_target(struct cpufreq_policy *policy,
 502                             unsigned int target_freq, unsigned int relation)
 503 {
 504         unsigned int table_index = 0;
 505         unsigned int new_clock_ratio = 0;
 506
 507         if (cpufreq_frequency_table_target(policy, longhaul_table, target_freq, relation, &table_index))
 508                 return -EINVAL;
 509
 510         new_clock_ratio = longhaul_table[table_index].index & 0xFF;
 511
 512         longhaul_setstate(new_clock_ratio);
 513
 514         return 0;
 515 }
 516
 517
 518 static unsigned int longhaul_get(unsigned int cpu)
 519 {
 520         if (cpu)
 521                 return 0;
 522         return calc_speed(longhaul_get_cpu_mult());
 523 }
 524
 525
 526 static int __init longhaul_cpu_init(struct cpufreq_policy *policy)
 527 {
 528         struct cpuinfo_x86 *c = cpu_data;
 529         char *cpuname=NULL;
 530         int ret;
 531
 532         switch (c->x86_model) {
 533         case 6:
 534                 cpu_model = CPU_SAMUEL;
 535                 cpuname = "C3 'Samuel' [C5A]";
 536                 longhaul_version = TYPE_LONGHAUL_V1;
 537                 memcpy (clock_ratio, samuel1_clock_ratio, sizeof(samuel1_clock_ratio));
 538                 memcpy (eblcr_table, samuel1_eblcr, sizeof(samuel1_eblcr));
 539                 break;
 540
 541         case 7:
 542                 longhaul_version = TYPE_LONGHAUL_V1;
 543                 switch (c->x86_mask) {
 544                 case 0:
 545                         cpu_model = CPU_SAMUEL2;
 546                         cpuname = "C3 'Samuel 2' [C5B]";
 547                         /* Note, this is not a typo, early Samuel2's had Samuel1 ratios. */
 548                         memcpy (clock_ratio, samuel1_clock_ratio, sizeof(samuel1_clock_ratio));
 549                         memcpy (eblcr_table, samuel2_eblcr, sizeof(samuel2_eblcr));
 550                         break;
 551                 case 1 ... 15:
 552                         if (c->x86_mask < 8) {
 553                                 cpu_model = CPU_SAMUEL2;
 554                                 cpuname = "C3 'Samuel 2' [C5B]";
 555                         } else {
 556                                 cpu_model = CPU_EZRA;
 557                                 cpuname = "C3 'Ezra' [C5C]";
 558                         }
 559                         memcpy (clock_ratio, ezra_clock_ratio, sizeof(ezra_clock_ratio));
 560                         memcpy (eblcr_table, ezra_eblcr, sizeof(ezra_eblcr));
 561                         break;
 562                 }
 563                 break;
 564
 565         case 8:
 566                 cpu_model = CPU_EZRA_T;
 567                 cpuname = "C3 'Ezra-T' [C5M]";
 568                 longhaul_version = TYPE_POWERSAVER;
 569                 numscales=32;
 570                 memcpy (clock_ratio, ezrat_clock_ratio, sizeof(ezrat_clock_ratio));
 571                 memcpy (eblcr_table, ezrat_eblcr, sizeof(ezrat_eblcr));
 572                 break;
 573
 574         case 9:
 575                 cpu_model = CPU_NEHEMIAH;
 576                 longhaul_version = TYPE_POWERSAVER;
 577                 numscales=32;
 578                 switch (c->x86_mask) {
 579                 case 0 ... 1:
 580                         cpuname = "C3 'Nehemiah A' [C5N]";
 581                         memcpy (clock_ratio, nehemiah_a_clock_ratio, sizeof(nehemiah_a_clock_ratio));
 582                         memcpy (eblcr_table, nehemiah_a_eblcr, sizeof(nehemiah_a_eblcr));
 583                         break;
 584                 case 2 ... 4:
 585                         cpuname = "C3 'Nehemiah B' [C5N]";
 586                         memcpy (clock_ratio, nehemiah_b_clock_ratio, sizeof(nehemiah_b_clock_ratio));
 587                         memcpy (eblcr_table, nehemiah_b_eblcr, sizeof(nehemiah_b_eblcr));
 588                         break;
 589                 case 5 ... 15:
 590                         cpuname = "C3 'Nehemiah C' [C5N]";
 591                         memcpy (clock_ratio, nehemiah_c_clock_ratio, sizeof(nehemiah_c_clock_ratio));
 592                         memcpy (eblcr_table, nehemiah_c_eblcr, sizeof(nehemiah_c_eblcr));
 593                         break;
 594                 }
 595                 break;
 596
 597         default:
 598                 cpuname = "Unknown";
 599                 break;
 600         }
 601
 602         printk (KERN_INFO PFX "VIA %s CPU detected.  ", cpuname);
 603         switch (longhaul_version) {
 604         case TYPE_LONGHAUL_V1:
 605         case TYPE_LONGHAUL_V2:
 606                 printk ("Longhaul v%d supported.\n", longhaul_version);
 607                 break;
 608         case TYPE_POWERSAVER:
 609                 printk ("Powersaver supported.\n");
 610                 break;
 611         };
 612
 613         ret = longhaul_get_ranges();
 614         if (ret != 0)
 615                 return ret;
 616
 617         if ((longhaul_version==TYPE_LONGHAUL_V2 || longhaul_version==TYPE_POWERSAVER) &&
 618                  (dont_scale_voltage==0))
 619                 longhaul_setup_voltagescaling();
 620
 621         policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
 622         policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL;
 623         policy->cur = calc_speed(longhaul_get_cpu_mult());
 624
 625         ret = cpufreq_frequency_table_cpuinfo(policy, longhaul_table);
 626         if (ret)
 627                 return ret;
 628
 629         cpufreq_frequency_table_get_attr(longhaul_table, policy->cpu);
 630
 631         return 0;
 632 }
 633
 634 static int __devexit longhaul_cpu_exit(struct cpufreq_policy *policy)
 635 {
 636         cpufreq_frequency_table_put_attr(policy->cpu);
 637         return 0;
 638 }
 639
 640 static struct freq_attr* longhaul_attr[] = {
 641         &cpufreq_freq_attr_scaling_available_freqs,
 642         NULL,
 643 };
 644
 645 static struct cpufreq_driver longhaul_driver = {
 646         .verify = longhaul_verify,
 647         .target = longhaul_target,
 648         .get    = longhaul_get,
 649         .init   = longhaul_cpu_init,
 650         .exit   = __devexit_p(longhaul_cpu_exit),
 651         .name   = "longhaul",
 652         .owner  = THIS_MODULE,
 653         .attr   = longhaul_attr,
 654 };
 655
 656
 657 static int __init longhaul_init(void)
 658 {
 659         struct cpuinfo_x86 *c = cpu_data;
 660
 661         if (c->x86_vendor != X86_VENDOR_CENTAUR || c->x86 != 6)
 662                 return -ENODEV;
 663
 664         switch (c->x86_model) {
 665         case 6 ... 9:
 666                 return cpufreq_register_driver(&longhaul_driver);
 667         default:
 668                 printk (KERN_INFO PFX "Unknown VIA CPU. Contact davej@codemonkey.org.uk\n");
 669         }
 670
 671         return -ENODEV;
 672 }
 673
 674
 675 static void __exit longhaul_exit(void)
 676 {
 677         int i=0;
 678
 679         for (i=0; i < numscales; i++) {
 680                 if (clock_ratio[i] == maxmult) {
 681                         longhaul_setstate(i);
 682                         break;
 683                 }
 684         }
 685
 686         cpufreq_unregister_driver(&longhaul_driver);
 687         kfree(longhaul_table);
 688 }
 689
 690 module_param (dont_scale_voltage, int, 0644);
 691 MODULE_PARM_DESC(dont_scale_voltage, "Don't scale voltage of processor");
 692
 693 MODULE_AUTHOR ("Dave Jones <davej@codemonkey.org.uk>");
 694 MODULE_DESCRIPTION ("Longhaul driver for VIA Cyrix processors.");
 695 MODULE_LICENSE ("GPL");
 696
 697 module_init(longhaul_init);
 698 module_exit(longhaul_exit);
 699