arch/i386/kernel/cpu/cpufreq/p4-clockmod.c

   1 /*
   2  *      Pentium 4/Xeon CPU on demand clock modulation/speed scaling
   3  *      (C) 2002 - 2003 Dominik Brodowski <linux@brodo.de>
   4  *      (C) 2002 Zwane Mwaikambo <zwane@commfireservices.com>
   5  *      (C) 2002 Arjan van de Ven <arjanv@redhat.com>
   6  *      (C) 2002 Tora T. Engstad
   7  *      All Rights Reserved
   8  *
   9  *      This program is free software; you can redistribute it and/or
  10  *      modify it under the terms of the GNU General Public License
  11  *      as published by the Free Software Foundation; either version
  12  *      2 of the License, or (at your option) any later version.
  13  *
  14  *      The author(s) of this software shall not be held liable for damages
  15  *      of any nature resulting due to the use of this software. This
  16  *      software is provided AS-IS with no warranties.
  17  *
  18  *      Date            Errata                  Description
  19  *      20020525        N44, O17        12.5% or 25% DC causes lockup
  20  *
  21  */
  22
  23 #include <linux/config.h>
  24 #include <linux/kernel.h>
  25 #include <linux/module.h>
  26 #include <linux/init.h>
  27 #include <linux/smp.h>
  28 #include <linux/cpufreq.h>
  29 #include <linux/slab.h>
  30 #include <linux/cpumask.h>
  31 #include <linux/sched.h>        /* current / set_cpus_allowed() */
  32
  33 #include <asm/processor.h>
  34 #include <asm/msr.h>
  35 #include <asm/timex.h>
  36
  37 #include "speedstep-lib.h"
  38
  39 #define PFX     "p4-clockmod: "
  40 #define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "p4-clockmod", msg)
  41
  42 /*
  43  * Duty Cycle (3bits), note DC_DISABLE is not specified in
  44  * intel docs i just use it to mean disable
  45  */
  46 enum {
  47         DC_RESV, DC_DFLT, DC_25PT, DC_38PT, DC_50PT,
  48         DC_64PT, DC_75PT, DC_88PT, DC_DISABLE
  49 };
  50
  51 #define DC_ENTRIES      8
  52
  53
  54 static int has_N44_O17_errata[NR_CPUS];
  55 static unsigned int stock_freq;
  56 static struct cpufreq_driver p4clockmod_driver;
  57 static unsigned int cpufreq_p4_get(unsigned int cpu);
  58
  59 static int cpufreq_p4_setdc(unsigned int cpu, unsigned int newstate)
  60 {
  61         u32 l, h;
  62
  63         if (!cpu_online(cpu) || (newstate > DC_DISABLE) || (newstate == DC_RESV))
  64                 return -EINVAL;
  65
  66         rdmsr(MSR_IA32_THERM_STATUS, l, h);
  67
  68         if (l & 0x01)
  69                 dprintk("CPU#%d currently thermal throttled\n", cpu);
  70
  71         if (has_N44_O17_errata[cpu] && (newstate == DC_25PT || newstate == DC_DFLT))
  72                 newstate = DC_38PT;
  73
  74         rdmsr(MSR_IA32_THERM_CONTROL, l, h);
  75         if (newstate == DC_DISABLE) {
  76                 dprintk("CPU#%d disabling modulation\n", cpu);
  77                 wrmsr(MSR_IA32_THERM_CONTROL, l & ~(1<<4), h);
  78         } else {
  79                 dprintk("CPU#%d setting duty cycle to %d%%\n",
  80                         cpu, ((125 * newstate) / 10));
  81                 /* bits 63 - 5  : reserved
  82                  * bit  4       : enable/disable
  83                  * bits 3-1     : duty cycle
  84                  * bit  0       : reserved
  85                  */
  86                 l = (l & ~14);
  87                 l = l | (1<<4) | ((newstate & 0x7)<<1);
  88                 wrmsr(MSR_IA32_THERM_CONTROL, l, h);
  89         }
  90
  91         return 0;
  92 }
  93
  94
  95 static struct cpufreq_frequency_table p4clockmod_table[] = {
  96         {DC_RESV, CPUFREQ_ENTRY_INVALID},
  97         {DC_DFLT, 0},
  98         {DC_25PT, 0},
  99         {DC_38PT, 0},
 100         {DC_50PT, 0},
 101         {DC_64PT, 0},
 102         {DC_75PT, 0},
 103         {DC_88PT, 0},
 104         {DC_DISABLE, 0},
 105         {DC_RESV, CPUFREQ_TABLE_END},
 106 };
 107
 108
 109 static int cpufreq_p4_target(struct cpufreq_policy *policy,
 110                              unsigned int target_freq,
 111                              unsigned int relation)
 112 {
 113         unsigned int    newstate = DC_RESV;
 114         struct cpufreq_freqs freqs;
 115         cpumask_t cpus_allowed;
 116         int i;
 117
 118         if (cpufreq_frequency_table_target(policy, &p4clockmod_table[0], target_freq, relation, &newstate))
 119                 return -EINVAL;
 120
 121         freqs.old = cpufreq_p4_get(policy->cpu);
 122         freqs.new = stock_freq * p4clockmod_table[newstate].index / 8;
 123
 124         if (freqs.new == freqs.old)
 125                 return 0;
 126
 127         /* notifiers */
 128         for_each_cpu_mask(i, policy->cpus) {
 129                 freqs.cpu = i;
 130                 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
 131         }
 132
 133         /* run on each logical CPU, see section 13.15.3 of IA32 Intel Architecture Software
 134          * Developer's Manual, Volume 3
 135          */
 136         cpus_allowed = current->cpus_allowed;
 137
 138         for_each_cpu_mask(i, policy->cpus) {
 139                 cpumask_t this_cpu = cpumask_of_cpu(i);
 140
 141                 set_cpus_allowed(current, this_cpu);
 142                 BUG_ON(smp_processor_id() != i);
 143
 144                 cpufreq_p4_setdc(i, p4clockmod_table[newstate].index);
 145         }
 146         set_cpus_allowed(current, cpus_allowed);
 147
 148         /* notifiers */
 149         for_each_cpu_mask(i, policy->cpus) {
 150                 freqs.cpu = i;
 151                 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
 152         }
 153
 154         return 0;
 155 }
 156
 157
 158 static int cpufreq_p4_verify(struct cpufreq_policy *policy)
 159 {
 160         return cpufreq_frequency_table_verify(policy, &p4clockmod_table[0]);
 161 }
 162
 163
 164 static unsigned int cpufreq_p4_get_frequency(struct cpuinfo_x86 *c)
 165 {
 166         if ((c->x86 == 0x06) && (c->x86_model == 0x09)) {
 167                 /* Pentium M (Banias) */
 168                 printk(KERN_WARNING PFX "Warning: Pentium M detected. "
 169                        "The speedstep_centrino module offers voltage scaling"
 170                        " in addition of frequency scaling. You should use "
 171                        "that instead of p4-clockmod, if possible.\n");
 172                 return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_PM);
 173         }
 174
 175         if ((c->x86 == 0x06) && (c->x86_model == 0x0D)) {
 176                 /* Pentium M (Dothan) */
 177                 printk(KERN_WARNING PFX "Warning: Pentium M detected. "
 178                        "The speedstep_centrino module offers voltage scaling"
 179                        " in addition of frequency scaling. You should use "
 180                        "that instead of p4-clockmod, if possible.\n");
 181                 /* on P-4s, the TSC runs with constant frequency independent whether
 182                  * throttling is active or not. */
 183                 p4clockmod_driver.flags |= CPUFREQ_CONST_LOOPS;
 184                 return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_PM);
 185         }
 186
 187         if (c->x86 != 0xF) {
 188                 printk(KERN_WARNING PFX "Unknown p4-clockmod-capable CPU. Please send an e-mail to <linux@brodo.de>\n");
 189                 return 0;
 190         }
 191
 192         /* on P-4s, the TSC runs with constant frequency independent whether
 193          * throttling is active or not. */
 194         p4clockmod_driver.flags |= CPUFREQ_CONST_LOOPS;
 195
 196         if (speedstep_detect_processor() == SPEEDSTEP_PROCESSOR_P4M) {
 197                 printk(KERN_WARNING PFX "Warning: Pentium 4-M detected. "
 198                        "The speedstep-ich or acpi cpufreq modules offer "
 199                        "voltage scaling in addition of frequency scaling. "
 200                        "You should use either one instead of p4-clockmod, "
 201                        "if possible.\n");
 202                 return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_P4M);
 203         }
 204
 205         return speedstep_get_processor_frequency(SPEEDSTEP_PROCESSOR_P4D);
 206 }
 207
 208
 209
 210 static int cpufreq_p4_cpu_init(struct cpufreq_policy *policy)
 211 {
 212         struct cpuinfo_x86 *c = &cpu_data[policy->cpu];
 213         int cpuid = 0;
 214         unsigned int i;
 215
 216 #ifdef CONFIG_SMP
 217         policy->cpus = cpu_sibling_map[policy->cpu];
 218 #endif
 219
 220         /* Errata workaround */
 221         cpuid = (c->x86 << 8) | (c->x86_model << 4) | c->x86_mask;
 222         switch (cpuid) {
 223         case 0x0f07:
 224         case 0x0f0a:
 225         case 0x0f11:
 226         case 0x0f12:
 227                 has_N44_O17_errata[policy->cpu] = 1;
 228                 dprintk("has errata -- disabling low frequencies\n");
 229         }
 230
 231         /* get max frequency */
 232         stock_freq = cpufreq_p4_get_frequency(c);
 233         if (!stock_freq)
 234                 return -EINVAL;
 235
 236         /* table init */
 237         for (i=1; (p4clockmod_table[i].frequency != CPUFREQ_TABLE_END); i++) {
 238                 if ((i<2) && (has_N44_O17_errata[policy->cpu]))
 239                         p4clockmod_table[i].frequency = CPUFREQ_ENTRY_INVALID;
 240                 else
 241                         p4clockmod_table[i].frequency = (stock_freq * i)/8;
 242         }
 243         cpufreq_frequency_table_get_attr(p4clockmod_table, policy->cpu);
 244
 245         /* cpuinfo and default policy values */
 246         policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
 247         policy->cpuinfo.transition_latency = 1000000; /* assumed */
 248         policy->cur = stock_freq;
 249
 250         return cpufreq_frequency_table_cpuinfo(policy, &p4clockmod_table[0]);
 251 }
 252
 253
 254 static int cpufreq_p4_cpu_exit(struct cpufreq_policy *policy)
 255 {
 256         cpufreq_frequency_table_put_attr(policy->cpu);
 257         return 0;
 258 }
 259
 260 static unsigned int cpufreq_p4_get(unsigned int cpu)
 261 {
 262         cpumask_t cpus_allowed;
 263         u32 l, h;
 264
 265         cpus_allowed = current->cpus_allowed;
 266
 267         set_cpus_allowed(current, cpumask_of_cpu(cpu));
 268         BUG_ON(smp_processor_id() != cpu);
 269
 270         rdmsr(MSR_IA32_THERM_CONTROL, l, h);
 271
 272         set_cpus_allowed(current, cpus_allowed);
 273
 274         if (l & 0x10) {
 275                 l = l >> 1;
 276                 l &= 0x7;
 277         } else
 278                 l = DC_DISABLE;
 279
 280         if (l != DC_DISABLE)
 281                 return (stock_freq * l / 8);
 282
 283         return stock_freq;
 284 }
 285
 286 static struct freq_attr* p4clockmod_attr[] = {
 287         &cpufreq_freq_attr_scaling_available_freqs,
 288         NULL,
 289 };
 290
 291 static struct cpufreq_driver p4clockmod_driver = {
 292         .verify         = cpufreq_p4_verify,
 293         .target         = cpufreq_p4_target,
 294         .init           = cpufreq_p4_cpu_init,
 295         .exit           = cpufreq_p4_cpu_exit,
 296         .get            = cpufreq_p4_get,
 297         .name           = "p4-clockmod",
 298         .owner          = THIS_MODULE,
 299         .attr           = p4clockmod_attr,
 300 };
 301
 302
 303 static int __init cpufreq_p4_init(void)
 304 {
 305         struct cpuinfo_x86 *c = cpu_data;
 306         int ret;
 307
 308         /*
 309          * THERM_CONTROL is architectural for IA32 now, so
 310          * we can rely on the capability checks
 311          */
 312         if (c->x86_vendor != X86_VENDOR_INTEL)
 313                 return -ENODEV;
 314
 315         if (!test_bit(X86_FEATURE_ACPI, c->x86_capability) ||
 316                 !test_bit(X86_FEATURE_ACC, c->x86_capability))
 317                 return -ENODEV;
 318
 319         ret = cpufreq_register_driver(&p4clockmod_driver);
 320         if (!ret)
 321                 printk(KERN_INFO PFX "P4/Xeon(TM) CPU On-Demand Clock Modulation available\n");
 322
 323         return (ret);
 324 }
 325
 326
 327 static void __exit cpufreq_p4_exit(void)
 328 {
 329         cpufreq_unregister_driver(&p4clockmod_driver);
 330 }
 331
 332
 333 MODULE_AUTHOR ("Zwane Mwaikambo <zwane@commfireservices.com>");
 334 MODULE_DESCRIPTION ("cpufreq driver for Pentium(TM) 4/Xeon(TM)");
 335 MODULE_LICENSE ("GPL");
 336
 337 late_initcall(cpufreq_p4_init);
 338 module_exit(cpufreq_p4_exit);