[PATCH] x86: privilege cleanup
[deliverable/linux.git] / arch / i386 / kernel / traps.c
1 /*
2 * linux/arch/i386/traps.c
3 *
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 *
6 * Pentium III FXSR, SSE support
7 * Gareth Hughes <gareth@valinux.com>, May 2000
8 */
9
10 /*
11 * 'Traps.c' handles hardware traps and faults after we have saved some
12 * state in 'asm.s'.
13 */
14 #include <linux/config.h>
15 #include <linux/sched.h>
16 #include <linux/kernel.h>
17 #include <linux/string.h>
18 #include <linux/errno.h>
19 #include <linux/timer.h>
20 #include <linux/mm.h>
21 #include <linux/init.h>
22 #include <linux/delay.h>
23 #include <linux/spinlock.h>
24 #include <linux/interrupt.h>
25 #include <linux/highmem.h>
26 #include <linux/kallsyms.h>
27 #include <linux/ptrace.h>
28 #include <linux/utsname.h>
29 #include <linux/kprobes.h>
30 #include <linux/kexec.h>
31
32 #ifdef CONFIG_EISA
33 #include <linux/ioport.h>
34 #include <linux/eisa.h>
35 #endif
36
37 #ifdef CONFIG_MCA
38 #include <linux/mca.h>
39 #endif
40
41 #include <asm/processor.h>
42 #include <asm/system.h>
43 #include <asm/uaccess.h>
44 #include <asm/io.h>
45 #include <asm/atomic.h>
46 #include <asm/debugreg.h>
47 #include <asm/desc.h>
48 #include <asm/i387.h>
49 #include <asm/nmi.h>
50
51 #include <asm/smp.h>
52 #include <asm/arch_hooks.h>
53 #include <asm/kdebug.h>
54
55 #include <linux/irq.h>
56 #include <linux/module.h>
57
58 #include "mach_traps.h"
59
60 asmlinkage int system_call(void);
61
62 struct desc_struct default_ldt[] = { { 0, 0 }, { 0, 0 }, { 0, 0 },
63 { 0, 0 }, { 0, 0 } };
64
65 /* Do we ignore FPU interrupts ? */
66 char ignore_fpu_irq = 0;
67
68 /*
69 * The IDT has to be page-aligned to simplify the Pentium
70 * F0 0F bug workaround.. We have a special link segment
71 * for this.
72 */
73 struct desc_struct idt_table[256] __attribute__((__section__(".data.idt"))) = { {0, 0}, };
74
75 asmlinkage void divide_error(void);
76 asmlinkage void debug(void);
77 asmlinkage void nmi(void);
78 asmlinkage void int3(void);
79 asmlinkage void overflow(void);
80 asmlinkage void bounds(void);
81 asmlinkage void invalid_op(void);
82 asmlinkage void device_not_available(void);
83 asmlinkage void coprocessor_segment_overrun(void);
84 asmlinkage void invalid_TSS(void);
85 asmlinkage void segment_not_present(void);
86 asmlinkage void stack_segment(void);
87 asmlinkage void general_protection(void);
88 asmlinkage void page_fault(void);
89 asmlinkage void coprocessor_error(void);
90 asmlinkage void simd_coprocessor_error(void);
91 asmlinkage void alignment_check(void);
92 asmlinkage void spurious_interrupt_bug(void);
93 asmlinkage void machine_check(void);
94
95 static int kstack_depth_to_print = 24;
96 struct notifier_block *i386die_chain;
97 static DEFINE_SPINLOCK(die_notifier_lock);
98
99 int register_die_notifier(struct notifier_block *nb)
100 {
101 int err = 0;
102 unsigned long flags;
103 spin_lock_irqsave(&die_notifier_lock, flags);
104 err = notifier_chain_register(&i386die_chain, nb);
105 spin_unlock_irqrestore(&die_notifier_lock, flags);
106 return err;
107 }
108 EXPORT_SYMBOL(register_die_notifier);
109
110 static inline int valid_stack_ptr(struct thread_info *tinfo, void *p)
111 {
112 return p > (void *)tinfo &&
113 p < (void *)tinfo + THREAD_SIZE - 3;
114 }
115
116 static inline unsigned long print_context_stack(struct thread_info *tinfo,
117 unsigned long *stack, unsigned long ebp)
118 {
119 unsigned long addr;
120
121 #ifdef CONFIG_FRAME_POINTER
122 while (valid_stack_ptr(tinfo, (void *)ebp)) {
123 addr = *(unsigned long *)(ebp + 4);
124 printk(" [<%08lx>] ", addr);
125 print_symbol("%s", addr);
126 printk("\n");
127 ebp = *(unsigned long *)ebp;
128 }
129 #else
130 while (valid_stack_ptr(tinfo, stack)) {
131 addr = *stack++;
132 if (__kernel_text_address(addr)) {
133 printk(" [<%08lx>]", addr);
134 print_symbol(" %s", addr);
135 printk("\n");
136 }
137 }
138 #endif
139 return ebp;
140 }
141
142 void show_trace(struct task_struct *task, unsigned long * stack)
143 {
144 unsigned long ebp;
145
146 if (!task)
147 task = current;
148
149 if (task == current) {
150 /* Grab ebp right from our regs */
151 asm ("movl %%ebp, %0" : "=r" (ebp) : );
152 } else {
153 /* ebp is the last reg pushed by switch_to */
154 ebp = *(unsigned long *) task->thread.esp;
155 }
156
157 while (1) {
158 struct thread_info *context;
159 context = (struct thread_info *)
160 ((unsigned long)stack & (~(THREAD_SIZE - 1)));
161 ebp = print_context_stack(context, stack, ebp);
162 stack = (unsigned long*)context->previous_esp;
163 if (!stack)
164 break;
165 printk(" =======================\n");
166 }
167 }
168
169 void show_stack(struct task_struct *task, unsigned long *esp)
170 {
171 unsigned long *stack;
172 int i;
173
174 if (esp == NULL) {
175 if (task)
176 esp = (unsigned long*)task->thread.esp;
177 else
178 esp = (unsigned long *)&esp;
179 }
180
181 stack = esp;
182 for(i = 0; i < kstack_depth_to_print; i++) {
183 if (kstack_end(stack))
184 break;
185 if (i && ((i % 8) == 0))
186 printk("\n ");
187 printk("%08lx ", *stack++);
188 }
189 printk("\nCall Trace:\n");
190 show_trace(task, esp);
191 }
192
193 /*
194 * The architecture-independent dump_stack generator
195 */
196 void dump_stack(void)
197 {
198 unsigned long stack;
199
200 show_trace(current, &stack);
201 }
202
203 EXPORT_SYMBOL(dump_stack);
204
205 void show_registers(struct pt_regs *regs)
206 {
207 int i;
208 int in_kernel = 1;
209 unsigned long esp;
210 unsigned short ss;
211
212 esp = (unsigned long) (&regs->esp);
213 savesegment(ss, ss);
214 if (user_mode(regs)) {
215 in_kernel = 0;
216 esp = regs->esp;
217 ss = regs->xss & 0xffff;
218 }
219 print_modules();
220 printk("CPU: %d\nEIP: %04x:[<%08lx>] %s VLI\nEFLAGS: %08lx"
221 " (%s) \n",
222 smp_processor_id(), 0xffff & regs->xcs, regs->eip,
223 print_tainted(), regs->eflags, system_utsname.release);
224 print_symbol("EIP is at %s\n", regs->eip);
225 printk("eax: %08lx ebx: %08lx ecx: %08lx edx: %08lx\n",
226 regs->eax, regs->ebx, regs->ecx, regs->edx);
227 printk("esi: %08lx edi: %08lx ebp: %08lx esp: %08lx\n",
228 regs->esi, regs->edi, regs->ebp, esp);
229 printk("ds: %04x es: %04x ss: %04x\n",
230 regs->xds & 0xffff, regs->xes & 0xffff, ss);
231 printk("Process %s (pid: %d, threadinfo=%p task=%p)",
232 current->comm, current->pid, current_thread_info(), current);
233 /*
234 * When in-kernel, we also print out the stack and code at the
235 * time of the fault..
236 */
237 if (in_kernel) {
238 u8 __user *eip;
239
240 printk("\nStack: ");
241 show_stack(NULL, (unsigned long*)esp);
242
243 printk("Code: ");
244
245 eip = (u8 __user *)regs->eip - 43;
246 for (i = 0; i < 64; i++, eip++) {
247 unsigned char c;
248
249 if (eip < (u8 __user *)PAGE_OFFSET || __get_user(c, eip)) {
250 printk(" Bad EIP value.");
251 break;
252 }
253 if (eip == (u8 __user *)regs->eip)
254 printk("<%02x> ", c);
255 else
256 printk("%02x ", c);
257 }
258 }
259 printk("\n");
260 }
261
262 static void handle_BUG(struct pt_regs *regs)
263 {
264 unsigned short ud2;
265 unsigned short line;
266 char *file;
267 char c;
268 unsigned long eip;
269
270 eip = regs->eip;
271
272 if (eip < PAGE_OFFSET)
273 goto no_bug;
274 if (__get_user(ud2, (unsigned short __user *)eip))
275 goto no_bug;
276 if (ud2 != 0x0b0f)
277 goto no_bug;
278 if (__get_user(line, (unsigned short __user *)(eip + 2)))
279 goto bug;
280 if (__get_user(file, (char * __user *)(eip + 4)) ||
281 (unsigned long)file < PAGE_OFFSET || __get_user(c, file))
282 file = "<bad filename>";
283
284 printk("------------[ cut here ]------------\n");
285 printk(KERN_ALERT "kernel BUG at %s:%d!\n", file, line);
286
287 no_bug:
288 return;
289
290 /* Here we know it was a BUG but file-n-line is unavailable */
291 bug:
292 printk("Kernel BUG\n");
293 }
294
295 /* This is gone through when something in the kernel
296 * has done something bad and is about to be terminated.
297 */
298 void die(const char * str, struct pt_regs * regs, long err)
299 {
300 static struct {
301 spinlock_t lock;
302 u32 lock_owner;
303 int lock_owner_depth;
304 } die = {
305 .lock = SPIN_LOCK_UNLOCKED,
306 .lock_owner = -1,
307 .lock_owner_depth = 0
308 };
309 static int die_counter;
310
311 if (die.lock_owner != raw_smp_processor_id()) {
312 console_verbose();
313 spin_lock_irq(&die.lock);
314 die.lock_owner = smp_processor_id();
315 die.lock_owner_depth = 0;
316 bust_spinlocks(1);
317 }
318
319 if (++die.lock_owner_depth < 3) {
320 int nl = 0;
321 handle_BUG(regs);
322 printk(KERN_ALERT "%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter);
323 #ifdef CONFIG_PREEMPT
324 printk("PREEMPT ");
325 nl = 1;
326 #endif
327 #ifdef CONFIG_SMP
328 printk("SMP ");
329 nl = 1;
330 #endif
331 #ifdef CONFIG_DEBUG_PAGEALLOC
332 printk("DEBUG_PAGEALLOC");
333 nl = 1;
334 #endif
335 if (nl)
336 printk("\n");
337 notify_die(DIE_OOPS, (char *)str, regs, err, 255, SIGSEGV);
338 show_registers(regs);
339 } else
340 printk(KERN_ERR "Recursive die() failure, output suppressed\n");
341
342 bust_spinlocks(0);
343 die.lock_owner = -1;
344 spin_unlock_irq(&die.lock);
345
346 if (kexec_should_crash(current))
347 crash_kexec(regs);
348
349 if (in_interrupt())
350 panic("Fatal exception in interrupt");
351
352 if (panic_on_oops) {
353 printk(KERN_EMERG "Fatal exception: panic in 5 seconds\n");
354 ssleep(5);
355 panic("Fatal exception");
356 }
357 do_exit(SIGSEGV);
358 }
359
360 static inline void die_if_kernel(const char * str, struct pt_regs * regs, long err)
361 {
362 if (!user_mode_vm(regs))
363 die(str, regs, err);
364 }
365
366 static void do_trap(int trapnr, int signr, char *str, int vm86,
367 struct pt_regs * regs, long error_code, siginfo_t *info)
368 {
369 struct task_struct *tsk = current;
370 tsk->thread.error_code = error_code;
371 tsk->thread.trap_no = trapnr;
372
373 if (regs->eflags & VM_MASK) {
374 if (vm86)
375 goto vm86_trap;
376 goto trap_signal;
377 }
378
379 if (!user_mode(regs))
380 goto kernel_trap;
381
382 trap_signal: {
383 if (info)
384 force_sig_info(signr, info, tsk);
385 else
386 force_sig(signr, tsk);
387 return;
388 }
389
390 kernel_trap: {
391 if (!fixup_exception(regs))
392 die(str, regs, error_code);
393 return;
394 }
395
396 vm86_trap: {
397 int ret = handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, trapnr);
398 if (ret) goto trap_signal;
399 return;
400 }
401 }
402
403 #define DO_ERROR(trapnr, signr, str, name) \
404 fastcall void do_##name(struct pt_regs * regs, long error_code) \
405 { \
406 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
407 == NOTIFY_STOP) \
408 return; \
409 do_trap(trapnr, signr, str, 0, regs, error_code, NULL); \
410 }
411
412 #define DO_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
413 fastcall void do_##name(struct pt_regs * regs, long error_code) \
414 { \
415 siginfo_t info; \
416 info.si_signo = signr; \
417 info.si_errno = 0; \
418 info.si_code = sicode; \
419 info.si_addr = (void __user *)siaddr; \
420 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
421 == NOTIFY_STOP) \
422 return; \
423 do_trap(trapnr, signr, str, 0, regs, error_code, &info); \
424 }
425
426 #define DO_VM86_ERROR(trapnr, signr, str, name) \
427 fastcall void do_##name(struct pt_regs * regs, long error_code) \
428 { \
429 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
430 == NOTIFY_STOP) \
431 return; \
432 do_trap(trapnr, signr, str, 1, regs, error_code, NULL); \
433 }
434
435 #define DO_VM86_ERROR_INFO(trapnr, signr, str, name, sicode, siaddr) \
436 fastcall void do_##name(struct pt_regs * regs, long error_code) \
437 { \
438 siginfo_t info; \
439 info.si_signo = signr; \
440 info.si_errno = 0; \
441 info.si_code = sicode; \
442 info.si_addr = (void __user *)siaddr; \
443 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) \
444 == NOTIFY_STOP) \
445 return; \
446 do_trap(trapnr, signr, str, 1, regs, error_code, &info); \
447 }
448
449 DO_VM86_ERROR_INFO( 0, SIGFPE, "divide error", divide_error, FPE_INTDIV, regs->eip)
450 #ifndef CONFIG_KPROBES
451 DO_VM86_ERROR( 3, SIGTRAP, "int3", int3)
452 #endif
453 DO_VM86_ERROR( 4, SIGSEGV, "overflow", overflow)
454 DO_VM86_ERROR( 5, SIGSEGV, "bounds", bounds)
455 DO_ERROR_INFO( 6, SIGILL, "invalid operand", invalid_op, ILL_ILLOPN, regs->eip)
456 DO_ERROR( 9, SIGFPE, "coprocessor segment overrun", coprocessor_segment_overrun)
457 DO_ERROR(10, SIGSEGV, "invalid TSS", invalid_TSS)
458 DO_ERROR(11, SIGBUS, "segment not present", segment_not_present)
459 DO_ERROR(12, SIGBUS, "stack segment", stack_segment)
460 DO_ERROR_INFO(17, SIGBUS, "alignment check", alignment_check, BUS_ADRALN, 0)
461 DO_ERROR_INFO(32, SIGSEGV, "iret exception", iret_error, ILL_BADSTK, 0)
462
463 fastcall void do_general_protection(struct pt_regs * regs, long error_code)
464 {
465 int cpu = get_cpu();
466 struct tss_struct *tss = &per_cpu(init_tss, cpu);
467 struct thread_struct *thread = &current->thread;
468
469 /*
470 * Perform the lazy TSS's I/O bitmap copy. If the TSS has an
471 * invalid offset set (the LAZY one) and the faulting thread has
472 * a valid I/O bitmap pointer, we copy the I/O bitmap in the TSS
473 * and we set the offset field correctly. Then we let the CPU to
474 * restart the faulting instruction.
475 */
476 if (tss->io_bitmap_base == INVALID_IO_BITMAP_OFFSET_LAZY &&
477 thread->io_bitmap_ptr) {
478 memcpy(tss->io_bitmap, thread->io_bitmap_ptr,
479 thread->io_bitmap_max);
480 /*
481 * If the previously set map was extending to higher ports
482 * than the current one, pad extra space with 0xff (no access).
483 */
484 if (thread->io_bitmap_max < tss->io_bitmap_max)
485 memset((char *) tss->io_bitmap +
486 thread->io_bitmap_max, 0xff,
487 tss->io_bitmap_max - thread->io_bitmap_max);
488 tss->io_bitmap_max = thread->io_bitmap_max;
489 tss->io_bitmap_base = IO_BITMAP_OFFSET;
490 put_cpu();
491 return;
492 }
493 put_cpu();
494
495 current->thread.error_code = error_code;
496 current->thread.trap_no = 13;
497
498 if (regs->eflags & VM_MASK)
499 goto gp_in_vm86;
500
501 if (!user_mode(regs))
502 goto gp_in_kernel;
503
504 current->thread.error_code = error_code;
505 current->thread.trap_no = 13;
506 force_sig(SIGSEGV, current);
507 return;
508
509 gp_in_vm86:
510 local_irq_enable();
511 handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
512 return;
513
514 gp_in_kernel:
515 if (!fixup_exception(regs)) {
516 if (notify_die(DIE_GPF, "general protection fault", regs,
517 error_code, 13, SIGSEGV) == NOTIFY_STOP)
518 return;
519 die("general protection fault", regs, error_code);
520 }
521 }
522
523 static void mem_parity_error(unsigned char reason, struct pt_regs * regs)
524 {
525 printk("Uhhuh. NMI received. Dazed and confused, but trying to continue\n");
526 printk("You probably have a hardware problem with your RAM chips\n");
527
528 /* Clear and disable the memory parity error line. */
529 clear_mem_error(reason);
530 }
531
532 static void io_check_error(unsigned char reason, struct pt_regs * regs)
533 {
534 unsigned long i;
535
536 printk("NMI: IOCK error (debug interrupt?)\n");
537 show_registers(regs);
538
539 /* Re-enable the IOCK line, wait for a few seconds */
540 reason = (reason & 0xf) | 8;
541 outb(reason, 0x61);
542 i = 2000;
543 while (--i) udelay(1000);
544 reason &= ~8;
545 outb(reason, 0x61);
546 }
547
548 static void unknown_nmi_error(unsigned char reason, struct pt_regs * regs)
549 {
550 #ifdef CONFIG_MCA
551 /* Might actually be able to figure out what the guilty party
552 * is. */
553 if( MCA_bus ) {
554 mca_handle_nmi();
555 return;
556 }
557 #endif
558 printk("Uhhuh. NMI received for unknown reason %02x on CPU %d.\n",
559 reason, smp_processor_id());
560 printk("Dazed and confused, but trying to continue\n");
561 printk("Do you have a strange power saving mode enabled?\n");
562 }
563
564 static DEFINE_SPINLOCK(nmi_print_lock);
565
566 void die_nmi (struct pt_regs *regs, const char *msg)
567 {
568 spin_lock(&nmi_print_lock);
569 /*
570 * We are in trouble anyway, lets at least try
571 * to get a message out.
572 */
573 bust_spinlocks(1);
574 printk(msg);
575 printk(" on CPU%d, eip %08lx, registers:\n",
576 smp_processor_id(), regs->eip);
577 show_registers(regs);
578 printk("console shuts up ...\n");
579 console_silent();
580 spin_unlock(&nmi_print_lock);
581 bust_spinlocks(0);
582
583 /* If we are in kernel we are probably nested up pretty bad
584 * and might aswell get out now while we still can.
585 */
586 if (!user_mode(regs)) {
587 current->thread.trap_no = 2;
588 crash_kexec(regs);
589 }
590
591 do_exit(SIGSEGV);
592 }
593
594 static void default_do_nmi(struct pt_regs * regs)
595 {
596 unsigned char reason = 0;
597
598 /* Only the BSP gets external NMIs from the system. */
599 if (!smp_processor_id())
600 reason = get_nmi_reason();
601
602 if (!(reason & 0xc0)) {
603 if (notify_die(DIE_NMI_IPI, "nmi_ipi", regs, reason, 0, SIGINT)
604 == NOTIFY_STOP)
605 return;
606 #ifdef CONFIG_X86_LOCAL_APIC
607 /*
608 * Ok, so this is none of the documented NMI sources,
609 * so it must be the NMI watchdog.
610 */
611 if (nmi_watchdog) {
612 nmi_watchdog_tick(regs);
613 return;
614 }
615 #endif
616 unknown_nmi_error(reason, regs);
617 return;
618 }
619 if (notify_die(DIE_NMI, "nmi", regs, reason, 0, SIGINT) == NOTIFY_STOP)
620 return;
621 if (reason & 0x80)
622 mem_parity_error(reason, regs);
623 if (reason & 0x40)
624 io_check_error(reason, regs);
625 /*
626 * Reassert NMI in case it became active meanwhile
627 * as it's edge-triggered.
628 */
629 reassert_nmi();
630 }
631
632 static int dummy_nmi_callback(struct pt_regs * regs, int cpu)
633 {
634 return 0;
635 }
636
637 static nmi_callback_t nmi_callback = dummy_nmi_callback;
638
639 fastcall void do_nmi(struct pt_regs * regs, long error_code)
640 {
641 int cpu;
642
643 nmi_enter();
644
645 cpu = smp_processor_id();
646
647 #ifdef CONFIG_HOTPLUG_CPU
648 if (!cpu_online(cpu)) {
649 nmi_exit();
650 return;
651 }
652 #endif
653
654 ++nmi_count(cpu);
655
656 if (!nmi_callback(regs, cpu))
657 default_do_nmi(regs);
658
659 nmi_exit();
660 }
661
662 void set_nmi_callback(nmi_callback_t callback)
663 {
664 nmi_callback = callback;
665 }
666 EXPORT_SYMBOL_GPL(set_nmi_callback);
667
668 void unset_nmi_callback(void)
669 {
670 nmi_callback = dummy_nmi_callback;
671 }
672 EXPORT_SYMBOL_GPL(unset_nmi_callback);
673
674 #ifdef CONFIG_KPROBES
675 fastcall void do_int3(struct pt_regs *regs, long error_code)
676 {
677 if (notify_die(DIE_INT3, "int3", regs, error_code, 3, SIGTRAP)
678 == NOTIFY_STOP)
679 return;
680 /* This is an interrupt gate, because kprobes wants interrupts
681 disabled. Normal trap handlers don't. */
682 restore_interrupts(regs);
683 do_trap(3, SIGTRAP, "int3", 1, regs, error_code, NULL);
684 }
685 #endif
686
687 /*
688 * Our handling of the processor debug registers is non-trivial.
689 * We do not clear them on entry and exit from the kernel. Therefore
690 * it is possible to get a watchpoint trap here from inside the kernel.
691 * However, the code in ./ptrace.c has ensured that the user can
692 * only set watchpoints on userspace addresses. Therefore the in-kernel
693 * watchpoint trap can only occur in code which is reading/writing
694 * from user space. Such code must not hold kernel locks (since it
695 * can equally take a page fault), therefore it is safe to call
696 * force_sig_info even though that claims and releases locks.
697 *
698 * Code in ./signal.c ensures that the debug control register
699 * is restored before we deliver any signal, and therefore that
700 * user code runs with the correct debug control register even though
701 * we clear it here.
702 *
703 * Being careful here means that we don't have to be as careful in a
704 * lot of more complicated places (task switching can be a bit lazy
705 * about restoring all the debug state, and ptrace doesn't have to
706 * find every occurrence of the TF bit that could be saved away even
707 * by user code)
708 */
709 fastcall void do_debug(struct pt_regs * regs, long error_code)
710 {
711 unsigned int condition;
712 struct task_struct *tsk = current;
713
714 get_debugreg(condition, 6);
715
716 if (notify_die(DIE_DEBUG, "debug", regs, condition, error_code,
717 SIGTRAP) == NOTIFY_STOP)
718 return;
719 /* It's safe to allow irq's after DR6 has been saved */
720 if (regs->eflags & X86_EFLAGS_IF)
721 local_irq_enable();
722
723 /* Mask out spurious debug traps due to lazy DR7 setting */
724 if (condition & (DR_TRAP0|DR_TRAP1|DR_TRAP2|DR_TRAP3)) {
725 if (!tsk->thread.debugreg[7])
726 goto clear_dr7;
727 }
728
729 if (regs->eflags & VM_MASK)
730 goto debug_vm86;
731
732 /* Save debug status register where ptrace can see it */
733 tsk->thread.debugreg[6] = condition;
734
735 /*
736 * Single-stepping through TF: make sure we ignore any events in
737 * kernel space (but re-enable TF when returning to user mode).
738 */
739 if (condition & DR_STEP) {
740 /*
741 * We already checked v86 mode above, so we can
742 * check for kernel mode by just checking the CPL
743 * of CS.
744 */
745 if (!user_mode(regs))
746 goto clear_TF_reenable;
747 }
748
749 /* Ok, finally something we can handle */
750 send_sigtrap(tsk, regs, error_code);
751
752 /* Disable additional traps. They'll be re-enabled when
753 * the signal is delivered.
754 */
755 clear_dr7:
756 set_debugreg(0, 7);
757 return;
758
759 debug_vm86:
760 handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code, 1);
761 return;
762
763 clear_TF_reenable:
764 set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
765 regs->eflags &= ~TF_MASK;
766 return;
767 }
768
769 /*
770 * Note that we play around with the 'TS' bit in an attempt to get
771 * the correct behaviour even in the presence of the asynchronous
772 * IRQ13 behaviour
773 */
774 void math_error(void __user *eip)
775 {
776 struct task_struct * task;
777 siginfo_t info;
778 unsigned short cwd, swd;
779
780 /*
781 * Save the info for the exception handler and clear the error.
782 */
783 task = current;
784 save_init_fpu(task);
785 task->thread.trap_no = 16;
786 task->thread.error_code = 0;
787 info.si_signo = SIGFPE;
788 info.si_errno = 0;
789 info.si_code = __SI_FAULT;
790 info.si_addr = eip;
791 /*
792 * (~cwd & swd) will mask out exceptions that are not set to unmasked
793 * status. 0x3f is the exception bits in these regs, 0x200 is the
794 * C1 reg you need in case of a stack fault, 0x040 is the stack
795 * fault bit. We should only be taking one exception at a time,
796 * so if this combination doesn't produce any single exception,
797 * then we have a bad program that isn't syncronizing its FPU usage
798 * and it will suffer the consequences since we won't be able to
799 * fully reproduce the context of the exception
800 */
801 cwd = get_fpu_cwd(task);
802 swd = get_fpu_swd(task);
803 switch (swd & ~cwd & 0x3f) {
804 case 0x000:
805 default:
806 break;
807 case 0x001: /* Invalid Op */
808 /*
809 * swd & 0x240 == 0x040: Stack Underflow
810 * swd & 0x240 == 0x240: Stack Overflow
811 * User must clear the SF bit (0x40) if set
812 */
813 info.si_code = FPE_FLTINV;
814 break;
815 case 0x002: /* Denormalize */
816 case 0x010: /* Underflow */
817 info.si_code = FPE_FLTUND;
818 break;
819 case 0x004: /* Zero Divide */
820 info.si_code = FPE_FLTDIV;
821 break;
822 case 0x008: /* Overflow */
823 info.si_code = FPE_FLTOVF;
824 break;
825 case 0x020: /* Precision */
826 info.si_code = FPE_FLTRES;
827 break;
828 }
829 force_sig_info(SIGFPE, &info, task);
830 }
831
832 fastcall void do_coprocessor_error(struct pt_regs * regs, long error_code)
833 {
834 ignore_fpu_irq = 1;
835 math_error((void __user *)regs->eip);
836 }
837
838 static void simd_math_error(void __user *eip)
839 {
840 struct task_struct * task;
841 siginfo_t info;
842 unsigned short mxcsr;
843
844 /*
845 * Save the info for the exception handler and clear the error.
846 */
847 task = current;
848 save_init_fpu(task);
849 task->thread.trap_no = 19;
850 task->thread.error_code = 0;
851 info.si_signo = SIGFPE;
852 info.si_errno = 0;
853 info.si_code = __SI_FAULT;
854 info.si_addr = eip;
855 /*
856 * The SIMD FPU exceptions are handled a little differently, as there
857 * is only a single status/control register. Thus, to determine which
858 * unmasked exception was caught we must mask the exception mask bits
859 * at 0x1f80, and then use these to mask the exception bits at 0x3f.
860 */
861 mxcsr = get_fpu_mxcsr(task);
862 switch (~((mxcsr & 0x1f80) >> 7) & (mxcsr & 0x3f)) {
863 case 0x000:
864 default:
865 break;
866 case 0x001: /* Invalid Op */
867 info.si_code = FPE_FLTINV;
868 break;
869 case 0x002: /* Denormalize */
870 case 0x010: /* Underflow */
871 info.si_code = FPE_FLTUND;
872 break;
873 case 0x004: /* Zero Divide */
874 info.si_code = FPE_FLTDIV;
875 break;
876 case 0x008: /* Overflow */
877 info.si_code = FPE_FLTOVF;
878 break;
879 case 0x020: /* Precision */
880 info.si_code = FPE_FLTRES;
881 break;
882 }
883 force_sig_info(SIGFPE, &info, task);
884 }
885
886 fastcall void do_simd_coprocessor_error(struct pt_regs * regs,
887 long error_code)
888 {
889 if (cpu_has_xmm) {
890 /* Handle SIMD FPU exceptions on PIII+ processors. */
891 ignore_fpu_irq = 1;
892 simd_math_error((void __user *)regs->eip);
893 } else {
894 /*
895 * Handle strange cache flush from user space exception
896 * in all other cases. This is undocumented behaviour.
897 */
898 if (regs->eflags & VM_MASK) {
899 handle_vm86_fault((struct kernel_vm86_regs *)regs,
900 error_code);
901 return;
902 }
903 current->thread.trap_no = 19;
904 current->thread.error_code = error_code;
905 die_if_kernel("cache flush denied", regs, error_code);
906 force_sig(SIGSEGV, current);
907 }
908 }
909
910 fastcall void do_spurious_interrupt_bug(struct pt_regs * regs,
911 long error_code)
912 {
913 #if 0
914 /* No need to warn about this any longer. */
915 printk("Ignoring P6 Local APIC Spurious Interrupt Bug...\n");
916 #endif
917 }
918
919 fastcall void setup_x86_bogus_stack(unsigned char * stk)
920 {
921 unsigned long *switch16_ptr, *switch32_ptr;
922 struct pt_regs *regs;
923 unsigned long stack_top, stack_bot;
924 unsigned short iret_frame16_off;
925 int cpu = smp_processor_id();
926 /* reserve the space on 32bit stack for the magic switch16 pointer */
927 memmove(stk, stk + 8, sizeof(struct pt_regs));
928 switch16_ptr = (unsigned long *)(stk + sizeof(struct pt_regs));
929 regs = (struct pt_regs *)stk;
930 /* now the switch32 on 16bit stack */
931 stack_bot = (unsigned long)&per_cpu(cpu_16bit_stack, cpu);
932 stack_top = stack_bot + CPU_16BIT_STACK_SIZE;
933 switch32_ptr = (unsigned long *)(stack_top - 8);
934 iret_frame16_off = CPU_16BIT_STACK_SIZE - 8 - 20;
935 /* copy iret frame on 16bit stack */
936 memcpy((void *)(stack_bot + iret_frame16_off), &regs->eip, 20);
937 /* fill in the switch pointers */
938 switch16_ptr[0] = (regs->esp & 0xffff0000) | iret_frame16_off;
939 switch16_ptr[1] = __ESPFIX_SS;
940 switch32_ptr[0] = (unsigned long)stk + sizeof(struct pt_regs) +
941 8 - CPU_16BIT_STACK_SIZE;
942 switch32_ptr[1] = __KERNEL_DS;
943 }
944
945 fastcall unsigned char * fixup_x86_bogus_stack(unsigned short sp)
946 {
947 unsigned long *switch32_ptr;
948 unsigned char *stack16, *stack32;
949 unsigned long stack_top, stack_bot;
950 int len;
951 int cpu = smp_processor_id();
952 stack_bot = (unsigned long)&per_cpu(cpu_16bit_stack, cpu);
953 stack_top = stack_bot + CPU_16BIT_STACK_SIZE;
954 switch32_ptr = (unsigned long *)(stack_top - 8);
955 /* copy the data from 16bit stack to 32bit stack */
956 len = CPU_16BIT_STACK_SIZE - 8 - sp;
957 stack16 = (unsigned char *)(stack_bot + sp);
958 stack32 = (unsigned char *)
959 (switch32_ptr[0] + CPU_16BIT_STACK_SIZE - 8 - len);
960 memcpy(stack32, stack16, len);
961 return stack32;
962 }
963
964 /*
965 * 'math_state_restore()' saves the current math information in the
966 * old math state array, and gets the new ones from the current task
967 *
968 * Careful.. There are problems with IBM-designed IRQ13 behaviour.
969 * Don't touch unless you *really* know how it works.
970 *
971 * Must be called with kernel preemption disabled (in this case,
972 * local interrupts are disabled at the call-site in entry.S).
973 */
974 asmlinkage void math_state_restore(struct pt_regs regs)
975 {
976 struct thread_info *thread = current_thread_info();
977 struct task_struct *tsk = thread->task;
978
979 clts(); /* Allow maths ops (or we recurse) */
980 if (!tsk_used_math(tsk))
981 init_fpu(tsk);
982 restore_fpu(tsk);
983 thread->status |= TS_USEDFPU; /* So we fnsave on switch_to() */
984 }
985
986 #ifndef CONFIG_MATH_EMULATION
987
988 asmlinkage void math_emulate(long arg)
989 {
990 printk("math-emulation not enabled and no coprocessor found.\n");
991 printk("killing %s.\n",current->comm);
992 force_sig(SIGFPE,current);
993 schedule();
994 }
995
996 #endif /* CONFIG_MATH_EMULATION */
997
998 #ifdef CONFIG_X86_F00F_BUG
999 void __init trap_init_f00f_bug(void)
1000 {
1001 __set_fixmap(FIX_F00F_IDT, __pa(&idt_table), PAGE_KERNEL_RO);
1002
1003 /*
1004 * Update the IDT descriptor and reload the IDT so that
1005 * it uses the read-only mapped virtual address.
1006 */
1007 idt_descr.address = fix_to_virt(FIX_F00F_IDT);
1008 load_idt(&idt_descr);
1009 }
1010 #endif
1011
1012 #define _set_gate(gate_addr,type,dpl,addr,seg) \
1013 do { \
1014 int __d0, __d1; \
1015 __asm__ __volatile__ ("movw %%dx,%%ax\n\t" \
1016 "movw %4,%%dx\n\t" \
1017 "movl %%eax,%0\n\t" \
1018 "movl %%edx,%1" \
1019 :"=m" (*((long *) (gate_addr))), \
1020 "=m" (*(1+(long *) (gate_addr))), "=&a" (__d0), "=&d" (__d1) \
1021 :"i" ((short) (0x8000+(dpl<<13)+(type<<8))), \
1022 "3" ((char *) (addr)),"2" ((seg) << 16)); \
1023 } while (0)
1024
1025
1026 /*
1027 * This needs to use 'idt_table' rather than 'idt', and
1028 * thus use the _nonmapped_ version of the IDT, as the
1029 * Pentium F0 0F bugfix can have resulted in the mapped
1030 * IDT being write-protected.
1031 */
1032 void set_intr_gate(unsigned int n, void *addr)
1033 {
1034 _set_gate(idt_table+n,14,0,addr,__KERNEL_CS);
1035 }
1036
1037 /*
1038 * This routine sets up an interrupt gate at directory privilege level 3.
1039 */
1040 static inline void set_system_intr_gate(unsigned int n, void *addr)
1041 {
1042 _set_gate(idt_table+n, 14, 3, addr, __KERNEL_CS);
1043 }
1044
1045 static void __init set_trap_gate(unsigned int n, void *addr)
1046 {
1047 _set_gate(idt_table+n,15,0,addr,__KERNEL_CS);
1048 }
1049
1050 static void __init set_system_gate(unsigned int n, void *addr)
1051 {
1052 _set_gate(idt_table+n,15,3,addr,__KERNEL_CS);
1053 }
1054
1055 static void __init set_task_gate(unsigned int n, unsigned int gdt_entry)
1056 {
1057 _set_gate(idt_table+n,5,0,0,(gdt_entry<<3));
1058 }
1059
1060
1061 void __init trap_init(void)
1062 {
1063 #ifdef CONFIG_EISA
1064 void __iomem *p = ioremap(0x0FFFD9, 4);
1065 if (readl(p) == 'E'+('I'<<8)+('S'<<16)+('A'<<24)) {
1066 EISA_bus = 1;
1067 }
1068 iounmap(p);
1069 #endif
1070
1071 #ifdef CONFIG_X86_LOCAL_APIC
1072 init_apic_mappings();
1073 #endif
1074
1075 set_trap_gate(0,&divide_error);
1076 set_intr_gate(1,&debug);
1077 set_intr_gate(2,&nmi);
1078 set_system_intr_gate(3, &int3); /* int3-5 can be called from all */
1079 set_system_gate(4,&overflow);
1080 set_system_gate(5,&bounds);
1081 set_trap_gate(6,&invalid_op);
1082 set_trap_gate(7,&device_not_available);
1083 set_task_gate(8,GDT_ENTRY_DOUBLEFAULT_TSS);
1084 set_trap_gate(9,&coprocessor_segment_overrun);
1085 set_trap_gate(10,&invalid_TSS);
1086 set_trap_gate(11,&segment_not_present);
1087 set_trap_gate(12,&stack_segment);
1088 set_trap_gate(13,&general_protection);
1089 set_intr_gate(14,&page_fault);
1090 set_trap_gate(15,&spurious_interrupt_bug);
1091 set_trap_gate(16,&coprocessor_error);
1092 set_trap_gate(17,&alignment_check);
1093 #ifdef CONFIG_X86_MCE
1094 set_trap_gate(18,&machine_check);
1095 #endif
1096 set_trap_gate(19,&simd_coprocessor_error);
1097
1098 set_system_gate(SYSCALL_VECTOR,&system_call);
1099
1100 /*
1101 * Should be a barrier for any external CPU state.
1102 */
1103 cpu_init();
1104
1105 trap_init_hook();
1106 }
1107
1108 static int __init kstack_setup(char *s)
1109 {
1110 kstack_depth_to_print = simple_strtoul(s, NULL, 0);
1111 return 0;
1112 }
1113 __setup("kstack=", kstack_setup);
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