arch/i386/pci/mmconfig.c

   1 /*
   2  * Copyright (C) 2004 Matthew Wilcox <matthew@wil.cx>
   3  * Copyright (C) 2004 Intel Corp.
   4  *
   5  * This code is released under the GNU General Public License version 2.
   6  */
   7
   8 /*
   9  * mmconfig.c - Low-level direct PCI config space access via MMCONFIG
  10  */
  11
  12 #include <linux/pci.h>
  13 #include <linux/init.h>
  14 #include <linux/acpi.h>
  15 #include "pci.h"
  16
  17 #define mmcfg_virt_addr ((void __iomem *) fix_to_virt(FIX_PCIE_MCFG))
  18
  19 /* The base address of the last MMCONFIG device accessed */
  20 static u32 mmcfg_last_accessed_device;
  21
  22 static DECLARE_BITMAP(fallback_slots, 32);
  23
  24 /*
  25  * Functions for accessing PCI configuration space with MMCONFIG accesses
  26  */
  27 static u32 get_base_addr(unsigned int seg, int bus, unsigned devfn)
  28 {
  29         int cfg_num = -1;
  30         struct acpi_table_mcfg_config *cfg;
  31
  32         if (seg == 0 && bus == 0 &&
  33             test_bit(PCI_SLOT(devfn), fallback_slots))
  34                 return 0;
  35
  36         while (1) {
  37                 ++cfg_num;
  38                 if (cfg_num >= pci_mmcfg_config_num) {
  39                         /* Not found - fallback to type 1 */
  40                         return 0;
  41                 }
  42                 cfg = &pci_mmcfg_config[cfg_num];
  43                 if (cfg->pci_segment_group_number != seg)
  44                         continue;
  45                 if ((cfg->start_bus_number <= bus) &&
  46                     (cfg->end_bus_number >= bus))
  47                         return cfg->base_address;
  48         }
  49 }
  50
  51 static inline void pci_exp_set_dev_base(unsigned int base, int bus, int devfn)
  52 {
  53         u32 dev_base = base | (bus << 20) | (devfn << 12);
  54         if (dev_base != mmcfg_last_accessed_device) {
  55                 mmcfg_last_accessed_device = dev_base;
  56                 set_fixmap_nocache(FIX_PCIE_MCFG, dev_base);
  57         }
  58 }
  59
  60 static int pci_mmcfg_read(unsigned int seg, unsigned int bus,
  61                           unsigned int devfn, int reg, int len, u32 *value)
  62 {
  63         unsigned long flags;
  64         u32 base;
  65
  66         if (!value || (bus > 255) || (devfn > 255) || (reg > 4095))
  67                 return -EINVAL;
  68
  69         base = get_base_addr(seg, bus, devfn);
  70         if (!base)
  71                 return pci_conf1_read(seg,bus,devfn,reg,len,value);
  72
  73         spin_lock_irqsave(&pci_config_lock, flags);
  74
  75         pci_exp_set_dev_base(base, bus, devfn);
  76
  77         switch (len) {
  78         case 1:
  79                 *value = readb(mmcfg_virt_addr + reg);
  80                 break;
  81         case 2:
  82                 *value = readw(mmcfg_virt_addr + reg);
  83                 break;
  84         case 4:
  85                 *value = readl(mmcfg_virt_addr + reg);
  86                 break;
  87         }
  88
  89         spin_unlock_irqrestore(&pci_config_lock, flags);
  90
  91         return 0;
  92 }
  93
  94 static int pci_mmcfg_write(unsigned int seg, unsigned int bus,
  95                            unsigned int devfn, int reg, int len, u32 value)
  96 {
  97         unsigned long flags;
  98         u32 base;
  99
 100         if ((bus > 255) || (devfn > 255) || (reg > 4095))
 101                 return -EINVAL;
 102
 103         base = get_base_addr(seg, bus, devfn);
 104         if (!base)
 105                 return pci_conf1_write(seg,bus,devfn,reg,len,value);
 106
 107         spin_lock_irqsave(&pci_config_lock, flags);
 108
 109         pci_exp_set_dev_base(base, bus, devfn);
 110
 111         switch (len) {
 112         case 1:
 113                 writeb(value, mmcfg_virt_addr + reg);
 114                 break;
 115         case 2:
 116                 writew(value, mmcfg_virt_addr + reg);
 117                 break;
 118         case 4:
 119                 writel(value, mmcfg_virt_addr + reg);
 120                 break;
 121         }
 122
 123         spin_unlock_irqrestore(&pci_config_lock, flags);
 124
 125         return 0;
 126 }
 127
 128 static struct pci_raw_ops pci_mmcfg = {
 129         .read =         pci_mmcfg_read,
 130         .write =        pci_mmcfg_write,
 131 };
 132
 133 /* K8 systems have some devices (typically in the builtin northbridge)
 134    that are only accessible using type1
 135    Normally this can be expressed in the MCFG by not listing them
 136    and assigning suitable _SEGs, but this isn't implemented in some BIOS.
 137    Instead try to discover all devices on bus 0 that are unreachable using MM
 138    and fallback for them.
 139    We only do this for bus 0/seg 0 */
 140 static __init void unreachable_devices(void)
 141 {
 142         int i;
 143         unsigned long flags;
 144
 145         for (i = 0; i < 32; i++) {
 146                 u32 val1;
 147                 u32 addr;
 148
 149                 pci_conf1_read(0, 0, PCI_DEVFN(i, 0), 0, 4, &val1);
 150                 if (val1 == 0xffffffff)
 151                         continue;
 152
 153                 /* Locking probably not needed, but safer */
 154                 spin_lock_irqsave(&pci_config_lock, flags);
 155                 addr = get_base_addr(0, 0, PCI_DEVFN(i, 0));
 156                 if (addr != 0)
 157                         pci_exp_set_dev_base(addr, 0, PCI_DEVFN(i, 0));
 158                 if (addr == 0 || readl((u32 __iomem *)mmcfg_virt_addr) != val1)
 159                         set_bit(i, fallback_slots);
 160                 spin_unlock_irqrestore(&pci_config_lock, flags);
 161         }
 162 }
 163
 164 static int __init pci_mmcfg_init(void)
 165 {
 166         if ((pci_probe & PCI_PROBE_MMCONF) == 0)
 167                 goto out;
 168
 169         acpi_table_parse(ACPI_MCFG, acpi_parse_mcfg);
 170         if ((pci_mmcfg_config_num == 0) ||
 171             (pci_mmcfg_config == NULL) ||
 172             (pci_mmcfg_config[0].base_address == 0))
 173                 goto out;
 174
 175         printk(KERN_INFO "PCI: Using MMCONFIG\n");
 176         raw_pci_ops = &pci_mmcfg;
 177         pci_probe = (pci_probe & ~PCI_PROBE_MASK) | PCI_PROBE_MMCONF;
 178
 179         unreachable_devices();
 180
 181  out:
 182         return 0;
 183 }
 184
 185 arch_initcall(pci_mmcfg_init);