[IA64] reduce cacheline bouncing in cpu_idle_wait
[deliverable/linux.git] / arch / ia64 / kernel / process.c
1 /*
2 * Architecture-specific setup.
3 *
4 * Copyright (C) 1998-2003 Hewlett-Packard Co
5 * David Mosberger-Tang <davidm@hpl.hp.com>
6 * 04/11/17 Ashok Raj <ashok.raj@intel.com> Added CPU Hotplug Support
7 */
8 #define __KERNEL_SYSCALLS__ /* see <asm/unistd.h> */
9 #include <linux/config.h>
10
11 #include <linux/cpu.h>
12 #include <linux/pm.h>
13 #include <linux/elf.h>
14 #include <linux/errno.h>
15 #include <linux/kallsyms.h>
16 #include <linux/kernel.h>
17 #include <linux/mm.h>
18 #include <linux/module.h>
19 #include <linux/notifier.h>
20 #include <linux/personality.h>
21 #include <linux/sched.h>
22 #include <linux/slab.h>
23 #include <linux/smp_lock.h>
24 #include <linux/stddef.h>
25 #include <linux/thread_info.h>
26 #include <linux/unistd.h>
27 #include <linux/efi.h>
28 #include <linux/interrupt.h>
29 #include <linux/delay.h>
30
31 #include <asm/cpu.h>
32 #include <asm/delay.h>
33 #include <asm/elf.h>
34 #include <asm/ia32.h>
35 #include <asm/irq.h>
36 #include <asm/pgalloc.h>
37 #include <asm/processor.h>
38 #include <asm/sal.h>
39 #include <asm/tlbflush.h>
40 #include <asm/uaccess.h>
41 #include <asm/unwind.h>
42 #include <asm/user.h>
43
44 #include "entry.h"
45
46 #ifdef CONFIG_PERFMON
47 # include <asm/perfmon.h>
48 #endif
49
50 #include "sigframe.h"
51
52 void (*ia64_mark_idle)(int);
53 static DEFINE_PER_CPU(unsigned int, cpu_idle_state);
54
55 unsigned long boot_option_idle_override = 0;
56 EXPORT_SYMBOL(boot_option_idle_override);
57
58 void
59 ia64_do_show_stack (struct unw_frame_info *info, void *arg)
60 {
61 unsigned long ip, sp, bsp;
62 char buf[128]; /* don't make it so big that it overflows the stack! */
63
64 printk("\nCall Trace:\n");
65 do {
66 unw_get_ip(info, &ip);
67 if (ip == 0)
68 break;
69
70 unw_get_sp(info, &sp);
71 unw_get_bsp(info, &bsp);
72 snprintf(buf, sizeof(buf),
73 " [<%016lx>] %%s\n"
74 " sp=%016lx bsp=%016lx\n",
75 ip, sp, bsp);
76 print_symbol(buf, ip);
77 } while (unw_unwind(info) >= 0);
78 }
79
80 void
81 show_stack (struct task_struct *task, unsigned long *sp)
82 {
83 if (!task)
84 unw_init_running(ia64_do_show_stack, NULL);
85 else {
86 struct unw_frame_info info;
87
88 unw_init_from_blocked_task(&info, task);
89 ia64_do_show_stack(&info, NULL);
90 }
91 }
92
93 void
94 dump_stack (void)
95 {
96 show_stack(NULL, NULL);
97 }
98
99 EXPORT_SYMBOL(dump_stack);
100
101 void
102 show_regs (struct pt_regs *regs)
103 {
104 unsigned long ip = regs->cr_iip + ia64_psr(regs)->ri;
105
106 print_modules();
107 printk("\nPid: %d, CPU %d, comm: %20s\n", current->pid, smp_processor_id(), current->comm);
108 printk("psr : %016lx ifs : %016lx ip : [<%016lx>] %s\n",
109 regs->cr_ipsr, regs->cr_ifs, ip, print_tainted());
110 print_symbol("ip is at %s\n", ip);
111 printk("unat: %016lx pfs : %016lx rsc : %016lx\n",
112 regs->ar_unat, regs->ar_pfs, regs->ar_rsc);
113 printk("rnat: %016lx bsps: %016lx pr : %016lx\n",
114 regs->ar_rnat, regs->ar_bspstore, regs->pr);
115 printk("ldrs: %016lx ccv : %016lx fpsr: %016lx\n",
116 regs->loadrs, regs->ar_ccv, regs->ar_fpsr);
117 printk("csd : %016lx ssd : %016lx\n", regs->ar_csd, regs->ar_ssd);
118 printk("b0 : %016lx b6 : %016lx b7 : %016lx\n", regs->b0, regs->b6, regs->b7);
119 printk("f6 : %05lx%016lx f7 : %05lx%016lx\n",
120 regs->f6.u.bits[1], regs->f6.u.bits[0],
121 regs->f7.u.bits[1], regs->f7.u.bits[0]);
122 printk("f8 : %05lx%016lx f9 : %05lx%016lx\n",
123 regs->f8.u.bits[1], regs->f8.u.bits[0],
124 regs->f9.u.bits[1], regs->f9.u.bits[0]);
125 printk("f10 : %05lx%016lx f11 : %05lx%016lx\n",
126 regs->f10.u.bits[1], regs->f10.u.bits[0],
127 regs->f11.u.bits[1], regs->f11.u.bits[0]);
128
129 printk("r1 : %016lx r2 : %016lx r3 : %016lx\n", regs->r1, regs->r2, regs->r3);
130 printk("r8 : %016lx r9 : %016lx r10 : %016lx\n", regs->r8, regs->r9, regs->r10);
131 printk("r11 : %016lx r12 : %016lx r13 : %016lx\n", regs->r11, regs->r12, regs->r13);
132 printk("r14 : %016lx r15 : %016lx r16 : %016lx\n", regs->r14, regs->r15, regs->r16);
133 printk("r17 : %016lx r18 : %016lx r19 : %016lx\n", regs->r17, regs->r18, regs->r19);
134 printk("r20 : %016lx r21 : %016lx r22 : %016lx\n", regs->r20, regs->r21, regs->r22);
135 printk("r23 : %016lx r24 : %016lx r25 : %016lx\n", regs->r23, regs->r24, regs->r25);
136 printk("r26 : %016lx r27 : %016lx r28 : %016lx\n", regs->r26, regs->r27, regs->r28);
137 printk("r29 : %016lx r30 : %016lx r31 : %016lx\n", regs->r29, regs->r30, regs->r31);
138
139 if (user_mode(regs)) {
140 /* print the stacked registers */
141 unsigned long val, *bsp, ndirty;
142 int i, sof, is_nat = 0;
143
144 sof = regs->cr_ifs & 0x7f; /* size of frame */
145 ndirty = (regs->loadrs >> 19);
146 bsp = ia64_rse_skip_regs((unsigned long *) regs->ar_bspstore, ndirty);
147 for (i = 0; i < sof; ++i) {
148 get_user(val, (unsigned long __user *) ia64_rse_skip_regs(bsp, i));
149 printk("r%-3u:%c%016lx%s", 32 + i, is_nat ? '*' : ' ', val,
150 ((i == sof - 1) || (i % 3) == 2) ? "\n" : " ");
151 }
152 } else
153 show_stack(NULL, NULL);
154 }
155
156 void
157 do_notify_resume_user (sigset_t *oldset, struct sigscratch *scr, long in_syscall)
158 {
159 if (fsys_mode(current, &scr->pt)) {
160 /* defer signal-handling etc. until we return to privilege-level 0. */
161 if (!ia64_psr(&scr->pt)->lp)
162 ia64_psr(&scr->pt)->lp = 1;
163 return;
164 }
165
166 #ifdef CONFIG_PERFMON
167 if (current->thread.pfm_needs_checking)
168 pfm_handle_work();
169 #endif
170
171 /* deal with pending signal delivery */
172 if (test_thread_flag(TIF_SIGPENDING))
173 ia64_do_signal(oldset, scr, in_syscall);
174 }
175
176 static int pal_halt = 1;
177 static int __init nohalt_setup(char * str)
178 {
179 pal_halt = 0;
180 return 1;
181 }
182 __setup("nohalt", nohalt_setup);
183
184 /*
185 * We use this if we don't have any better idle routine..
186 */
187 void
188 default_idle (void)
189 {
190 unsigned long pmu_active = ia64_getreg(_IA64_REG_PSR) & (IA64_PSR_PP | IA64_PSR_UP);
191
192 while (!need_resched())
193 if (pal_halt && !pmu_active)
194 safe_halt();
195 else
196 cpu_relax();
197 }
198
199 #ifdef CONFIG_HOTPLUG_CPU
200 /* We don't actually take CPU down, just spin without interrupts. */
201 static inline void play_dead(void)
202 {
203 extern void ia64_cpu_local_tick (void);
204 unsigned int this_cpu = smp_processor_id();
205
206 /* Ack it */
207 __get_cpu_var(cpu_state) = CPU_DEAD;
208
209 max_xtp();
210 local_irq_disable();
211 idle_task_exit();
212 ia64_jump_to_sal(&sal_boot_rendez_state[this_cpu]);
213 /*
214 * The above is a point of no-return, the processor is
215 * expected to be in SAL loop now.
216 */
217 BUG();
218 }
219 #else
220 static inline void play_dead(void)
221 {
222 BUG();
223 }
224 #endif /* CONFIG_HOTPLUG_CPU */
225
226 void cpu_idle_wait(void)
227 {
228 unsigned int cpu, this_cpu = get_cpu();
229 cpumask_t map;
230
231 set_cpus_allowed(current, cpumask_of_cpu(this_cpu));
232 put_cpu();
233
234 cpus_clear(map);
235 for_each_online_cpu(cpu) {
236 per_cpu(cpu_idle_state, cpu) = 1;
237 cpu_set(cpu, map);
238 }
239
240 __get_cpu_var(cpu_idle_state) = 0;
241
242 wmb();
243 do {
244 ssleep(1);
245 for_each_online_cpu(cpu) {
246 if (cpu_isset(cpu, map) && !per_cpu(cpu_idle_state, cpu))
247 cpu_clear(cpu, map);
248 }
249 cpus_and(map, map, cpu_online_map);
250 } while (!cpus_empty(map));
251 }
252 EXPORT_SYMBOL_GPL(cpu_idle_wait);
253
254 void __attribute__((noreturn))
255 cpu_idle (void)
256 {
257 void (*mark_idle)(int) = ia64_mark_idle;
258
259 /* endless idle loop with no priority at all */
260 while (1) {
261 #ifdef CONFIG_SMP
262 if (!need_resched())
263 min_xtp();
264 #endif
265 while (!need_resched()) {
266 void (*idle)(void);
267
268 if (__get_cpu_var(cpu_idle_state))
269 __get_cpu_var(cpu_idle_state) = 0;
270
271 rmb();
272 if (mark_idle)
273 (*mark_idle)(1);
274
275 idle = pm_idle;
276 if (!idle)
277 idle = default_idle;
278 (*idle)();
279 }
280
281 if (mark_idle)
282 (*mark_idle)(0);
283
284 #ifdef CONFIG_SMP
285 normal_xtp();
286 #endif
287 schedule();
288 check_pgt_cache();
289 if (cpu_is_offline(smp_processor_id()))
290 play_dead();
291 }
292 }
293
294 void
295 ia64_save_extra (struct task_struct *task)
296 {
297 #ifdef CONFIG_PERFMON
298 unsigned long info;
299 #endif
300
301 if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0)
302 ia64_save_debug_regs(&task->thread.dbr[0]);
303
304 #ifdef CONFIG_PERFMON
305 if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0)
306 pfm_save_regs(task);
307
308 info = __get_cpu_var(pfm_syst_info);
309 if (info & PFM_CPUINFO_SYST_WIDE)
310 pfm_syst_wide_update_task(task, info, 0);
311 #endif
312
313 #ifdef CONFIG_IA32_SUPPORT
314 if (IS_IA32_PROCESS(ia64_task_regs(task)))
315 ia32_save_state(task);
316 #endif
317 }
318
319 void
320 ia64_load_extra (struct task_struct *task)
321 {
322 #ifdef CONFIG_PERFMON
323 unsigned long info;
324 #endif
325
326 if ((task->thread.flags & IA64_THREAD_DBG_VALID) != 0)
327 ia64_load_debug_regs(&task->thread.dbr[0]);
328
329 #ifdef CONFIG_PERFMON
330 if ((task->thread.flags & IA64_THREAD_PM_VALID) != 0)
331 pfm_load_regs(task);
332
333 info = __get_cpu_var(pfm_syst_info);
334 if (info & PFM_CPUINFO_SYST_WIDE)
335 pfm_syst_wide_update_task(task, info, 1);
336 #endif
337
338 #ifdef CONFIG_IA32_SUPPORT
339 if (IS_IA32_PROCESS(ia64_task_regs(task)))
340 ia32_load_state(task);
341 #endif
342 }
343
344 /*
345 * Copy the state of an ia-64 thread.
346 *
347 * We get here through the following call chain:
348 *
349 * from user-level: from kernel:
350 *
351 * <clone syscall> <some kernel call frames>
352 * sys_clone :
353 * do_fork do_fork
354 * copy_thread copy_thread
355 *
356 * This means that the stack layout is as follows:
357 *
358 * +---------------------+ (highest addr)
359 * | struct pt_regs |
360 * +---------------------+
361 * | struct switch_stack |
362 * +---------------------+
363 * | |
364 * | memory stack |
365 * | | <-- sp (lowest addr)
366 * +---------------------+
367 *
368 * Observe that we copy the unat values that are in pt_regs and switch_stack. Spilling an
369 * integer to address X causes bit N in ar.unat to be set to the NaT bit of the register,
370 * with N=(X & 0x1ff)/8. Thus, copying the unat value preserves the NaT bits ONLY if the
371 * pt_regs structure in the parent is congruent to that of the child, modulo 512. Since
372 * the stack is page aligned and the page size is at least 4KB, this is always the case,
373 * so there is nothing to worry about.
374 */
375 int
376 copy_thread (int nr, unsigned long clone_flags,
377 unsigned long user_stack_base, unsigned long user_stack_size,
378 struct task_struct *p, struct pt_regs *regs)
379 {
380 extern char ia64_ret_from_clone, ia32_ret_from_clone;
381 struct switch_stack *child_stack, *stack;
382 unsigned long rbs, child_rbs, rbs_size;
383 struct pt_regs *child_ptregs;
384 int retval = 0;
385
386 #ifdef CONFIG_SMP
387 /*
388 * For SMP idle threads, fork_by_hand() calls do_fork with
389 * NULL regs.
390 */
391 if (!regs)
392 return 0;
393 #endif
394
395 stack = ((struct switch_stack *) regs) - 1;
396
397 child_ptregs = (struct pt_regs *) ((unsigned long) p + IA64_STK_OFFSET) - 1;
398 child_stack = (struct switch_stack *) child_ptregs - 1;
399
400 /* copy parent's switch_stack & pt_regs to child: */
401 memcpy(child_stack, stack, sizeof(*child_ptregs) + sizeof(*child_stack));
402
403 rbs = (unsigned long) current + IA64_RBS_OFFSET;
404 child_rbs = (unsigned long) p + IA64_RBS_OFFSET;
405 rbs_size = stack->ar_bspstore - rbs;
406
407 /* copy the parent's register backing store to the child: */
408 memcpy((void *) child_rbs, (void *) rbs, rbs_size);
409
410 if (likely(user_mode(child_ptregs))) {
411 if ((clone_flags & CLONE_SETTLS) && !IS_IA32_PROCESS(regs))
412 child_ptregs->r13 = regs->r16; /* see sys_clone2() in entry.S */
413 if (user_stack_base) {
414 child_ptregs->r12 = user_stack_base + user_stack_size - 16;
415 child_ptregs->ar_bspstore = user_stack_base;
416 child_ptregs->ar_rnat = 0;
417 child_ptregs->loadrs = 0;
418 }
419 } else {
420 /*
421 * Note: we simply preserve the relative position of
422 * the stack pointer here. There is no need to
423 * allocate a scratch area here, since that will have
424 * been taken care of by the caller of sys_clone()
425 * already.
426 */
427 child_ptregs->r12 = (unsigned long) child_ptregs - 16; /* kernel sp */
428 child_ptregs->r13 = (unsigned long) p; /* set `current' pointer */
429 }
430 child_stack->ar_bspstore = child_rbs + rbs_size;
431 if (IS_IA32_PROCESS(regs))
432 child_stack->b0 = (unsigned long) &ia32_ret_from_clone;
433 else
434 child_stack->b0 = (unsigned long) &ia64_ret_from_clone;
435
436 /* copy parts of thread_struct: */
437 p->thread.ksp = (unsigned long) child_stack - 16;
438
439 /* stop some PSR bits from being inherited.
440 * the psr.up/psr.pp bits must be cleared on fork but inherited on execve()
441 * therefore we must specify them explicitly here and not include them in
442 * IA64_PSR_BITS_TO_CLEAR.
443 */
444 child_ptregs->cr_ipsr = ((child_ptregs->cr_ipsr | IA64_PSR_BITS_TO_SET)
445 & ~(IA64_PSR_BITS_TO_CLEAR | IA64_PSR_PP | IA64_PSR_UP));
446
447 /*
448 * NOTE: The calling convention considers all floating point
449 * registers in the high partition (fph) to be scratch. Since
450 * the only way to get to this point is through a system call,
451 * we know that the values in fph are all dead. Hence, there
452 * is no need to inherit the fph state from the parent to the
453 * child and all we have to do is to make sure that
454 * IA64_THREAD_FPH_VALID is cleared in the child.
455 *
456 * XXX We could push this optimization a bit further by
457 * clearing IA64_THREAD_FPH_VALID on ANY system call.
458 * However, it's not clear this is worth doing. Also, it
459 * would be a slight deviation from the normal Linux system
460 * call behavior where scratch registers are preserved across
461 * system calls (unless used by the system call itself).
462 */
463 # define THREAD_FLAGS_TO_CLEAR (IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID \
464 | IA64_THREAD_PM_VALID)
465 # define THREAD_FLAGS_TO_SET 0
466 p->thread.flags = ((current->thread.flags & ~THREAD_FLAGS_TO_CLEAR)
467 | THREAD_FLAGS_TO_SET);
468 ia64_drop_fpu(p); /* don't pick up stale state from a CPU's fph */
469 #ifdef CONFIG_IA32_SUPPORT
470 /*
471 * If we're cloning an IA32 task then save the IA32 extra
472 * state from the current task to the new task
473 */
474 if (IS_IA32_PROCESS(ia64_task_regs(current))) {
475 ia32_save_state(p);
476 if (clone_flags & CLONE_SETTLS)
477 retval = ia32_clone_tls(p, child_ptregs);
478
479 /* Copy partially mapped page list */
480 if (!retval)
481 retval = ia32_copy_partial_page_list(p, clone_flags);
482 }
483 #endif
484
485 #ifdef CONFIG_PERFMON
486 if (current->thread.pfm_context)
487 pfm_inherit(p, child_ptregs);
488 #endif
489 return retval;
490 }
491
492 static void
493 do_copy_task_regs (struct task_struct *task, struct unw_frame_info *info, void *arg)
494 {
495 unsigned long mask, sp, nat_bits = 0, ip, ar_rnat, urbs_end, cfm;
496 elf_greg_t *dst = arg;
497 struct pt_regs *pt;
498 char nat;
499 int i;
500
501 memset(dst, 0, sizeof(elf_gregset_t)); /* don't leak any kernel bits to user-level */
502
503 if (unw_unwind_to_user(info) < 0)
504 return;
505
506 unw_get_sp(info, &sp);
507 pt = (struct pt_regs *) (sp + 16);
508
509 urbs_end = ia64_get_user_rbs_end(task, pt, &cfm);
510
511 if (ia64_sync_user_rbs(task, info->sw, pt->ar_bspstore, urbs_end) < 0)
512 return;
513
514 ia64_peek(task, info->sw, urbs_end, (long) ia64_rse_rnat_addr((long *) urbs_end),
515 &ar_rnat);
516
517 /*
518 * coredump format:
519 * r0-r31
520 * NaT bits (for r0-r31; bit N == 1 iff rN is a NaT)
521 * predicate registers (p0-p63)
522 * b0-b7
523 * ip cfm user-mask
524 * ar.rsc ar.bsp ar.bspstore ar.rnat
525 * ar.ccv ar.unat ar.fpsr ar.pfs ar.lc ar.ec
526 */
527
528 /* r0 is zero */
529 for (i = 1, mask = (1UL << i); i < 32; ++i) {
530 unw_get_gr(info, i, &dst[i], &nat);
531 if (nat)
532 nat_bits |= mask;
533 mask <<= 1;
534 }
535 dst[32] = nat_bits;
536 unw_get_pr(info, &dst[33]);
537
538 for (i = 0; i < 8; ++i)
539 unw_get_br(info, i, &dst[34 + i]);
540
541 unw_get_rp(info, &ip);
542 dst[42] = ip + ia64_psr(pt)->ri;
543 dst[43] = cfm;
544 dst[44] = pt->cr_ipsr & IA64_PSR_UM;
545
546 unw_get_ar(info, UNW_AR_RSC, &dst[45]);
547 /*
548 * For bsp and bspstore, unw_get_ar() would return the kernel
549 * addresses, but we need the user-level addresses instead:
550 */
551 dst[46] = urbs_end; /* note: by convention PT_AR_BSP points to the end of the urbs! */
552 dst[47] = pt->ar_bspstore;
553 dst[48] = ar_rnat;
554 unw_get_ar(info, UNW_AR_CCV, &dst[49]);
555 unw_get_ar(info, UNW_AR_UNAT, &dst[50]);
556 unw_get_ar(info, UNW_AR_FPSR, &dst[51]);
557 dst[52] = pt->ar_pfs; /* UNW_AR_PFS is == to pt->cr_ifs for interrupt frames */
558 unw_get_ar(info, UNW_AR_LC, &dst[53]);
559 unw_get_ar(info, UNW_AR_EC, &dst[54]);
560 unw_get_ar(info, UNW_AR_CSD, &dst[55]);
561 unw_get_ar(info, UNW_AR_SSD, &dst[56]);
562 }
563
564 void
565 do_dump_task_fpu (struct task_struct *task, struct unw_frame_info *info, void *arg)
566 {
567 elf_fpreg_t *dst = arg;
568 int i;
569
570 memset(dst, 0, sizeof(elf_fpregset_t)); /* don't leak any "random" bits */
571
572 if (unw_unwind_to_user(info) < 0)
573 return;
574
575 /* f0 is 0.0, f1 is 1.0 */
576
577 for (i = 2; i < 32; ++i)
578 unw_get_fr(info, i, dst + i);
579
580 ia64_flush_fph(task);
581 if ((task->thread.flags & IA64_THREAD_FPH_VALID) != 0)
582 memcpy(dst + 32, task->thread.fph, 96*16);
583 }
584
585 void
586 do_copy_regs (struct unw_frame_info *info, void *arg)
587 {
588 do_copy_task_regs(current, info, arg);
589 }
590
591 void
592 do_dump_fpu (struct unw_frame_info *info, void *arg)
593 {
594 do_dump_task_fpu(current, info, arg);
595 }
596
597 int
598 dump_task_regs(struct task_struct *task, elf_gregset_t *regs)
599 {
600 struct unw_frame_info tcore_info;
601
602 if (current == task) {
603 unw_init_running(do_copy_regs, regs);
604 } else {
605 memset(&tcore_info, 0, sizeof(tcore_info));
606 unw_init_from_blocked_task(&tcore_info, task);
607 do_copy_task_regs(task, &tcore_info, regs);
608 }
609 return 1;
610 }
611
612 void
613 ia64_elf_core_copy_regs (struct pt_regs *pt, elf_gregset_t dst)
614 {
615 unw_init_running(do_copy_regs, dst);
616 }
617
618 int
619 dump_task_fpu (struct task_struct *task, elf_fpregset_t *dst)
620 {
621 struct unw_frame_info tcore_info;
622
623 if (current == task) {
624 unw_init_running(do_dump_fpu, dst);
625 } else {
626 memset(&tcore_info, 0, sizeof(tcore_info));
627 unw_init_from_blocked_task(&tcore_info, task);
628 do_dump_task_fpu(task, &tcore_info, dst);
629 }
630 return 1;
631 }
632
633 int
634 dump_fpu (struct pt_regs *pt, elf_fpregset_t dst)
635 {
636 unw_init_running(do_dump_fpu, dst);
637 return 1; /* f0-f31 are always valid so we always return 1 */
638 }
639
640 long
641 sys_execve (char __user *filename, char __user * __user *argv, char __user * __user *envp,
642 struct pt_regs *regs)
643 {
644 char *fname;
645 int error;
646
647 fname = getname(filename);
648 error = PTR_ERR(fname);
649 if (IS_ERR(fname))
650 goto out;
651 error = do_execve(fname, argv, envp, regs);
652 putname(fname);
653 out:
654 return error;
655 }
656
657 pid_t
658 kernel_thread (int (*fn)(void *), void *arg, unsigned long flags)
659 {
660 extern void start_kernel_thread (void);
661 unsigned long *helper_fptr = (unsigned long *) &start_kernel_thread;
662 struct {
663 struct switch_stack sw;
664 struct pt_regs pt;
665 } regs;
666
667 memset(&regs, 0, sizeof(regs));
668 regs.pt.cr_iip = helper_fptr[0]; /* set entry point (IP) */
669 regs.pt.r1 = helper_fptr[1]; /* set GP */
670 regs.pt.r9 = (unsigned long) fn; /* 1st argument */
671 regs.pt.r11 = (unsigned long) arg; /* 2nd argument */
672 /* Preserve PSR bits, except for bits 32-34 and 37-45, which we can't read. */
673 regs.pt.cr_ipsr = ia64_getreg(_IA64_REG_PSR) | IA64_PSR_BN;
674 regs.pt.cr_ifs = 1UL << 63; /* mark as valid, empty frame */
675 regs.sw.ar_fpsr = regs.pt.ar_fpsr = ia64_getreg(_IA64_REG_AR_FPSR);
676 regs.sw.ar_bspstore = (unsigned long) current + IA64_RBS_OFFSET;
677 regs.sw.pr = (1 << PRED_KERNEL_STACK);
678 return do_fork(flags | CLONE_VM | CLONE_UNTRACED, 0, &regs.pt, 0, NULL, NULL);
679 }
680 EXPORT_SYMBOL(kernel_thread);
681
682 /* This gets called from kernel_thread() via ia64_invoke_thread_helper(). */
683 int
684 kernel_thread_helper (int (*fn)(void *), void *arg)
685 {
686 #ifdef CONFIG_IA32_SUPPORT
687 if (IS_IA32_PROCESS(ia64_task_regs(current))) {
688 /* A kernel thread is always a 64-bit process. */
689 current->thread.map_base = DEFAULT_MAP_BASE;
690 current->thread.task_size = DEFAULT_TASK_SIZE;
691 ia64_set_kr(IA64_KR_IO_BASE, current->thread.old_iob);
692 ia64_set_kr(IA64_KR_TSSD, current->thread.old_k1);
693 }
694 #endif
695 return (*fn)(arg);
696 }
697
698 /*
699 * Flush thread state. This is called when a thread does an execve().
700 */
701 void
702 flush_thread (void)
703 {
704 /* drop floating-point and debug-register state if it exists: */
705 current->thread.flags &= ~(IA64_THREAD_FPH_VALID | IA64_THREAD_DBG_VALID);
706 ia64_drop_fpu(current);
707 if (IS_IA32_PROCESS(ia64_task_regs(current)))
708 ia32_drop_partial_page_list(current);
709 }
710
711 /*
712 * Clean up state associated with current thread. This is called when
713 * the thread calls exit().
714 */
715 void
716 exit_thread (void)
717 {
718 ia64_drop_fpu(current);
719 #ifdef CONFIG_PERFMON
720 /* if needed, stop monitoring and flush state to perfmon context */
721 if (current->thread.pfm_context)
722 pfm_exit_thread(current);
723
724 /* free debug register resources */
725 if (current->thread.flags & IA64_THREAD_DBG_VALID)
726 pfm_release_debug_registers(current);
727 #endif
728 if (IS_IA32_PROCESS(ia64_task_regs(current)))
729 ia32_drop_partial_page_list(current);
730 }
731
732 unsigned long
733 get_wchan (struct task_struct *p)
734 {
735 struct unw_frame_info info;
736 unsigned long ip;
737 int count = 0;
738
739 /*
740 * Note: p may not be a blocked task (it could be current or
741 * another process running on some other CPU. Rather than
742 * trying to determine if p is really blocked, we just assume
743 * it's blocked and rely on the unwind routines to fail
744 * gracefully if the process wasn't really blocked after all.
745 * --davidm 99/12/15
746 */
747 unw_init_from_blocked_task(&info, p);
748 do {
749 if (unw_unwind(&info) < 0)
750 return 0;
751 unw_get_ip(&info, &ip);
752 if (!in_sched_functions(ip))
753 return ip;
754 } while (count++ < 16);
755 return 0;
756 }
757
758 void
759 cpu_halt (void)
760 {
761 pal_power_mgmt_info_u_t power_info[8];
762 unsigned long min_power;
763 int i, min_power_state;
764
765 if (ia64_pal_halt_info(power_info) != 0)
766 return;
767
768 min_power_state = 0;
769 min_power = power_info[0].pal_power_mgmt_info_s.power_consumption;
770 for (i = 1; i < 8; ++i)
771 if (power_info[i].pal_power_mgmt_info_s.im
772 && power_info[i].pal_power_mgmt_info_s.power_consumption < min_power) {
773 min_power = power_info[i].pal_power_mgmt_info_s.power_consumption;
774 min_power_state = i;
775 }
776
777 while (1)
778 ia64_pal_halt(min_power_state);
779 }
780
781 void
782 machine_restart (char *restart_cmd)
783 {
784 (*efi.reset_system)(EFI_RESET_WARM, 0, 0, NULL);
785 }
786
787 EXPORT_SYMBOL(machine_restart);
788
789 void
790 machine_halt (void)
791 {
792 cpu_halt();
793 }
794
795 EXPORT_SYMBOL(machine_halt);
796
797 void
798 machine_power_off (void)
799 {
800 if (pm_power_off)
801 pm_power_off();
802 machine_halt();
803 }
804
805 EXPORT_SYMBOL(machine_power_off);
This page took 0.069046 seconds and 6 git commands to generate.