[IA64] move patchlist and machvec into init section
[deliverable/linux.git] / arch / ia64 / kernel / vmlinux.lds.S
1 #include <linux/config.h>
2
3 #include <asm/cache.h>
4 #include <asm/ptrace.h>
5 #include <asm/system.h>
6 #include <asm/pgtable.h>
7
8 #define LOAD_OFFSET (KERNEL_START - KERNEL_TR_PAGE_SIZE)
9 #include <asm-generic/vmlinux.lds.h>
10
11 #define IVT_TEXT \
12 VMLINUX_SYMBOL(__start_ivt_text) = .; \
13 *(.text.ivt) \
14 VMLINUX_SYMBOL(__end_ivt_text) = .;
15
16 OUTPUT_FORMAT("elf64-ia64-little")
17 OUTPUT_ARCH(ia64)
18 ENTRY(phys_start)
19 jiffies = jiffies_64;
20 PHDRS {
21 code PT_LOAD;
22 percpu PT_LOAD;
23 data PT_LOAD;
24 }
25 SECTIONS
26 {
27 /* Sections to be discarded */
28 /DISCARD/ : {
29 *(.exit.text)
30 *(.exit.data)
31 *(.exitcall.exit)
32 *(.IA_64.unwind.exit.text)
33 *(.IA_64.unwind_info.exit.text)
34 }
35
36 v = PAGE_OFFSET; /* this symbol is here to make debugging easier... */
37 phys_start = _start - LOAD_OFFSET;
38
39 code : { } :code
40 . = KERNEL_START;
41
42 _text = .;
43 _stext = .;
44
45 .text : AT(ADDR(.text) - LOAD_OFFSET)
46 {
47 IVT_TEXT
48 *(.text)
49 SCHED_TEXT
50 LOCK_TEXT
51 KPROBES_TEXT
52 *(.gnu.linkonce.t*)
53 }
54 .text2 : AT(ADDR(.text2) - LOAD_OFFSET)
55 { *(.text2) }
56 #ifdef CONFIG_SMP
57 .text.lock : AT(ADDR(.text.lock) - LOAD_OFFSET)
58 { *(.text.lock) }
59 #endif
60 _etext = .;
61
62 /* Read-only data */
63
64 /* Exception table */
65 . = ALIGN(16);
66 __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET)
67 {
68 __start___ex_table = .;
69 *(__ex_table)
70 __stop___ex_table = .;
71 }
72
73 /* Global data */
74 _data = .;
75
76 /* Unwind info & table: */
77 . = ALIGN(8);
78 .IA_64.unwind_info : AT(ADDR(.IA_64.unwind_info) - LOAD_OFFSET)
79 { *(.IA_64.unwind_info*) }
80 .IA_64.unwind : AT(ADDR(.IA_64.unwind) - LOAD_OFFSET)
81 {
82 __start_unwind = .;
83 *(.IA_64.unwind*)
84 __end_unwind = .;
85 }
86
87 RODATA
88
89 .opd : AT(ADDR(.opd) - LOAD_OFFSET)
90 { *(.opd) }
91
92 /* Initialization code and data: */
93
94 . = ALIGN(PAGE_SIZE);
95 __init_begin = .;
96 .init.text : AT(ADDR(.init.text) - LOAD_OFFSET)
97 {
98 _sinittext = .;
99 *(.init.text)
100 _einittext = .;
101 }
102
103 .init.data : AT(ADDR(.init.data) - LOAD_OFFSET)
104 { *(.init.data) }
105
106 .init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET)
107 {
108 __initramfs_start = .;
109 *(.init.ramfs)
110 __initramfs_end = .;
111 }
112
113 . = ALIGN(16);
114 .init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET)
115 {
116 __setup_start = .;
117 *(.init.setup)
118 __setup_end = .;
119 }
120 .initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET)
121 {
122 __initcall_start = .;
123 *(.initcall1.init)
124 *(.initcall2.init)
125 *(.initcall3.init)
126 *(.initcall4.init)
127 *(.initcall5.init)
128 *(.initcall6.init)
129 *(.initcall7.init)
130 __initcall_end = .;
131 }
132
133 .data.patch.vtop : AT(ADDR(.data.patch.vtop) - LOAD_OFFSET)
134 {
135 __start___vtop_patchlist = .;
136 *(.data.patch.vtop)
137 __end___vtop_patchlist = .;
138 }
139
140 .data.patch.mckinley_e9 : AT(ADDR(.data.patch.mckinley_e9) - LOAD_OFFSET)
141 {
142 __start___mckinley_e9_bundles = .;
143 *(.data.patch.mckinley_e9)
144 __end___mckinley_e9_bundles = .;
145 }
146
147 #if defined(CONFIG_IA64_GENERIC)
148 /* Machine Vector */
149 . = ALIGN(16);
150 .machvec : AT(ADDR(.machvec) - LOAD_OFFSET)
151 {
152 machvec_start = .;
153 *(.machvec)
154 machvec_end = .;
155 }
156 #endif
157
158 __con_initcall_start = .;
159 .con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET)
160 { *(.con_initcall.init) }
161 __con_initcall_end = .;
162 __security_initcall_start = .;
163 .security_initcall.init : AT(ADDR(.security_initcall.init) - LOAD_OFFSET)
164 { *(.security_initcall.init) }
165 __security_initcall_end = .;
166 . = ALIGN(PAGE_SIZE);
167 __init_end = .;
168
169 /* The initial task and kernel stack */
170 .data.init_task : AT(ADDR(.data.init_task) - LOAD_OFFSET)
171 { *(.data.init_task) }
172
173 .data.page_aligned : AT(ADDR(.data.page_aligned) - LOAD_OFFSET)
174 { *(__special_page_section)
175 __start_gate_section = .;
176 *(.data.gate)
177 __stop_gate_section = .;
178 }
179 . = ALIGN(PAGE_SIZE); /* make sure the gate page doesn't expose kernel data */
180
181 .data.read_mostly : AT(ADDR(.data.read_mostly) - LOAD_OFFSET)
182 { *(.data.read_mostly) }
183
184 .data.cacheline_aligned : AT(ADDR(.data.cacheline_aligned) - LOAD_OFFSET)
185 { *(.data.cacheline_aligned) }
186
187 /* Per-cpu data: */
188 percpu : { } :percpu
189 . = ALIGN(PERCPU_PAGE_SIZE);
190 __phys_per_cpu_start = .;
191 .data.percpu PERCPU_ADDR : AT(__phys_per_cpu_start - LOAD_OFFSET)
192 {
193 __per_cpu_start = .;
194 *(.data.percpu)
195 __per_cpu_end = .;
196 }
197 . = __phys_per_cpu_start + PERCPU_PAGE_SIZE; /* ensure percpu data fits into percpu page size */
198
199 data : { } :data
200 .data : AT(ADDR(.data) - LOAD_OFFSET)
201 { *(.data) *(.data1) *(.gnu.linkonce.d*) CONSTRUCTORS }
202
203 . = ALIGN(16); /* gp must be 16-byte aligned for exc. table */
204 .got : AT(ADDR(.got) - LOAD_OFFSET)
205 { *(.got.plt) *(.got) }
206 __gp = ADDR(.got) + 0x200000;
207 /* We want the small data sections together, so single-instruction offsets
208 can access them all, and initialized data all before uninitialized, so
209 we can shorten the on-disk segment size. */
210 .sdata : AT(ADDR(.sdata) - LOAD_OFFSET)
211 { *(.sdata) *(.sdata1) *(.srdata) }
212 _edata = .;
213 _bss = .;
214 .sbss : AT(ADDR(.sbss) - LOAD_OFFSET)
215 { *(.sbss) *(.scommon) }
216 .bss : AT(ADDR(.bss) - LOAD_OFFSET)
217 { *(.bss) *(COMMON) }
218
219 _end = .;
220
221 code : { } :code
222 /* Stabs debugging sections. */
223 .stab 0 : { *(.stab) }
224 .stabstr 0 : { *(.stabstr) }
225 .stab.excl 0 : { *(.stab.excl) }
226 .stab.exclstr 0 : { *(.stab.exclstr) }
227 .stab.index 0 : { *(.stab.index) }
228 .stab.indexstr 0 : { *(.stab.indexstr) }
229 /* DWARF debug sections.
230 Symbols in the DWARF debugging sections are relative to the beginning
231 of the section so we begin them at 0. */
232 /* DWARF 1 */
233 .debug 0 : { *(.debug) }
234 .line 0 : { *(.line) }
235 /* GNU DWARF 1 extensions */
236 .debug_srcinfo 0 : { *(.debug_srcinfo) }
237 .debug_sfnames 0 : { *(.debug_sfnames) }
238 /* DWARF 1.1 and DWARF 2 */
239 .debug_aranges 0 : { *(.debug_aranges) }
240 .debug_pubnames 0 : { *(.debug_pubnames) }
241 /* DWARF 2 */
242 .debug_info 0 : { *(.debug_info) }
243 .debug_abbrev 0 : { *(.debug_abbrev) }
244 .debug_line 0 : { *(.debug_line) }
245 .debug_frame 0 : { *(.debug_frame) }
246 .debug_str 0 : { *(.debug_str) }
247 .debug_loc 0 : { *(.debug_loc) }
248 .debug_macinfo 0 : { *(.debug_macinfo) }
249 /* SGI/MIPS DWARF 2 extensions */
250 .debug_weaknames 0 : { *(.debug_weaknames) }
251 .debug_funcnames 0 : { *(.debug_funcnames) }
252 .debug_typenames 0 : { *(.debug_typenames) }
253 .debug_varnames 0 : { *(.debug_varnames) }
254 /* These must appear regardless of . */
255 /* Discard them for now since Intel SoftSDV cannot handle them.
256 .comment 0 : { *(.comment) }
257 .note 0 : { *(.note) }
258 */
259 /DISCARD/ : { *(.comment) }
260 /DISCARD/ : { *(.note) }
261 }
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