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[deliverable/linux.git] / arch / ia64 / kvm / kvm_minstate.h
1 /*
2 * kvm_minstate.h: min save macros
3 * Copyright (c) 2007, Intel Corporation.
4 *
5 * Xuefei Xu (Anthony Xu) (Anthony.xu@intel.com)
6 * Xiantao Zhang (xiantao.zhang@intel.com)
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms and conditions of the GNU General Public License,
10 * version 2, as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
19 * Place - Suite 330, Boston, MA 02111-1307 USA.
20 *
21 */
22
23
24 #include <asm/asmmacro.h>
25 #include <asm/types.h>
26 #include <asm/kregs.h>
27 #include "asm-offsets.h"
28
29 #define KVM_MINSTATE_START_SAVE_MIN \
30 mov ar.rsc = 0;/* set enforced lazy mode, pl 0, little-endian, loadrs=0 */\
31 ;; \
32 mov.m r28 = ar.rnat; \
33 addl r22 = VMM_RBS_OFFSET,r1; /* compute base of RBS */ \
34 ;; \
35 lfetch.fault.excl.nt1 [r22]; \
36 addl r1 = IA64_STK_OFFSET-VMM_PT_REGS_SIZE,r1; /* compute base of memory stack */ \
37 mov r23 = ar.bspstore; /* save ar.bspstore */ \
38 ;; \
39 mov ar.bspstore = r22; /* switch to kernel RBS */\
40 ;; \
41 mov r18 = ar.bsp; \
42 mov ar.rsc = 0x3; /* set eager mode, pl 0, little-endian, loadrs=0 */
43
44
45
46 #define KVM_MINSTATE_END_SAVE_MIN \
47 bsw.1; /* switch back to bank 1 (must be last in insn group) */\
48 ;;
49
50
51 #define PAL_VSA_SYNC_READ \
52 /* begin to call pal vps sync_read */ \
53 {.mii; \
54 add r25 = VMM_VPD_BASE_OFFSET, r21; \
55 nop 0x0; \
56 mov r24=ip; \
57 ;; \
58 } \
59 {.mmb \
60 add r24=0x20, r24; \
61 ld8 r25 = [r25]; /* read vpd base */ \
62 br.cond.sptk kvm_vps_sync_read; /*call the service*/ \
63 ;; \
64 }; \
65
66
67 #define KVM_MINSTATE_GET_CURRENT(reg) mov reg=r21
68
69 /*
70 * KVM_DO_SAVE_MIN switches to the kernel stacks (if necessary) and saves
71 * the minimum state necessary that allows us to turn psr.ic back
72 * on.
73 *
74 * Assumed state upon entry:
75 * psr.ic: off
76 * r31: contains saved predicates (pr)
77 *
78 * Upon exit, the state is as follows:
79 * psr.ic: off
80 * r2 = points to &pt_regs.r16
81 * r8 = contents of ar.ccv
82 * r9 = contents of ar.csd
83 * r10 = contents of ar.ssd
84 * r11 = FPSR_DEFAULT
85 * r12 = kernel sp (kernel virtual address)
86 * r13 = points to current task_struct (kernel virtual address)
87 * p15 = TRUE if psr.i is set in cr.ipsr
88 * predicate registers (other than p2, p3, and p15), b6, r3, r14, r15:
89 * preserved
90 *
91 * Note that psr.ic is NOT turned on by this macro. This is so that
92 * we can pass interruption state as arguments to a handler.
93 */
94
95
96 #define PT(f) (VMM_PT_REGS_##f##_OFFSET)
97
98 #define KVM_DO_SAVE_MIN(COVER,SAVE_IFS,EXTRA) \
99 KVM_MINSTATE_GET_CURRENT(r16); /* M (or M;;I) */ \
100 mov r27 = ar.rsc; /* M */ \
101 mov r20 = r1; /* A */ \
102 mov r25 = ar.unat; /* M */ \
103 mov r29 = cr.ipsr; /* M */ \
104 mov r26 = ar.pfs; /* I */ \
105 mov r18 = cr.isr; \
106 COVER; /* B;; (or nothing) */ \
107 ;; \
108 tbit.z p0,p15 = r29,IA64_PSR_I_BIT; \
109 mov r1 = r16; \
110 /* mov r21=r16; */ \
111 /* switch from user to kernel RBS: */ \
112 ;; \
113 invala; /* M */ \
114 SAVE_IFS; \
115 ;; \
116 KVM_MINSTATE_START_SAVE_MIN \
117 adds r17 = 2*L1_CACHE_BYTES,r1;/* cache-line size */ \
118 adds r16 = PT(CR_IPSR),r1; \
119 ;; \
120 lfetch.fault.excl.nt1 [r17],L1_CACHE_BYTES; \
121 st8 [r16] = r29; /* save cr.ipsr */ \
122 ;; \
123 lfetch.fault.excl.nt1 [r17]; \
124 tbit.nz p15,p0 = r29,IA64_PSR_I_BIT; \
125 mov r29 = b0 \
126 ;; \
127 adds r16 = PT(R8),r1; /* initialize first base pointer */\
128 adds r17 = PT(R9),r1; /* initialize second base pointer */\
129 ;; \
130 .mem.offset 0,0; st8.spill [r16] = r8,16; \
131 .mem.offset 8,0; st8.spill [r17] = r9,16; \
132 ;; \
133 .mem.offset 0,0; st8.spill [r16] = r10,24; \
134 .mem.offset 8,0; st8.spill [r17] = r11,24; \
135 ;; \
136 mov r9 = cr.iip; /* M */ \
137 mov r10 = ar.fpsr; /* M */ \
138 ;; \
139 st8 [r16] = r9,16; /* save cr.iip */ \
140 st8 [r17] = r30,16; /* save cr.ifs */ \
141 sub r18 = r18,r22; /* r18=RSE.ndirty*8 */ \
142 ;; \
143 st8 [r16] = r25,16; /* save ar.unat */ \
144 st8 [r17] = r26,16; /* save ar.pfs */ \
145 shl r18 = r18,16; /* calu ar.rsc used for "loadrs" */\
146 ;; \
147 st8 [r16] = r27,16; /* save ar.rsc */ \
148 st8 [r17] = r28,16; /* save ar.rnat */ \
149 ;; /* avoid RAW on r16 & r17 */ \
150 st8 [r16] = r23,16; /* save ar.bspstore */ \
151 st8 [r17] = r31,16; /* save predicates */ \
152 ;; \
153 st8 [r16] = r29,16; /* save b0 */ \
154 st8 [r17] = r18,16; /* save ar.rsc value for "loadrs" */\
155 ;; \
156 .mem.offset 0,0; st8.spill [r16] = r20,16;/* save original r1 */ \
157 .mem.offset 8,0; st8.spill [r17] = r12,16; \
158 adds r12 = -16,r1; /* switch to kernel memory stack */ \
159 ;; \
160 .mem.offset 0,0; st8.spill [r16] = r13,16; \
161 .mem.offset 8,0; st8.spill [r17] = r10,16; /* save ar.fpsr */\
162 mov r13 = r21; /* establish `current' */ \
163 ;; \
164 .mem.offset 0,0; st8.spill [r16] = r15,16; \
165 .mem.offset 8,0; st8.spill [r17] = r14,16; \
166 ;; \
167 .mem.offset 0,0; st8.spill [r16] = r2,16; \
168 .mem.offset 8,0; st8.spill [r17] = r3,16; \
169 adds r2 = VMM_PT_REGS_R16_OFFSET,r1; \
170 ;; \
171 adds r16 = VMM_VCPU_IIPA_OFFSET,r13; \
172 adds r17 = VMM_VCPU_ISR_OFFSET,r13; \
173 mov r26 = cr.iipa; \
174 mov r27 = cr.isr; \
175 ;; \
176 st8 [r16] = r26; \
177 st8 [r17] = r27; \
178 ;; \
179 EXTRA; \
180 mov r8 = ar.ccv; \
181 mov r9 = ar.csd; \
182 mov r10 = ar.ssd; \
183 movl r11 = FPSR_DEFAULT; /* L-unit */ \
184 adds r17 = VMM_VCPU_GP_OFFSET,r13; \
185 ;; \
186 ld8 r1 = [r17];/* establish kernel global pointer */ \
187 ;; \
188 PAL_VSA_SYNC_READ \
189 KVM_MINSTATE_END_SAVE_MIN
190
191 /*
192 * SAVE_REST saves the remainder of pt_regs (with psr.ic on).
193 *
194 * Assumed state upon entry:
195 * psr.ic: on
196 * r2: points to &pt_regs.f6
197 * r3: points to &pt_regs.f7
198 * r8: contents of ar.ccv
199 * r9: contents of ar.csd
200 * r10: contents of ar.ssd
201 * r11: FPSR_DEFAULT
202 *
203 * Registers r14 and r15 are guaranteed not to be touched by SAVE_REST.
204 */
205 #define KVM_SAVE_REST \
206 .mem.offset 0,0; st8.spill [r2] = r16,16; \
207 .mem.offset 8,0; st8.spill [r3] = r17,16; \
208 ;; \
209 .mem.offset 0,0; st8.spill [r2] = r18,16; \
210 .mem.offset 8,0; st8.spill [r3] = r19,16; \
211 ;; \
212 .mem.offset 0,0; st8.spill [r2] = r20,16; \
213 .mem.offset 8,0; st8.spill [r3] = r21,16; \
214 mov r18=b6; \
215 ;; \
216 .mem.offset 0,0; st8.spill [r2] = r22,16; \
217 .mem.offset 8,0; st8.spill [r3] = r23,16; \
218 mov r19 = b7; \
219 ;; \
220 .mem.offset 0,0; st8.spill [r2] = r24,16; \
221 .mem.offset 8,0; st8.spill [r3] = r25,16; \
222 ;; \
223 .mem.offset 0,0; st8.spill [r2] = r26,16; \
224 .mem.offset 8,0; st8.spill [r3] = r27,16; \
225 ;; \
226 .mem.offset 0,0; st8.spill [r2] = r28,16; \
227 .mem.offset 8,0; st8.spill [r3] = r29,16; \
228 ;; \
229 .mem.offset 0,0; st8.spill [r2] = r30,16; \
230 .mem.offset 8,0; st8.spill [r3] = r31,32; \
231 ;; \
232 mov ar.fpsr = r11; \
233 st8 [r2] = r8,8; \
234 adds r24 = PT(B6)-PT(F7),r3; \
235 adds r25 = PT(B7)-PT(F7),r3; \
236 ;; \
237 st8 [r24] = r18,16; /* b6 */ \
238 st8 [r25] = r19,16; /* b7 */ \
239 adds r2 = PT(R4)-PT(F6),r2; \
240 adds r3 = PT(R5)-PT(F7),r3; \
241 ;; \
242 st8 [r24] = r9; /* ar.csd */ \
243 st8 [r25] = r10; /* ar.ssd */ \
244 ;; \
245 mov r18 = ar.unat; \
246 adds r19 = PT(EML_UNAT)-PT(R4),r2; \
247 ;; \
248 st8 [r19] = r18; /* eml_unat */ \
249
250
251 #define KVM_SAVE_EXTRA \
252 .mem.offset 0,0; st8.spill [r2] = r4,16; \
253 .mem.offset 8,0; st8.spill [r3] = r5,16; \
254 ;; \
255 .mem.offset 0,0; st8.spill [r2] = r6,16; \
256 .mem.offset 8,0; st8.spill [r3] = r7; \
257 ;; \
258 mov r26 = ar.unat; \
259 ;; \
260 st8 [r2] = r26;/* eml_unat */ \
261
262 #define KVM_SAVE_MIN_WITH_COVER KVM_DO_SAVE_MIN(cover, mov r30 = cr.ifs,)
263 #define KVM_SAVE_MIN_WITH_COVER_R19 KVM_DO_SAVE_MIN(cover, mov r30 = cr.ifs, mov r15 = r19)
264 #define KVM_SAVE_MIN KVM_DO_SAVE_MIN( , mov r30 = r0, )
Linux kernel - Deliverables
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