Merge branch 'x86-efi-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[deliverable/linux.git] / arch / m68k / Kconfig.cpu
1 comment "Processor Type"
2
3 choice
4 prompt "CPU family support"
5 default M68KCLASSIC if MMU
6 default COLDFIRE if !MMU
7 help
8 The Freescale (was Motorola) M68K family of processors implements
9 the full 68000 processor instruction set.
10 The Freescale ColdFire family of processors is a modern derivative
11 of the 68000 processor family. They are mainly targeted at embedded
12 applications, and are all System-On-Chip (SOC) devices, as opposed
13 to stand alone CPUs. They implement a subset of the original 68000
14 processor instruction set.
15 If you anticipate running this kernel on a computer with a classic
16 MC68xxx processor, select M68KCLASSIC.
17 If you anticipate running this kernel on a computer with a ColdFire
18 processor, select COLDFIRE.
19
20 config M68KCLASSIC
21 bool "Classic M68K CPU family support"
22
23 config COLDFIRE
24 bool "Coldfire CPU family support"
25 select GENERIC_GPIO
26 select ARCH_WANT_OPTIONAL_GPIOLIB
27 select ARCH_HAVE_CUSTOM_GPIO_H
28 select CPU_HAS_NO_BITFIELDS
29 select CPU_HAS_NO_MULDIV64
30 select GENERIC_CSUM
31
32 endchoice
33
34 if M68KCLASSIC
35
36 config M68000
37 bool
38 select CPU_HAS_NO_BITFIELDS
39 select CPU_HAS_NO_MULDIV64
40 select GENERIC_CSUM
41 help
42 The Freescale (was Motorola) 68000 CPU is the first generation of
43 the well known M68K family of processors. The CPU core as well as
44 being available as a stand alone CPU was also used in many
45 System-On-Chip devices (eg 68328, 68302, etc). It does not contain
46 a paging MMU.
47
48 config MCPU32
49 bool
50 select CPU_HAS_NO_BITFIELDS
51 help
52 The Freescale (was then Motorola) CPU32 is a CPU core that is
53 based on the 68020 processor. For the most part it is used in
54 System-On-Chip parts, and does not contain a paging MMU.
55
56 config M68020
57 bool "68020 support"
58 depends on MMU
59 select GENERIC_ATOMIC64
60 select CPU_HAS_ADDRESS_SPACES
61 help
62 If you anticipate running this kernel on a computer with a MC68020
63 processor, say Y. Otherwise, say N. Note that the 68020 requires a
64 68851 MMU (Memory Management Unit) to run Linux/m68k, except on the
65 Sun 3, which provides its own version.
66
67 config M68030
68 bool "68030 support"
69 depends on MMU && !MMU_SUN3
70 select GENERIC_ATOMIC64
71 select CPU_HAS_ADDRESS_SPACES
72 help
73 If you anticipate running this kernel on a computer with a MC68030
74 processor, say Y. Otherwise, say N. Note that a MC68EC030 will not
75 work, as it does not include an MMU (Memory Management Unit).
76
77 config M68040
78 bool "68040 support"
79 depends on MMU && !MMU_SUN3
80 select GENERIC_ATOMIC64
81 select CPU_HAS_ADDRESS_SPACES
82 help
83 If you anticipate running this kernel on a computer with a MC68LC040
84 or MC68040 processor, say Y. Otherwise, say N. Note that an
85 MC68EC040 will not work, as it does not include an MMU (Memory
86 Management Unit).
87
88 config M68060
89 bool "68060 support"
90 depends on MMU && !MMU_SUN3
91 select GENERIC_ATOMIC64
92 select CPU_HAS_ADDRESS_SPACES
93 help
94 If you anticipate running this kernel on a computer with a MC68060
95 processor, say Y. Otherwise, say N.
96
97 config M68328
98 bool "MC68328"
99 depends on !MMU
100 select M68000
101 help
102 Motorola 68328 processor support.
103
104 config M68EZ328
105 bool "MC68EZ328"
106 depends on !MMU
107 select M68000
108 help
109 Motorola 68EX328 processor support.
110
111 config M68VZ328
112 bool "MC68VZ328"
113 depends on !MMU
114 select M68000
115 help
116 Motorola 68VZ328 processor support.
117
118 config M68360
119 bool "MC68360"
120 depends on !MMU
121 select MCPU32
122 help
123 Motorola 68360 processor support.
124
125 endif # M68KCLASSIC
126
127 if COLDFIRE
128
129 config M5206
130 bool "MCF5206"
131 depends on !MMU
132 select COLDFIRE_SW_A7
133 select HAVE_MBAR
134 help
135 Motorola ColdFire 5206 processor support.
136
137 config M5206e
138 bool "MCF5206e"
139 depends on !MMU
140 select COLDFIRE_SW_A7
141 select HAVE_MBAR
142 help
143 Motorola ColdFire 5206e processor support.
144
145 config M520x
146 bool "MCF520x"
147 depends on !MMU
148 select GENERIC_CLOCKEVENTS
149 select HAVE_CACHE_SPLIT
150 help
151 Freescale Coldfire 5207/5208 processor support.
152
153 config M523x
154 bool "MCF523x"
155 depends on !MMU
156 select GENERIC_CLOCKEVENTS
157 select HAVE_CACHE_SPLIT
158 select HAVE_IPSBAR
159 help
160 Freescale Coldfire 5230/1/2/4/5 processor support
161
162 config M5249
163 bool "MCF5249"
164 depends on !MMU
165 select COLDFIRE_SW_A7
166 select HAVE_MBAR
167 help
168 Motorola ColdFire 5249 processor support.
169
170 config M525x
171 bool "MCF525x"
172 depends on !MMU
173 select COLDFIRE_SW_A7
174 select HAVE_MBAR
175 help
176 Freescale (Motorola) Coldfire 5251/5253 processor support.
177
178 config M527x
179 bool
180
181 config M5271
182 bool "MCF5271"
183 depends on !MMU
184 select M527x
185 select HAVE_CACHE_SPLIT
186 select HAVE_IPSBAR
187 select GENERIC_CLOCKEVENTS
188 help
189 Freescale (Motorola) ColdFire 5270/5271 processor support.
190
191 config M5272
192 bool "MCF5272"
193 depends on !MMU
194 select COLDFIRE_SW_A7
195 select HAVE_MBAR
196 help
197 Motorola ColdFire 5272 processor support.
198
199 config M5275
200 bool "MCF5275"
201 depends on !MMU
202 select M527x
203 select HAVE_CACHE_SPLIT
204 select HAVE_IPSBAR
205 select GENERIC_CLOCKEVENTS
206 help
207 Freescale (Motorola) ColdFire 5274/5275 processor support.
208
209 config M528x
210 bool "MCF528x"
211 depends on !MMU
212 select GENERIC_CLOCKEVENTS
213 select HAVE_CACHE_SPLIT
214 select HAVE_IPSBAR
215 help
216 Motorola ColdFire 5280/5282 processor support.
217
218 config M5307
219 bool "MCF5307"
220 depends on !MMU
221 select COLDFIRE_SW_A7
222 select HAVE_CACHE_CB
223 select HAVE_MBAR
224 help
225 Motorola ColdFire 5307 processor support.
226
227 config M532x
228 bool "MCF532x"
229 depends on !MMU
230 select HAVE_CACHE_CB
231 help
232 Freescale (Motorola) ColdFire 532x processor support.
233
234 config M5407
235 bool "MCF5407"
236 depends on !MMU
237 select COLDFIRE_SW_A7
238 select HAVE_CACHE_CB
239 select HAVE_MBAR
240 help
241 Motorola ColdFire 5407 processor support.
242
243 config M54xx
244 bool
245
246 config M547x
247 bool "MCF547x"
248 select M54xx
249 select MMU_COLDFIRE if MMU
250 select HAVE_CACHE_CB
251 select HAVE_MBAR
252 help
253 Freescale ColdFire 5470/5471/5472/5473/5474/5475 processor support.
254
255 config M548x
256 bool "MCF548x"
257 select MMU_COLDFIRE if MMU
258 select M54xx
259 select HAVE_CACHE_CB
260 select HAVE_MBAR
261 help
262 Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.
263
264 config M5441x
265 bool "MCF5441x"
266 depends on !MMU
267 select GENERIC_CLOCKEVENTS
268 select HAVE_CACHE_CB
269 help
270 Freescale Coldfire 54410/54415/54416/54417/54418 processor support.
271
272 endif # COLDFIRE
273
274
275 comment "Processor Specific Options"
276
277 config M68KFPU_EMU
278 bool "Math emulation support (EXPERIMENTAL)"
279 depends on MMU
280 depends on EXPERIMENTAL
281 help
282 At some point in the future, this will cause floating-point math
283 instructions to be emulated by the kernel on machines that lack a
284 floating-point math coprocessor. Thrill-seekers and chronically
285 sleep-deprived psychotic hacker types can say Y now, everyone else
286 should probably wait a while.
287
288 config M68KFPU_EMU_EXTRAPREC
289 bool "Math emulation extra precision"
290 depends on M68KFPU_EMU
291 help
292 The fpu uses normally a few bit more during calculations for
293 correct rounding, the emulator can (often) do the same but this
294 extra calculation can cost quite some time, so you can disable
295 it here. The emulator will then "only" calculate with a 64 bit
296 mantissa and round slightly incorrect, what is more than enough
297 for normal usage.
298
299 config M68KFPU_EMU_ONLY
300 bool "Math emulation only kernel"
301 depends on M68KFPU_EMU
302 help
303 This option prevents any floating-point instructions from being
304 compiled into the kernel, thereby the kernel doesn't save any
305 floating point context anymore during task switches, so this
306 kernel will only be usable on machines without a floating-point
307 math coprocessor. This makes the kernel a bit faster as no tests
308 needs to be executed whether a floating-point instruction in the
309 kernel should be executed or not.
310
311 config ADVANCED
312 bool "Advanced configuration options"
313 depends on MMU
314 ---help---
315 This gives you access to some advanced options for the CPU. The
316 defaults should be fine for most users, but these options may make
317 it possible for you to improve performance somewhat if you know what
318 you are doing.
319
320 Note that the answer to this question won't directly affect the
321 kernel: saying N will just cause the configurator to skip all
322 the questions about these options.
323
324 Most users should say N to this question.
325
326 config RMW_INSNS
327 bool "Use read-modify-write instructions"
328 depends on ADVANCED
329 ---help---
330 This allows to use certain instructions that work with indivisible
331 read-modify-write bus cycles. While this is faster than the
332 workaround of disabling interrupts, it can conflict with DMA
333 ( = direct memory access) on many Amiga systems, and it is also said
334 to destabilize other machines. It is very likely that this will
335 cause serious problems on any Amiga or Atari Medusa if set. The only
336 configuration where it should work are 68030-based Ataris, where it
337 apparently improves performance. But you've been warned! Unless you
338 really know what you are doing, say N. Try Y only if you're quite
339 adventurous.
340
341 config SINGLE_MEMORY_CHUNK
342 bool "Use one physical chunk of memory only" if ADVANCED && !SUN3
343 depends on MMU
344 default y if SUN3
345 select NEED_MULTIPLE_NODES
346 help
347 Ignore all but the first contiguous chunk of physical memory for VM
348 purposes. This will save a few bytes kernel size and may speed up
349 some operations. Say N if not sure.
350
351 config ARCH_DISCONTIGMEM_ENABLE
352 def_bool MMU && !SINGLE_MEMORY_CHUNK
353
354 config 060_WRITETHROUGH
355 bool "Use write-through caching for 68060 supervisor accesses"
356 depends on ADVANCED && M68060
357 ---help---
358 The 68060 generally uses copyback caching of recently accessed data.
359 Copyback caching means that memory writes will be held in an on-chip
360 cache and only written back to memory some time later. Saying Y
361 here will force supervisor (kernel) accesses to use writethrough
362 caching. Writethrough caching means that data is written to memory
363 straight away, so that cache and memory data always agree.
364 Writethrough caching is less efficient, but is needed for some
365 drivers on 68060 based systems where the 68060 bus snooping signal
366 is hardwired on. The 53c710 SCSI driver is known to suffer from
367 this problem.
368
369 config M68K_L2_CACHE
370 bool
371 depends on MAC
372 default y
373
374 config NODES_SHIFT
375 int
376 default "3"
377 depends on !SINGLE_MEMORY_CHUNK
378
379 config FPU
380 bool
381
382 config COLDFIRE_SW_A7
383 bool
384
385 config HAVE_CACHE_SPLIT
386 bool
387
388 config HAVE_CACHE_CB
389 bool
390
391 config HAVE_MBAR
392 bool
393
394 config HAVE_IPSBAR
395 bool
396
397 config CLOCK_SET
398 bool "Enable setting the CPU clock frequency"
399 depends on COLDFIRE
400 default n
401 help
402 On some CPU's you do not need to know what the core CPU clock
403 frequency is. On these you can disable clock setting. On some
404 traditional 68K parts, and on all ColdFire parts you need to set
405 the appropriate CPU clock frequency. On these devices many of the
406 onboard peripherals derive their timing from the master CPU clock
407 frequency.
408
409 config CLOCK_FREQ
410 int "Set the core clock frequency"
411 default "66666666"
412 depends on CLOCK_SET
413 help
414 Define the CPU clock frequency in use. This is the core clock
415 frequency, it may or may not be the same as the external clock
416 crystal fitted to your board. Some processors have an internal
417 PLL and can have their frequency programmed at run time, others
418 use internal dividers. In general the kernel won't setup a PLL
419 if it is fitted (there are some exceptions). This value will be
420 specific to the exact CPU that you are using.
421
422 config OLDMASK
423 bool "Old mask 5307 (1H55J) silicon"
424 depends on M5307
425 help
426 Build support for the older revision ColdFire 5307 silicon.
427 Specifically this is the 1H55J mask revision.
428
429 if HAVE_CACHE_SPLIT
430 choice
431 prompt "Split Cache Configuration"
432 default CACHE_I
433
434 config CACHE_I
435 bool "Instruction"
436 help
437 Use all of the ColdFire CPU cache memory as an instruction cache.
438
439 config CACHE_D
440 bool "Data"
441 help
442 Use all of the ColdFire CPU cache memory as a data cache.
443
444 config CACHE_BOTH
445 bool "Both"
446 help
447 Split the ColdFire CPU cache, and use half as an instruction cache
448 and half as a data cache.
449 endchoice
450 endif
451
452 if HAVE_CACHE_CB
453 choice
454 prompt "Data cache mode"
455 default CACHE_WRITETHRU
456
457 config CACHE_WRITETHRU
458 bool "Write-through"
459 help
460 The ColdFire CPU cache is set into Write-through mode.
461
462 config CACHE_COPYBACK
463 bool "Copy-back"
464 help
465 The ColdFire CPU cache is set into Copy-back mode.
466 endchoice
467 endif
468
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