arch/m68k/mac/psc.c

   1 /*
   2  *      Apple Peripheral System Controller (PSC)
   3  *
   4  *      The PSC is used on the AV Macs to control IO functions not handled
   5  *      by the VIAs (Ethernet, DSP, SCC).
   6  *
   7  * TO DO:
   8  *
   9  * Try to figure out what's going on in pIFR5 and pIFR6. There seem to be
  10  * persisant interrupt conditions in those registers and I have no idea what
  11  * they are. Granted it doesn't affect since we're not enabling any interrupts
  12  * on those levels at the moment, but it would be nice to know. I have a feeling
  13  * they aren't actually interrupt lines but data lines (to the DSP?)
  14  */
  15
  16 #include <linux/types.h>
  17 #include <linux/kernel.h>
  18 #include <linux/mm.h>
  19 #include <linux/delay.h>
  20 #include <linux/init.h>
  21 #include <linux/irq.h>
  22
  23 #include <asm/traps.h>
  24 #include <asm/macintosh.h>
  25 #include <asm/macints.h>
  26 #include <asm/mac_psc.h>
  27
  28 #define DEBUG_PSC
  29
  30 int psc_present;
  31 volatile __u8 *psc;
  32
  33 /*
  34  * Debugging dump, used in various places to see what's going on.
  35  */
  36
  37 static void psc_debug_dump(void)
  38 {
  39         int     i;
  40
  41         if (!psc_present) return;
  42         for (i = 0x30 ; i < 0x70 ; i += 0x10) {
  43                 printk("PSC #%d:  IFR = 0x%02X IER = 0x%02X\n",
  44                         i >> 4,
  45                         (int) psc_read_byte(pIFRbase + i),
  46                         (int) psc_read_byte(pIERbase + i));
  47         }
  48 }
  49
  50 /*
  51  * Try to kill all DMA channels on the PSC. Not sure how this his
  52  * supposed to work; this is code lifted from macmace.c and then
  53  * expanded to cover what I think are the other 7 channels.
  54  */
  55
  56 static __init void psc_dma_die_die_die(void)
  57 {
  58         int i;
  59
  60         printk("Killing all PSC DMA channels...");
  61         for (i = 0 ; i < 9 ; i++) {
  62                 psc_write_word(PSC_CTL_BASE + (i << 4), 0x8800);
  63                 psc_write_word(PSC_CTL_BASE + (i << 4), 0x1000);
  64                 psc_write_word(PSC_CMD_BASE + (i << 5), 0x1100);
  65                 psc_write_word(PSC_CMD_BASE + (i << 5) + 0x10, 0x1100);
  66         }
  67         printk("done!\n");
  68 }
  69
  70 /*
  71  * Initialize the PSC. For now this just involves shutting down all
  72  * interrupt sources using the IERs.
  73  */
  74
  75 void __init psc_init(void)
  76 {
  77         int i;
  78
  79         if (macintosh_config->ident != MAC_MODEL_C660
  80          && macintosh_config->ident != MAC_MODEL_Q840)
  81         {
  82                 psc = NULL;
  83                 psc_present = 0;
  84                 return;
  85         }
  86
  87         /*
  88          * The PSC is always at the same spot, but using psc
  89          * keeps things consistent with the psc_xxxx functions.
  90          */
  91
  92         psc = (void *) PSC_BASE;
  93         psc_present = 1;
  94
  95         printk("PSC detected at %p\n", psc);
  96
  97         psc_dma_die_die_die();
  98
  99 #ifdef DEBUG_PSC
 100         psc_debug_dump();
 101 #endif
 102         /*
 103          * Mask and clear all possible interrupts
 104          */
 105
 106         for (i = 0x30 ; i < 0x70 ; i += 0x10) {
 107                 psc_write_byte(pIERbase + i, 0x0F);
 108                 psc_write_byte(pIFRbase + i, 0x0F);
 109         }
 110 }
 111
 112 /*
 113  * PSC interrupt handler. It's a lot like the VIA interrupt handler.
 114  */
 115
 116 static void psc_irq(unsigned int irq, struct irq_desc *desc)
 117 {
 118         unsigned int offset = (unsigned int)irq_desc_get_handler_data(desc);
 119         int pIFR        = pIFRbase + offset;
 120         int pIER        = pIERbase + offset;
 121         int irq_num;
 122         unsigned char irq_bit, events;
 123
 124 #ifdef DEBUG_IRQS
 125         printk("psc_irq: irq %u pIFR = 0x%02X pIER = 0x%02X\n",
 126                 irq, (int) psc_read_byte(pIFR), (int) psc_read_byte(pIER));
 127 #endif
 128
 129         events = psc_read_byte(pIFR) & psc_read_byte(pIER) & 0xF;
 130         if (!events)
 131                 return;
 132
 133         irq_num = irq << 3;
 134         irq_bit = 1;
 135         do {
 136                 if (events & irq_bit) {
 137                         psc_write_byte(pIFR, irq_bit);
 138                         generic_handle_irq(irq_num);
 139                 }
 140                 irq_num++;
 141                 irq_bit <<= 1;
 142         } while (events >= irq_bit);
 143 }
 144
 145 /*
 146  * Register the PSC interrupt dispatchers for autovector interrupts 3-6.
 147  */
 148
 149 void __init psc_register_interrupts(void)
 150 {
 151         irq_set_chained_handler_and_data(IRQ_AUTO_3, psc_irq, (void *)0x30);
 152         irq_set_chained_handler_and_data(IRQ_AUTO_4, psc_irq, (void *)0x40);
 153         irq_set_chained_handler_and_data(IRQ_AUTO_5, psc_irq, (void *)0x50);
 154         irq_set_chained_handler_and_data(IRQ_AUTO_6, psc_irq, (void *)0x60);
 155 }
 156
 157 void psc_irq_enable(int irq) {
 158         int irq_src     = IRQ_SRC(irq);
 159         int irq_idx     = IRQ_IDX(irq);
 160         int pIER        = pIERbase + (irq_src << 4);
 161
 162 #ifdef DEBUG_IRQUSE
 163         printk("psc_irq_enable(%d)\n", irq);
 164 #endif
 165         psc_write_byte(pIER, (1 << irq_idx) | 0x80);
 166 }
 167
 168 void psc_irq_disable(int irq) {
 169         int irq_src     = IRQ_SRC(irq);
 170         int irq_idx     = IRQ_IDX(irq);
 171         int pIER        = pIERbase + (irq_src << 4);
 172
 173 #ifdef DEBUG_IRQUSE
 174         printk("psc_irq_disable(%d)\n", irq);
 175 #endif
 176         psc_write_byte(pIER, 1 << irq_idx);
 177 }