arch/m68k/platform/5249/config.c

   1 /***************************************************************************/
   2
   3 /*
   4  *      linux/arch/m68knommu/platform/5249/config.c
   5  *
   6  *      Copyright (C) 2002, Greg Ungerer (gerg@snapgear.com)
   7  */
   8
   9 /***************************************************************************/
  10
  11 #include <linux/kernel.h>
  12 #include <linux/param.h>
  13 #include <linux/init.h>
  14 #include <linux/io.h>
  15 #include <linux/platform_device.h>
  16 #include <asm/machdep.h>
  17 #include <asm/coldfire.h>
  18 #include <asm/mcfsim.h>
  19
  20 /***************************************************************************/
  21
  22 #ifdef CONFIG_M5249C3
  23
  24 static struct resource m5249_smc91x_resources[] = {
  25         {
  26                 .start          = 0xe0000300,
  27                 .end            = 0xe0000300 + 0x100,
  28                 .flags          = IORESOURCE_MEM,
  29         },
  30         {
  31                 .start          = MCFINTC2_GPIOIRQ6,
  32                 .end            = MCFINTC2_GPIOIRQ6,
  33                 .flags          = IORESOURCE_IRQ,
  34         },
  35 };
  36
  37 static struct platform_device m5249_smc91x = {
  38         .name                   = "smc91x",
  39         .id                     = 0,
  40         .num_resources          = ARRAY_SIZE(m5249_smc91x_resources),
  41         .resource               = m5249_smc91x_resources,
  42 };
  43
  44 #endif /* CONFIG_M5249C3 */
  45
  46 static struct platform_device *m5249_devices[] __initdata = {
  47 #ifdef CONFIG_M5249C3
  48         &m5249_smc91x,
  49 #endif
  50 };
  51
  52 /***************************************************************************/
  53
  54 #ifdef CONFIG_SPI_COLDFIRE_QSPI
  55
  56 static void __init m5249_qspi_init(void)
  57 {
  58         /* QSPI irq setup */
  59         writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL4 | MCFSIM_ICR_PRI0,
  60                MCF_MBAR + MCFSIM_QSPIICR);
  61         mcf_mapirq2imr(MCF_IRQ_QSPI, MCFINTC_QSPI);
  62 }
  63
  64 #endif /* CONFIG_SPI_COLDFIRE_QSPI */
  65
  66 /***************************************************************************/
  67
  68 #ifdef CONFIG_M5249C3
  69
  70 static void __init m5249_smc91x_init(void)
  71 {
  72         u32  gpio;
  73
  74         /* Set the GPIO line as interrupt source for smc91x device */
  75         gpio = readl(MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
  76         writel(gpio | 0x40, MCF_MBAR2 + MCFSIM2_GPIOINTENABLE);
  77
  78         gpio = readl(MCF_MBAR2 + MCFSIM2_INTLEVEL5);
  79         writel(gpio | 0x04000000, MCF_MBAR2 + MCFSIM2_INTLEVEL5);
  80 }
  81
  82 #endif /* CONFIG_M5249C3 */
  83
  84 /***************************************************************************/
  85
  86 void __init config_BSP(char *commandp, int size)
  87 {
  88         mach_sched_init = hw_timer_init;
  89
  90 #ifdef CONFIG_M5249C3
  91         m5249_smc91x_init();
  92 #endif
  93 #ifdef CONFIG_SPI_COLDFIRE_QSPI
  94         m5249_qspi_init();
  95 #endif
  96 }
  97
  98 /***************************************************************************/
  99
 100 static int __init init_BSP(void)
 101 {
 102         platform_add_devices(m5249_devices, ARRAY_SIZE(m5249_devices));
 103         return 0;
 104 }
 105
 106 arch_initcall(init_BSP);
 107
 108 /***************************************************************************/