arch/m68knommu/platform/5206/config.c

   1 /***************************************************************************/
   2
   3 /*
   4  *      linux/arch/m68knommu/platform/5206/config.c
   5  *
   6  *      Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
   7  *      Copyright (C) 2000-2001, Lineo Inc. (www.lineo.com)
   8  */
   9
  10 /***************************************************************************/
  11
  12 #include <linux/kernel.h>
  13 #include <linux/param.h>
  14 #include <linux/init.h>
  15 #include <linux/io.h>
  16 #include <asm/machdep.h>
  17 #include <asm/coldfire.h>
  18 #include <asm/mcfsim.h>
  19 #include <asm/mcfuart.h>
  20
  21 /***************************************************************************/
  22
  23 static struct mcf_platform_uart m5206_uart_platform[] = {
  24         {
  25                 .mapbase        = MCF_MBAR + MCFUART_BASE1,
  26                 .irq            = 73,
  27         },
  28         {
  29                 .mapbase        = MCF_MBAR + MCFUART_BASE2,
  30                 .irq            = 74,
  31         },
  32         { },
  33 };
  34
  35 static struct platform_device m5206_uart = {
  36         .name                   = "mcfuart",
  37         .id                     = 0,
  38         .dev.platform_data      = m5206_uart_platform,
  39 };
  40
  41 static struct platform_device *m5206_devices[] __initdata = {
  42         &m5206_uart,
  43 };
  44
  45 /***************************************************************************/
  46
  47 static void __init m5206_uart_init_line(int line, int irq)
  48 {
  49         if (line == 0) {
  50                 writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
  51                 writeb(irq, MCFUART_BASE1 + MCFUART_UIVR);
  52                 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1);
  53         } else if (line == 1) {
  54                 writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
  55                 writeb(irq, MCFUART_BASE2 + MCFUART_UIVR);
  56                 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2);
  57         }
  58 }
  59
  60 static void __init m5206_uarts_init(void)
  61 {
  62         const int nrlines = ARRAY_SIZE(m5206_uart_platform);
  63         int line;
  64
  65         for (line = 0; (line < nrlines); line++)
  66                 m5206_uart_init_line(line, m5206_uart_platform[line].irq);
  67 }
  68
  69 /***************************************************************************/
  70
  71 void mcf_autovector(unsigned int vec)
  72 {
  73         volatile unsigned char  *mbar;
  74         unsigned char           icr;
  75
  76         if ((vec >= 25) && (vec <= 31)) {
  77                 vec -= 25;
  78                 mbar = (volatile unsigned char *) MCF_MBAR;
  79                 icr = MCFSIM_ICR_AUTOVEC | (vec << 3);
  80                 *(mbar + MCFSIM_ICR1 + vec) = icr;
  81                 vec = 0x1 << (vec + 1);
  82                 mcf_setimr(mcf_getimr() & ~vec);
  83         }
  84 }
  85
  86 /***************************************************************************/
  87
  88 void mcf_settimericr(unsigned int timer, unsigned int level)
  89 {
  90         volatile unsigned char *icrp;
  91         unsigned int icr, imr;
  92
  93         if (timer <= 2) {
  94                 switch (timer) {
  95                 case 2:  icr = MCFSIM_TIMER2ICR; imr = MCFSIM_IMR_TIMER2; break;
  96                 default: icr = MCFSIM_TIMER1ICR; imr = MCFSIM_IMR_TIMER1; break;
  97                 }
  98
  99                 icrp = (volatile unsigned char *) (MCF_MBAR + icr);
 100                 *icrp = MCFSIM_ICR_AUTOVEC | (level << 2) | MCFSIM_ICR_PRI3;
 101                 mcf_setimr(mcf_getimr() & ~imr);
 102         }
 103 }
 104
 105 /***************************************************************************/
 106
 107 void m5206_cpu_reset(void)
 108 {
 109         local_irq_disable();
 110         /* Set watchdog to soft reset, and enabled */
 111         __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
 112         for (;;)
 113                 /* wait for watchdog to timeout */;
 114 }
 115
 116 /***************************************************************************/
 117
 118 void __init config_BSP(char *commandp, int size)
 119 {
 120         mcf_setimr(MCFSIM_IMR_MASKALL);
 121         mach_reset = m5206_cpu_reset;
 122 }
 123
 124 /***************************************************************************/
 125
 126 static int __init init_BSP(void)
 127 {
 128         m5206_uarts_init();
 129         platform_add_devices(m5206_devices, ARRAY_SIZE(m5206_devices));
 130         return 0;
 131 }
 132
 133 arch_initcall(init_BSP);
 134
 135 /***************************************************************************/