arch/m68knommu/platform/528x/config.c

   1 /***************************************************************************/
   2
   3 /*
   4  *      linux/arch/m68knommu/platform/528x/config.c
   5  *
   6  *      Sub-architcture dependant initialization code for the Motorola
   7  *      5280 and 5282 CPUs.
   8  *
   9  *      Copyright (C) 1999-2003, Greg Ungerer (gerg@snapgear.com)
  10  *      Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
  11  */
  12
  13 /***************************************************************************/
  14
  15 #include <linux/kernel.h>
  16 #include <linux/param.h>
  17 #include <linux/init.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/spi/spi.h>
  21 #include <linux/spi/flash.h>
  22 #include <linux/io.h>
  23 #include <asm/machdep.h>
  24 #include <asm/coldfire.h>
  25 #include <asm/mcfsim.h>
  26 #include <asm/mcfuart.h>
  27
  28 #ifdef CONFIG_MTD_PARTITIONS
  29 #include <linux/mtd/partitions.h>
  30 #endif
  31
  32 /***************************************************************************/
  33
  34 static struct mcf_platform_uart m528x_uart_platform[] = {
  35         {
  36                 .mapbase        = MCF_MBAR + MCFUART_BASE1,
  37                 .irq            = MCFINT_VECBASE + MCFINT_UART0,
  38         },
  39         {
  40                 .mapbase        = MCF_MBAR + MCFUART_BASE2,
  41                 .irq            = MCFINT_VECBASE + MCFINT_UART0 + 1,
  42         },
  43         {
  44                 .mapbase        = MCF_MBAR + MCFUART_BASE3,
  45                 .irq            = MCFINT_VECBASE + MCFINT_UART0 + 2,
  46         },
  47         { },
  48 };
  49
  50 static struct platform_device m528x_uart = {
  51         .name                   = "mcfuart",
  52         .id                     = 0,
  53         .dev.platform_data      = m528x_uart_platform,
  54 };
  55
  56 static struct resource m528x_fec_resources[] = {
  57         {
  58                 .start          = MCF_MBAR + 0x1000,
  59                 .end            = MCF_MBAR + 0x1000 + 0x7ff,
  60                 .flags          = IORESOURCE_MEM,
  61         },
  62         {
  63                 .start          = 64 + 23,
  64                 .end            = 64 + 23,
  65                 .flags          = IORESOURCE_IRQ,
  66         },
  67         {
  68                 .start          = 64 + 27,
  69                 .end            = 64 + 27,
  70                 .flags          = IORESOURCE_IRQ,
  71         },
  72         {
  73                 .start          = 64 + 29,
  74                 .end            = 64 + 29,
  75                 .flags          = IORESOURCE_IRQ,
  76         },
  77 };
  78
  79 static struct platform_device m528x_fec = {
  80         .name                   = "fec",
  81         .id                     = 0,
  82         .num_resources          = ARRAY_SIZE(m528x_fec_resources),
  83         .resource               = m528x_fec_resources,
  84 };
  85
  86
  87 static struct platform_device *m528x_devices[] __initdata = {
  88         &m528x_uart,
  89         &m528x_fec,
  90 };
  91
  92 /***************************************************************************/
  93
  94 #define INTC0   (MCF_MBAR + MCFICM_INTC0)
  95
  96 static void __init m528x_uart_init_line(int line, int irq)
  97 {
  98         u8 port;
  99         u32 imr;
 100
 101         if ((line < 0) || (line > 2))
 102                 return;
 103
 104         /* level 6, line based priority */
 105         writeb(0x30+line, INTC0 + MCFINTC_ICR0 + MCFINT_UART0 + line);
 106
 107         imr = readl(INTC0 + MCFINTC_IMRL);
 108         imr &= ~((1 << (irq - MCFINT_VECBASE)) | 1);
 109         writel(imr, INTC0 + MCFINTC_IMRL);
 110
 111         /* make sure PUAPAR is set for UART0 and UART1 */
 112         if (line < 2) {
 113                 port = readb(MCF_MBAR + MCF5282_GPIO_PUAPAR);
 114                 port |= (0x03 << (line * 2));
 115                 writeb(port, MCF_MBAR + MCF5282_GPIO_PUAPAR);
 116         }
 117 }
 118
 119 static void __init m528x_uarts_init(void)
 120 {
 121         const int nrlines = ARRAY_SIZE(m528x_uart_platform);
 122         int line;
 123
 124         for (line = 0; (line < nrlines); line++)
 125                 m528x_uart_init_line(line, m528x_uart_platform[line].irq);
 126 }
 127
 128 /***************************************************************************/
 129
 130 static void __init m528x_fec_init(void)
 131 {
 132         u32 imr;
 133         u16 v16;
 134
 135         /* Unmask FEC interrupts at ColdFire interrupt controller */
 136         writeb(0x28, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 23);
 137         writeb(0x27, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 27);
 138         writeb(0x26, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 29);
 139
 140         imr = readl(MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH);
 141         imr &= ~0xf;
 142         writel(imr, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH);
 143         imr = readl(MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL);
 144         imr &= ~0xff800001;
 145         writel(imr, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL);
 146
 147         /* Set multi-function pins to ethernet mode for fec0 */
 148         v16 = readw(MCF_IPSBAR + 0x100056);
 149         writew(v16 | 0xf00, MCF_IPSBAR + 0x100056);
 150         writeb(0xc0, MCF_IPSBAR + 0x100058);
 151 }
 152
 153 /***************************************************************************/
 154
 155 void mcf_disableall(void)
 156 {
 157         *((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH)) = 0xffffffff;
 158         *((volatile unsigned long *) (MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRL)) = 0xffffffff;
 159 }
 160
 161 /***************************************************************************/
 162
 163 void mcf_autovector(unsigned int vec)
 164 {
 165         /* Everything is auto-vectored on the 5272 */
 166 }
 167
 168 /***************************************************************************/
 169
 170 static void m528x_cpu_reset(void)
 171 {
 172         local_irq_disable();
 173         __raw_writeb(MCF_RCR_SWRESET, MCF_IPSBAR + MCF_RCR);
 174 }
 175
 176 /***************************************************************************/
 177
 178 #ifdef CONFIG_WILDFIRE
 179 void wildfire_halt(void)
 180 {
 181         writeb(0, 0x30000007);
 182         writeb(0x2, 0x30000007);
 183 }
 184 #endif
 185
 186 #ifdef CONFIG_WILDFIREMOD
 187 void wildfiremod_halt(void)
 188 {
 189         printk(KERN_INFO "WildFireMod hibernating...\n");
 190
 191         /* Set portE.5 to Digital IO */
 192         MCF5282_GPIO_PEPAR &= ~(1 << (5 * 2));
 193
 194         /* Make portE.5 an output */
 195         MCF5282_GPIO_DDRE |= (1 << 5);
 196
 197         /* Now toggle portE.5 from low to high */
 198         MCF5282_GPIO_PORTE &= ~(1 << 5);
 199         MCF5282_GPIO_PORTE |= (1 << 5);
 200
 201         printk(KERN_EMERG "Failed to hibernate. Halting!\n");
 202 }
 203 #endif
 204
 205 void __init config_BSP(char *commandp, int size)
 206 {
 207         mcf_disableall();
 208
 209 #ifdef CONFIG_WILDFIRE
 210         mach_halt = wildfire_halt;
 211 #endif
 212 #ifdef CONFIG_WILDFIREMOD
 213         mach_halt = wildfiremod_halt;
 214 #endif
 215 }
 216
 217 /***************************************************************************/
 218
 219 static int __init init_BSP(void)
 220 {
 221         mach_reset = m528x_cpu_reset;
 222         m528x_uarts_init();
 223         m528x_fec_init();
 224         platform_add_devices(m528x_devices, ARRAY_SIZE(m528x_devices));
 225         return 0;
 226 }
 227
 228 arch_initcall(init_BSP);
 229
 230 /***************************************************************************/