arch/m68knommu/platform/5307/config.c

   1 /***************************************************************************/
   2
   3 /*
   4  *      linux/arch/m68knommu/platform/5307/config.c
   5  *
   6  *      Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
   7  *      Copyright (C) 2000, Lineo (www.lineo.com)
   8  */
   9
  10 /***************************************************************************/
  11
  12 #include <linux/kernel.h>
  13 #include <linux/param.h>
  14 #include <linux/init.h>
  15 #include <linux/io.h>
  16 #include <asm/machdep.h>
  17 #include <asm/coldfire.h>
  18 #include <asm/mcfsim.h>
  19 #include <asm/mcfuart.h>
  20 #include <asm/mcfwdebug.h>
  21
  22 /***************************************************************************/
  23
  24 extern unsigned int mcf_timervector;
  25 extern unsigned int mcf_profilevector;
  26 extern unsigned int mcf_timerlevel;
  27
  28 /***************************************************************************/
  29
  30 /*
  31  *      Some platforms need software versions of the GPIO data registers.
  32  */
  33 unsigned short ppdata;
  34 unsigned char ledbank = 0xff;
  35
  36 /***************************************************************************/
  37
  38 static struct mcf_platform_uart m5307_uart_platform[] = {
  39         {
  40                 .mapbase        = MCF_MBAR + MCFUART_BASE1,
  41                 .irq            = 73,
  42         },
  43         {
  44                 .mapbase        = MCF_MBAR + MCFUART_BASE2,
  45                 .irq            = 74,
  46         },
  47         { },
  48 };
  49
  50 static struct platform_device m5307_uart = {
  51         .name                   = "mcfuart",
  52         .id                     = 0,
  53         .dev.platform_data      = m5307_uart_platform,
  54 };
  55
  56 static struct platform_device *m5307_devices[] __initdata = {
  57         &m5307_uart,
  58 };
  59
  60 /***************************************************************************/
  61
  62 static void __init m5307_uart_init_line(int line, int irq)
  63 {
  64         if (line == 0) {
  65                 writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
  66                 writeb(irq, MCF_MBAR + MCFUART_BASE1 + MCFUART_UIVR);
  67                 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1);
  68         } else if (line == 1) {
  69                 writeb(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
  70                 writeb(irq, MCF_MBAR + MCFUART_BASE2 + MCFUART_UIVR);
  71                 mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2);
  72         }
  73 }
  74
  75 static void __init m5307_uarts_init(void)
  76 {
  77         const int nrlines = ARRAY_SIZE(m5307_uart_platform);
  78         int line;
  79
  80         for (line = 0; (line < nrlines); line++)
  81                 m5307_uart_init_line(line, m5307_uart_platform[line].irq);
  82 }
  83
  84 /***************************************************************************/
  85
  86 void mcf_autovector(unsigned int vec)
  87 {
  88         volatile unsigned char  *mbar;
  89
  90         if ((vec >= 25) && (vec <= 31)) {
  91                 mbar = (volatile unsigned char *) MCF_MBAR;
  92                 vec = 0x1 << (vec - 24);
  93                 *(mbar + MCFSIM_AVR) |= vec;
  94                 mcf_setimr(mcf_getimr() & ~vec);
  95         }
  96 }
  97
  98 /***************************************************************************/
  99
 100 void mcf_settimericr(unsigned int timer, unsigned int level)
 101 {
 102         volatile unsigned char *icrp;
 103         unsigned int icr, imr;
 104
 105         if (timer <= 2) {
 106                 switch (timer) {
 107                 case 2:  icr = MCFSIM_TIMER2ICR; imr = MCFSIM_IMR_TIMER2; break;
 108                 default: icr = MCFSIM_TIMER1ICR; imr = MCFSIM_IMR_TIMER1; break;
 109                 }
 110
 111                 icrp = (volatile unsigned char *) (MCF_MBAR + icr);
 112                 *icrp = MCFSIM_ICR_AUTOVEC | (level << 2) | MCFSIM_ICR_PRI3;
 113                 mcf_setimr(mcf_getimr() & ~imr);
 114         }
 115 }
 116
 117 /***************************************************************************/
 118
 119 void m5307_cpu_reset(void)
 120 {
 121         local_irq_disable();
 122         /* Set watchdog to soft reset, and enabled */
 123         __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
 124         for (;;)
 125                 /* wait for watchdog to timeout */;
 126 }
 127
 128 /***************************************************************************/
 129
 130 void __init config_BSP(char *commandp, int size)
 131 {
 132         mcf_setimr(MCFSIM_IMR_MASKALL);
 133
 134 #if defined(CONFIG_NETtel) || \
 135     defined(CONFIG_SECUREEDGEMP3) || defined(CONFIG_CLEOPATRA)
 136         /* Copy command line from FLASH to local buffer... */
 137         memcpy(commandp, (char *) 0xf0004000, size);
 138         commandp[size-1] = 0;
 139         /* Different timer setup - to prevent device clash */
 140         mcf_timervector = 30;
 141         mcf_profilevector = 31;
 142         mcf_timerlevel = 6;
 143 #endif
 144
 145         mach_reset = m5307_cpu_reset;
 146
 147 #ifdef CONFIG_BDM_DISABLE
 148         /*
 149          * Disable the BDM clocking.  This also turns off most of the rest of
 150          * the BDM device.  This is good for EMC reasons. This option is not
 151          * incompatible with the memory protection option.
 152          */
 153         wdebug(MCFDEBUG_CSR, MCFDEBUG_CSR_PSTCLK);
 154 #endif
 155 }
 156
 157 /***************************************************************************/
 158
 159 static int __init init_BSP(void)
 160 {
 161         m5307_uarts_init();
 162         platform_add_devices(m5307_devices, ARRAY_SIZE(m5307_devices));
 163         return 0;
 164 }
 165
 166 arch_initcall(init_BSP);
 167
 168 /***************************************************************************/