arch/m68knommu/platform/68360/ints.c

   1 /*
   2  * linux/arch/$(ARCH)/platform/$(PLATFORM)/ints.c
   3  *
   4  * This file is subject to the terms and conditions of the GNU General Public
   5  * License.  See the file COPYING in the main directory of this archive
   6  * for more details.
   7  *
   8  * Copyright (c) 2000  Michael Leslie <mleslie@lineo.com>
   9  * Copyright (c) 1996 Roman Zippel
  10  * Copyright (c) 1999 D. Jeff Dionne <jeff@uclinux.org>
  11  */
  12
  13 #include <linux/types.h>
  14 #include <linux/kernel.h>
  15 #include <linux/init.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/irq.h>
  18 #include <asm/traps.h>
  19 #include <asm/machdep.h>
  20 #include <asm/m68360.h>
  21
  22 /* from quicc/commproc.c: */
  23 extern QUICC *pquicc;
  24 extern void cpm_interrupt_init(void);
  25
  26 #define INTERNAL_IRQS (96)
  27
  28 /* assembler routines */
  29 asmlinkage void system_call(void);
  30 asmlinkage void buserr(void);
  31 asmlinkage void trap(void);
  32 asmlinkage void bad_interrupt(void);
  33 asmlinkage void inthandler(void);
  34
  35 extern void *_ramvec[];
  36
  37 /* The number of spurious interrupts */
  38 volatile unsigned int num_spurious;
  39
  40 static void intc_irq_unmask(unsigned int irq)
  41 {
  42         pquicc->intr_cimr |= (1 << irq);
  43 }
  44
  45 static void intc_irq_mask(unsigned int irq)
  46 {
  47         pquicc->intr_cimr &= ~(1 << irq);
  48 }
  49
  50 static void intc_irq_ack(unsigned int irq)
  51 {
  52         pquicc->intr_cisr = (1 << irq);
  53 }
  54
  55 static struct irq_chip intc_irq_chip = {
  56         .name           = "M68K-INTC",
  57         .mask           = intc_irq_mask,
  58         .unmask         = intc_irq_unmask,
  59         .ack            = intc_irq_ack,
  60 };
  61
  62 /*
  63  * This function should be called during kernel startup to initialize
  64  * the vector table.
  65  */
  66 void init_IRQ(void)
  67 {
  68         int i;
  69         int vba = (CPM_VECTOR_BASE<<4);
  70
  71         /* set up the vectors */
  72         _ramvec[2] = buserr;
  73         _ramvec[3] = trap;
  74         _ramvec[4] = trap;
  75         _ramvec[5] = trap;
  76         _ramvec[6] = trap;
  77         _ramvec[7] = trap;
  78         _ramvec[8] = trap;
  79         _ramvec[9] = trap;
  80         _ramvec[10] = trap;
  81         _ramvec[11] = trap;
  82         _ramvec[12] = trap;
  83         _ramvec[13] = trap;
  84         _ramvec[14] = trap;
  85         _ramvec[15] = trap;
  86
  87         _ramvec[32] = system_call;
  88         _ramvec[33] = trap;
  89
  90         cpm_interrupt_init();
  91
  92         /* set up CICR for vector base address and irq level */
  93         /* irl = 4, hp = 1f - see MC68360UM p 7-377 */
  94         pquicc->intr_cicr = 0x00e49f00 | vba;
  95
  96         /* CPM interrupt vectors: (p 7-376) */
  97         _ramvec[vba+CPMVEC_ERROR]       = bad_interrupt; /* Error */
  98         _ramvec[vba+CPMVEC_PIO_PC11]    = inthandler;   /* pio - pc11 */
  99         _ramvec[vba+CPMVEC_PIO_PC10]    = inthandler;   /* pio - pc10 */
 100         _ramvec[vba+CPMVEC_SMC2]        = inthandler;   /* smc2/pip */
 101         _ramvec[vba+CPMVEC_SMC1]        = inthandler;   /* smc1 */
 102         _ramvec[vba+CPMVEC_SPI]         = inthandler;   /* spi */
 103         _ramvec[vba+CPMVEC_PIO_PC9]     = inthandler;   /* pio - pc9 */
 104         _ramvec[vba+CPMVEC_TIMER4]      = inthandler;   /* timer 4 */
 105         _ramvec[vba+CPMVEC_RESERVED1]   = inthandler;   /* reserved */
 106         _ramvec[vba+CPMVEC_PIO_PC8]     = inthandler;   /* pio - pc8 */
 107         _ramvec[vba+CPMVEC_PIO_PC7]     = inthandler;  /* pio - pc7 */
 108         _ramvec[vba+CPMVEC_PIO_PC6]     = inthandler;  /* pio - pc6 */
 109         _ramvec[vba+CPMVEC_TIMER3]      = inthandler;  /* timer 3 */
 110         _ramvec[vba+CPMVEC_PIO_PC5]     = inthandler;  /* pio - pc5 */
 111         _ramvec[vba+CPMVEC_PIO_PC4]     = inthandler;  /* pio - pc4 */
 112         _ramvec[vba+CPMVEC_RESERVED2]   = inthandler;  /* reserved */
 113         _ramvec[vba+CPMVEC_RISCTIMER]   = inthandler;  /* timer table */
 114         _ramvec[vba+CPMVEC_TIMER2]      = inthandler;  /* timer 2 */
 115         _ramvec[vba+CPMVEC_RESERVED3]   = inthandler;  /* reserved */
 116         _ramvec[vba+CPMVEC_IDMA2]       = inthandler;  /* idma 2 */
 117         _ramvec[vba+CPMVEC_IDMA1]       = inthandler;  /* idma 1 */
 118         _ramvec[vba+CPMVEC_SDMA_CB_ERR] = inthandler;  /* sdma channel bus error */
 119         _ramvec[vba+CPMVEC_PIO_PC3]     = inthandler;  /* pio - pc3 */
 120         _ramvec[vba+CPMVEC_PIO_PC2]     = inthandler;  /* pio - pc2 */
 121         /* _ramvec[vba+CPMVEC_TIMER1]      = cpm_isr_timer1; */  /* timer 1 */
 122         _ramvec[vba+CPMVEC_TIMER1]      = inthandler;  /* timer 1 */
 123         _ramvec[vba+CPMVEC_PIO_PC1]     = inthandler;  /* pio - pc1 */
 124         _ramvec[vba+CPMVEC_SCC4]        = inthandler;  /* scc 4 */
 125         _ramvec[vba+CPMVEC_SCC3]        = inthandler;  /* scc 3 */
 126         _ramvec[vba+CPMVEC_SCC2]        = inthandler;  /* scc 2 */
 127         _ramvec[vba+CPMVEC_SCC1]        = inthandler;  /* scc 1 */
 128         _ramvec[vba+CPMVEC_PIO_PC0]     = inthandler;  /* pio - pc0 */
 129
 130
 131         /* turn off all CPM interrupts */
 132         pquicc->intr_cimr = 0x00000000;
 133
 134         for (i = 0; (i < NR_IRQS); i++) {
 135                 set_irq_chip(i, &intc_irq_chip);
 136                 set_irq_handler(i, handle_level_irq);
 137         }
 138 }
 139