Merge tag 'for-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux...
[deliverable/linux.git] / arch / metag / include / asm / pgtable-bits.h
1 /*
2 * Meta page table definitions.
3 */
4
5 #ifndef _METAG_PGTABLE_BITS_H
6 #define _METAG_PGTABLE_BITS_H
7
8 #include <asm/metag_mem.h>
9
10 /*
11 * Definitions for MMU descriptors
12 *
13 * These are the hardware bits in the MMCU pte entries.
14 * Derived from the Meta toolkit headers.
15 */
16 #define _PAGE_PRESENT MMCU_ENTRY_VAL_BIT
17 #define _PAGE_WRITE MMCU_ENTRY_WR_BIT
18 #define _PAGE_PRIV MMCU_ENTRY_PRIV_BIT
19 /* Write combine bit - this can cause writes to occur out of order */
20 #define _PAGE_WR_COMBINE MMCU_ENTRY_WRC_BIT
21 /* Sys coherent bit - this bit is never used by Linux */
22 #define _PAGE_SYS_COHERENT MMCU_ENTRY_SYS_BIT
23 #define _PAGE_ALWAYS_ZERO_1 0x020
24 #define _PAGE_CACHE_CTRL0 0x040
25 #define _PAGE_CACHE_CTRL1 0x080
26 #define _PAGE_ALWAYS_ZERO_2 0x100
27 #define _PAGE_ALWAYS_ZERO_3 0x200
28 #define _PAGE_ALWAYS_ZERO_4 0x400
29 #define _PAGE_ALWAYS_ZERO_5 0x800
30
31 /* These are software bits that we stuff into the gaps in the hardware
32 * pte entries that are not used. Note, these DO get stored in the actual
33 * hardware, but the hardware just does not use them.
34 */
35 #define _PAGE_ACCESSED _PAGE_ALWAYS_ZERO_1
36 #define _PAGE_DIRTY _PAGE_ALWAYS_ZERO_2
37
38 /* Pages owned, and protected by, the kernel. */
39 #define _PAGE_KERNEL _PAGE_PRIV
40
41 /* No cacheing of this page */
42 #define _PAGE_CACHE_WIN0 (MMCU_CWIN_UNCACHED << MMCU_ENTRY_CWIN_S)
43 /* burst cacheing - good for data streaming */
44 #define _PAGE_CACHE_WIN1 (MMCU_CWIN_BURST << MMCU_ENTRY_CWIN_S)
45 /* One cache way per thread */
46 #define _PAGE_CACHE_WIN2 (MMCU_CWIN_C1SET << MMCU_ENTRY_CWIN_S)
47 /* Full on cacheing */
48 #define _PAGE_CACHE_WIN3 (MMCU_CWIN_CACHED << MMCU_ENTRY_CWIN_S)
49
50 #define _PAGE_CACHEABLE (_PAGE_CACHE_WIN3 | _PAGE_WR_COMBINE)
51
52 /* which bits are used for cache control ... */
53 #define _PAGE_CACHE_MASK (_PAGE_CACHE_CTRL0 | _PAGE_CACHE_CTRL1 | \
54 _PAGE_WR_COMBINE)
55
56 /* This is a mask of the bits that pte_modify is allowed to change. */
57 #define _PAGE_CHG_MASK (PAGE_MASK)
58
59 #define _PAGE_SZ_SHIFT 1
60 #define _PAGE_SZ_4K (0x0)
61 #define _PAGE_SZ_8K (0x1 << _PAGE_SZ_SHIFT)
62 #define _PAGE_SZ_16K (0x2 << _PAGE_SZ_SHIFT)
63 #define _PAGE_SZ_32K (0x3 << _PAGE_SZ_SHIFT)
64 #define _PAGE_SZ_64K (0x4 << _PAGE_SZ_SHIFT)
65 #define _PAGE_SZ_128K (0x5 << _PAGE_SZ_SHIFT)
66 #define _PAGE_SZ_256K (0x6 << _PAGE_SZ_SHIFT)
67 #define _PAGE_SZ_512K (0x7 << _PAGE_SZ_SHIFT)
68 #define _PAGE_SZ_1M (0x8 << _PAGE_SZ_SHIFT)
69 #define _PAGE_SZ_2M (0x9 << _PAGE_SZ_SHIFT)
70 #define _PAGE_SZ_4M (0xa << _PAGE_SZ_SHIFT)
71 #define _PAGE_SZ_MASK (0xf << _PAGE_SZ_SHIFT)
72
73 #if defined(CONFIG_PAGE_SIZE_4K)
74 #define _PAGE_SZ (_PAGE_SZ_4K)
75 #elif defined(CONFIG_PAGE_SIZE_8K)
76 #define _PAGE_SZ (_PAGE_SZ_8K)
77 #elif defined(CONFIG_PAGE_SIZE_16K)
78 #define _PAGE_SZ (_PAGE_SZ_16K)
79 #endif
80 #define _PAGE_TABLE (_PAGE_SZ | _PAGE_PRESENT)
81
82 #if defined(CONFIG_HUGETLB_PAGE_SIZE_8K)
83 # define _PAGE_SZHUGE (_PAGE_SZ_8K)
84 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_16K)
85 # define _PAGE_SZHUGE (_PAGE_SZ_16K)
86 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_32K)
87 # define _PAGE_SZHUGE (_PAGE_SZ_32K)
88 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
89 # define _PAGE_SZHUGE (_PAGE_SZ_64K)
90 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_128K)
91 # define _PAGE_SZHUGE (_PAGE_SZ_128K)
92 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_256K)
93 # define _PAGE_SZHUGE (_PAGE_SZ_256K)
94 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_512K)
95 # define _PAGE_SZHUGE (_PAGE_SZ_512K)
96 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_1M)
97 # define _PAGE_SZHUGE (_PAGE_SZ_1M)
98 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_2M)
99 # define _PAGE_SZHUGE (_PAGE_SZ_2M)
100 #elif defined(CONFIG_HUGETLB_PAGE_SIZE_4M)
101 # define _PAGE_SZHUGE (_PAGE_SZ_4M)
102 #endif
103
104 #endif /* _METAG_PGTABLE_BITS_H */
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