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[deliverable/linux.git] / arch / microblaze / kernel / entry.S
1 /*
2 * Low-level system-call handling, trap handlers and context-switching
3 *
4 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
5 * Copyright (C) 2008-2009 PetaLogix
6 * Copyright (C) 2003 John Williams <jwilliams@itee.uq.edu.au>
7 * Copyright (C) 2001,2002 NEC Corporation
8 * Copyright (C) 2001,2002 Miles Bader <miles@gnu.org>
9 *
10 * This file is subject to the terms and conditions of the GNU General
11 * Public License. See the file COPYING in the main directory of this
12 * archive for more details.
13 *
14 * Written by Miles Bader <miles@gnu.org>
15 * Heavily modified by John Williams for Microblaze
16 */
17
18 #include <linux/sys.h>
19 #include <linux/linkage.h>
20
21 #include <asm/entry.h>
22 #include <asm/current.h>
23 #include <asm/processor.h>
24 #include <asm/exceptions.h>
25 #include <asm/asm-offsets.h>
26 #include <asm/thread_info.h>
27
28 #include <asm/page.h>
29 #include <asm/unistd.h>
30
31 #include <linux/errno.h>
32 #include <asm/signal.h>
33
34 #undef DEBUG
35
36 /* The size of a state save frame. */
37 #define STATE_SAVE_SIZE (PT_SIZE + STATE_SAVE_ARG_SPACE)
38
39 /* The offset of the struct pt_regs in a `state save frame' on the stack. */
40 #define PTO STATE_SAVE_ARG_SPACE /* 24 the space for args */
41
42 #define C_ENTRY(name) .globl name; .align 4; name
43
44 /*
45 * Various ways of setting and clearing BIP in flags reg.
46 * This is mucky, but necessary using microblaze version that
47 * allows msr ops to write to BIP
48 */
49 #if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
50 .macro clear_bip
51 msrclr r11, MSR_BIP
52 nop
53 .endm
54
55 .macro set_bip
56 msrset r11, MSR_BIP
57 nop
58 .endm
59
60 .macro clear_eip
61 msrclr r11, MSR_EIP
62 nop
63 .endm
64
65 .macro set_ee
66 msrset r11, MSR_EE
67 nop
68 .endm
69
70 .macro disable_irq
71 msrclr r11, MSR_IE
72 nop
73 .endm
74
75 .macro enable_irq
76 msrset r11, MSR_IE
77 nop
78 .endm
79
80 .macro set_ums
81 msrset r11, MSR_UMS
82 nop
83 msrclr r11, MSR_VMS
84 nop
85 .endm
86
87 .macro set_vms
88 msrclr r11, MSR_UMS
89 nop
90 msrset r11, MSR_VMS
91 nop
92 .endm
93
94 .macro clear_vms_ums
95 msrclr r11, MSR_VMS | MSR_UMS
96 nop
97 .endm
98 #else
99 .macro clear_bip
100 mfs r11, rmsr
101 nop
102 andi r11, r11, ~MSR_BIP
103 mts rmsr, r11
104 nop
105 .endm
106
107 .macro set_bip
108 mfs r11, rmsr
109 nop
110 ori r11, r11, MSR_BIP
111 mts rmsr, r11
112 nop
113 .endm
114
115 .macro clear_eip
116 mfs r11, rmsr
117 nop
118 andi r11, r11, ~MSR_EIP
119 mts rmsr, r11
120 nop
121 .endm
122
123 .macro set_ee
124 mfs r11, rmsr
125 nop
126 ori r11, r11, MSR_EE
127 mts rmsr, r11
128 nop
129 .endm
130
131 .macro disable_irq
132 mfs r11, rmsr
133 nop
134 andi r11, r11, ~MSR_IE
135 mts rmsr, r11
136 nop
137 .endm
138
139 .macro enable_irq
140 mfs r11, rmsr
141 nop
142 ori r11, r11, MSR_IE
143 mts rmsr, r11
144 nop
145 .endm
146
147 .macro set_ums
148 mfs r11, rmsr
149 nop
150 ori r11, r11, MSR_VMS
151 andni r11, r11, MSR_UMS
152 mts rmsr, r11
153 nop
154 .endm
155
156 .macro set_vms
157 mfs r11, rmsr
158 nop
159 ori r11, r11, MSR_VMS
160 andni r11, r11, MSR_UMS
161 mts rmsr, r11
162 nop
163 .endm
164
165 .macro clear_vms_ums
166 mfs r11, rmsr
167 nop
168 andni r11, r11, (MSR_VMS|MSR_UMS)
169 mts rmsr,r11
170 nop
171 .endm
172 #endif
173
174 /* Define how to call high-level functions. With MMU, virtual mode must be
175 * enabled when calling the high-level function. Clobbers R11.
176 * VM_ON, VM_OFF, DO_JUMP_BIPCLR, DO_CALL
177 */
178
179 /* turn on virtual protected mode save */
180 #define VM_ON \
181 set_ums; \
182 rted r0, 2f; \
183 nop; \
184 2:
185
186 /* turn off virtual protected mode save and user mode save*/
187 #define VM_OFF \
188 clear_vms_ums; \
189 rted r0, TOPHYS(1f); \
190 nop; \
191 1:
192
193 #define SAVE_REGS \
194 swi r2, r1, PTO+PT_R2; /* Save SDA */ \
195 swi r3, r1, PTO+PT_R3; \
196 swi r4, r1, PTO+PT_R4; \
197 swi r5, r1, PTO+PT_R5; \
198 swi r6, r1, PTO+PT_R6; \
199 swi r7, r1, PTO+PT_R7; \
200 swi r8, r1, PTO+PT_R8; \
201 swi r9, r1, PTO+PT_R9; \
202 swi r10, r1, PTO+PT_R10; \
203 swi r11, r1, PTO+PT_R11; /* save clobbered regs after rval */\
204 swi r12, r1, PTO+PT_R12; \
205 swi r13, r1, PTO+PT_R13; /* Save SDA2 */ \
206 swi r14, r1, PTO+PT_PC; /* PC, before IRQ/trap */ \
207 swi r15, r1, PTO+PT_R15; /* Save LP */ \
208 swi r18, r1, PTO+PT_R18; /* Save asm scratch reg */ \
209 swi r19, r1, PTO+PT_R19; \
210 swi r20, r1, PTO+PT_R20; \
211 swi r21, r1, PTO+PT_R21; \
212 swi r22, r1, PTO+PT_R22; \
213 swi r23, r1, PTO+PT_R23; \
214 swi r24, r1, PTO+PT_R24; \
215 swi r25, r1, PTO+PT_R25; \
216 swi r26, r1, PTO+PT_R26; \
217 swi r27, r1, PTO+PT_R27; \
218 swi r28, r1, PTO+PT_R28; \
219 swi r29, r1, PTO+PT_R29; \
220 swi r30, r1, PTO+PT_R30; \
221 swi r31, r1, PTO+PT_R31; /* Save current task reg */ \
222 mfs r11, rmsr; /* save MSR */ \
223 nop; \
224 swi r11, r1, PTO+PT_MSR;
225
226 #define RESTORE_REGS \
227 lwi r11, r1, PTO+PT_MSR; \
228 mts rmsr , r11; \
229 nop; \
230 lwi r2, r1, PTO+PT_R2; /* restore SDA */ \
231 lwi r3, r1, PTO+PT_R3; \
232 lwi r4, r1, PTO+PT_R4; \
233 lwi r5, r1, PTO+PT_R5; \
234 lwi r6, r1, PTO+PT_R6; \
235 lwi r7, r1, PTO+PT_R7; \
236 lwi r8, r1, PTO+PT_R8; \
237 lwi r9, r1, PTO+PT_R9; \
238 lwi r10, r1, PTO+PT_R10; \
239 lwi r11, r1, PTO+PT_R11; /* restore clobbered regs after rval */\
240 lwi r12, r1, PTO+PT_R12; \
241 lwi r13, r1, PTO+PT_R13; /* restore SDA2 */ \
242 lwi r14, r1, PTO+PT_PC; /* RESTORE_LINK PC, before IRQ/trap */\
243 lwi r15, r1, PTO+PT_R15; /* restore LP */ \
244 lwi r18, r1, PTO+PT_R18; /* restore asm scratch reg */ \
245 lwi r19, r1, PTO+PT_R19; \
246 lwi r20, r1, PTO+PT_R20; \
247 lwi r21, r1, PTO+PT_R21; \
248 lwi r22, r1, PTO+PT_R22; \
249 lwi r23, r1, PTO+PT_R23; \
250 lwi r24, r1, PTO+PT_R24; \
251 lwi r25, r1, PTO+PT_R25; \
252 lwi r26, r1, PTO+PT_R26; \
253 lwi r27, r1, PTO+PT_R27; \
254 lwi r28, r1, PTO+PT_R28; \
255 lwi r29, r1, PTO+PT_R29; \
256 lwi r30, r1, PTO+PT_R30; \
257 lwi r31, r1, PTO+PT_R31; /* Restore cur task reg */
258
259 .text
260
261 /*
262 * User trap.
263 *
264 * System calls are handled here.
265 *
266 * Syscall protocol:
267 * Syscall number in r12, args in r5-r10
268 * Return value in r3
269 *
270 * Trap entered via brki instruction, so BIP bit is set, and interrupts
271 * are masked. This is nice, means we don't have to CLI before state save
272 */
273 C_ENTRY(_user_exception):
274 swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) /* save stack */
275 addi r14, r14, 4 /* return address is 4 byte after call */
276 swi r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* Save r11 */
277
278 mfs r11, rmsr
279 nop
280 andi r11, r11, MSR_UMS
281 bnei r11, 1f
282
283 /* Kernel-mode state save - kernel execve */
284 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* Reload kernel stack-ptr*/
285 tophys(r1,r11);
286 swi r11, r1, (PT_R1-PT_SIZE); /* Save original SP. */
287 lwi r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* restore r11 */
288
289 addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */
290 SAVE_REGS
291
292 addi r11, r0, 1; /* Was in kernel-mode. */
293 swi r11, r1, PTO+PT_MODE; /* pt_regs -> kernel mode */
294 brid 2f;
295 nop; /* Fill delay slot */
296
297 /* User-mode state save. */
298 1:
299 lwi r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* restore r11 */
300 lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */
301 tophys(r1,r1);
302 lwi r1, r1, TS_THREAD_INFO; /* get stack from task_struct */
303 /* calculate kernel stack pointer from task struct 8k */
304 addik r1, r1, THREAD_SIZE;
305 tophys(r1,r1);
306
307 addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */
308 SAVE_REGS
309
310 swi r0, r1, PTO+PT_MODE; /* Was in user-mode. */
311 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
312 swi r11, r1, PTO+PT_R1; /* Store user SP. */
313 2: lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
314 /* Save away the syscall number. */
315 swi r12, r1, PTO+PT_R0;
316 tovirt(r1,r1)
317
318 /* where the trap should return need -8 to adjust for rtsd r15, 8*/
319 /* Jump to the appropriate function for the system call number in r12
320 * (r12 is not preserved), or return an error if r12 is not valid. The LP
321 * register should point to the location where
322 * the called function should return. [note that MAKE_SYS_CALL uses label 1] */
323
324 # Step into virtual mode.
325 set_vms;
326 addik r11, r0, 3f
327 rtid r11, 0
328 nop
329 3:
330 lwi r11, CURRENT_TASK, TS_THREAD_INFO /* get thread info */
331 lwi r11, r11, TI_FLAGS /* get flags in thread info */
332 andi r11, r11, _TIF_WORK_SYSCALL_MASK
333 beqi r11, 4f
334
335 addik r3, r0, -ENOSYS
336 swi r3, r1, PTO + PT_R3
337 brlid r15, do_syscall_trace_enter
338 addik r5, r1, PTO + PT_R0
339
340 # do_syscall_trace_enter returns the new syscall nr.
341 addk r12, r0, r3
342 lwi r5, r1, PTO+PT_R5;
343 lwi r6, r1, PTO+PT_R6;
344 lwi r7, r1, PTO+PT_R7;
345 lwi r8, r1, PTO+PT_R8;
346 lwi r9, r1, PTO+PT_R9;
347 lwi r10, r1, PTO+PT_R10;
348 4:
349 /* Jump to the appropriate function for the system call number in r12
350 * (r12 is not preserved), or return an error if r12 is not valid.
351 * The LP register should point to the location where the called function
352 * should return. [note that MAKE_SYS_CALL uses label 1] */
353 /* See if the system call number is valid */
354 addi r11, r12, -__NR_syscalls;
355 bgei r11,5f;
356 /* Figure out which function to use for this system call. */
357 /* Note Microblaze barrel shift is optional, so don't rely on it */
358 add r12, r12, r12; /* convert num -> ptr */
359 add r12, r12, r12;
360
361 #ifdef DEBUG
362 /* Trac syscalls and stored them to r0_ram */
363 lwi r3, r12, 0x400 + r0_ram
364 addi r3, r3, 1
365 swi r3, r12, 0x400 + r0_ram
366 #endif
367
368 # Find and jump into the syscall handler.
369 lwi r12, r12, sys_call_table
370 /* where the trap should return need -8 to adjust for rtsd r15, 8 */
371 la r15, r0, ret_from_trap-8
372 bra r12
373
374 /* The syscall number is invalid, return an error. */
375 5:
376 addi r3, r0, -ENOSYS;
377 rtsd r15,8; /* looks like a normal subroutine return */
378 or r0, r0, r0
379
380
381 /* Entry point used to return from a syscall/trap */
382 /* We re-enable BIP bit before state restore */
383 C_ENTRY(ret_from_trap):
384 swi r3, r1, PTO + PT_R3
385 swi r4, r1, PTO + PT_R4
386
387 lwi r11, r1, PTO+PT_MODE;
388 /* See if returning to kernel mode, if so, skip resched &c. */
389 bnei r11, 2f;
390 /* We're returning to user mode, so check for various conditions that
391 * trigger rescheduling. */
392 /* FIXME: Restructure all these flag checks. */
393 lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */
394 lwi r11, r11, TI_FLAGS; /* get flags in thread info */
395 andi r11, r11, _TIF_WORK_SYSCALL_MASK
396 beqi r11, 1f
397
398 brlid r15, do_syscall_trace_leave
399 addik r5, r1, PTO + PT_R0
400 1:
401 /* We're returning to user mode, so check for various conditions that
402 * trigger rescheduling. */
403 /* get thread info from current task */
404 lwi r11, CURRENT_TASK, TS_THREAD_INFO;
405 lwi r11, r11, TI_FLAGS; /* get flags in thread info */
406 andi r11, r11, _TIF_NEED_RESCHED;
407 beqi r11, 5f;
408
409 bralid r15, schedule; /* Call scheduler */
410 nop; /* delay slot */
411
412 /* Maybe handle a signal */
413 5: /* get thread info from current task*/
414 lwi r11, CURRENT_TASK, TS_THREAD_INFO;
415 lwi r11, r11, TI_FLAGS; /* get flags in thread info */
416 andi r11, r11, _TIF_SIGPENDING;
417 beqi r11, 1f; /* Signals to handle, handle them */
418
419 la r5, r1, PTO; /* Arg 1: struct pt_regs *regs */
420 addi r7, r0, 1; /* Arg 3: int in_syscall */
421 bralid r15, do_signal; /* Handle any signals */
422 add r6, r0, r0; /* Arg 2: sigset_t *oldset */
423
424 /* Finally, return to user state. */
425 1: set_bip; /* Ints masked for state restore */
426 swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); /* save current */
427 VM_OFF;
428 tophys(r1,r1);
429 RESTORE_REGS;
430 addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */
431 lwi r1, r1, PT_R1 - PT_SIZE;/* Restore user stack pointer. */
432 bri 6f;
433
434 /* Return to kernel state. */
435 2: set_bip; /* Ints masked for state restore */
436 VM_OFF;
437 tophys(r1,r1);
438 RESTORE_REGS;
439 addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */
440 tovirt(r1,r1);
441 6:
442 TRAP_return: /* Make global symbol for debugging */
443 rtbd r14, 0; /* Instructions to return from an IRQ */
444 nop;
445
446
447 /* These syscalls need access to the struct pt_regs on the stack, so we
448 implement them in assembly (they're basically all wrappers anyway). */
449
450 C_ENTRY(sys_fork_wrapper):
451 addi r5, r0, SIGCHLD /* Arg 0: flags */
452 lwi r6, r1, PTO+PT_R1 /* Arg 1: child SP (use parent's) */
453 la r7, r1, PTO /* Arg 2: parent context */
454 add r8. r0, r0 /* Arg 3: (unused) */
455 add r9, r0, r0; /* Arg 4: (unused) */
456 add r10, r0, r0; /* Arg 5: (unused) */
457 brid do_fork /* Do real work (tail-call) */
458 nop;
459
460 /* This the initial entry point for a new child thread, with an appropriate
461 stack in place that makes it look the the child is in the middle of an
462 syscall. This function is actually `returned to' from switch_thread
463 (copy_thread makes ret_from_fork the return address in each new thread's
464 saved context). */
465 C_ENTRY(ret_from_fork):
466 bralid r15, schedule_tail; /* ...which is schedule_tail's arg */
467 add r3, r5, r0; /* switch_thread returns the prev task */
468 /* ( in the delay slot ) */
469 add r3, r0, r0; /* Child's fork call should return 0. */
470 brid ret_from_trap; /* Do normal trap return */
471 nop;
472
473 C_ENTRY(sys_vfork):
474 brid microblaze_vfork /* Do real work (tail-call) */
475 la r5, r1, PTO
476
477 C_ENTRY(sys_clone):
478 bnei r6, 1f; /* See if child SP arg (arg 1) is 0. */
479 lwi r6, r1, PTO + PT_R1; /* If so, use paret's stack ptr */
480 1: add r10, r0, r9; /* Arg 6: (child_tidptr) */
481 add r9, r0, r8; /* Arg 5: (parent_tidptr) */
482 add r8, r0, r7; /* Arg 4: (stack_size) */
483 la r7, r1, PTO; /* Arg 3: pt_regs */
484 brid do_fork /* Do real work (tail-call) */
485 nop
486
487 C_ENTRY(sys_execve):
488 la r8, r1, PTO; /* add user context as 4th arg */
489 brid microblaze_execve; /* Do real work (tail-call).*/
490 nop;
491
492 C_ENTRY(sys_rt_sigreturn_wrapper):
493 swi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
494 swi r4, r1, PTO+PT_R4;
495 la r5, r1, PTO; /* add user context as 1st arg */
496 brlid r15, sys_rt_sigreturn /* Do real work */
497 nop;
498 lwi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
499 lwi r4, r1, PTO+PT_R4;
500 bri ret_from_trap /* fall through will not work here due to align */
501 nop;
502
503 /*
504 * HW EXCEPTION rutine start
505 */
506
507 #define SAVE_STATE \
508 swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* save stack */ \
509 swi r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* Save r11 */ \
510 set_bip; /*equalize initial state for all possible entries*/\
511 clear_eip; \
512 enable_irq; \
513 set_ee; \
514 /* See if already in kernel mode.*/ \
515 mfs r11, rmsr; \
516 nop; \
517 andi r11, r11, MSR_UMS; \
518 bnei r11, 1f; \
519 /* Kernel-mode state save. */ \
520 /* Reload kernel stack-ptr. */ \
521 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); \
522 tophys(r1,r11); \
523 swi r11, r1, (PT_R1-PT_SIZE); /* Save original SP. */ \
524 lwi r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* restore r11 */\
525 addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */\
526 SAVE_REGS \
527 /* PC, before IRQ/trap - this is one instruction above */ \
528 swi r17, r1, PTO+PT_PC; \
529 \
530 addi r11, r0, 1; /* Was in kernel-mode. */ \
531 swi r11, r1, PTO+PT_MODE; \
532 brid 2f; \
533 nop; /* Fill delay slot */ \
534 1: /* User-mode state save. */ \
535 lwi r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* restore r11 */\
536 lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */\
537 tophys(r1,r1); \
538 lwi r1, r1, TS_THREAD_INFO; /* get the thread info */ \
539 addik r1, r1, THREAD_SIZE; /* calculate kernel stack pointer */\
540 tophys(r1,r1); \
541 \
542 addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */\
543 SAVE_REGS \
544 /* PC, before IRQ/trap - this is one instruction above FIXME*/ \
545 swi r17, r1, PTO+PT_PC; \
546 \
547 swi r0, r1, PTO+PT_MODE; /* Was in user-mode. */ \
548 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); \
549 swi r11, r1, PTO+PT_R1; /* Store user SP. */ \
550 2: lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); \
551 /* Save away the syscall number. */ \
552 swi r0, r1, PTO+PT_R0; \
553 tovirt(r1,r1)
554
555 C_ENTRY(full_exception_trap):
556 /* adjust exception address for privileged instruction
557 * for finding where is it */
558 addik r17, r17, -4
559 SAVE_STATE /* Save registers */
560 /* FIXME this can be store directly in PT_ESR reg.
561 * I tested it but there is a fault */
562 /* where the trap should return need -8 to adjust for rtsd r15, 8 */
563 la r15, r0, ret_from_exc - 8
564 la r5, r1, PTO /* parameter struct pt_regs * regs */
565 mfs r6, resr
566 nop
567 mfs r7, rfsr; /* save FSR */
568 nop
569 mts rfsr, r0; /* Clear sticky fsr */
570 nop
571 la r12, r0, full_exception
572 set_vms;
573 rtbd r12, 0;
574 nop;
575
576 /*
577 * Unaligned data trap.
578 *
579 * Unaligned data trap last on 4k page is handled here.
580 *
581 * Trap entered via exception, so EE bit is set, and interrupts
582 * are masked. This is nice, means we don't have to CLI before state save
583 *
584 * The assembler routine is in "arch/microblaze/kernel/hw_exception_handler.S"
585 */
586 C_ENTRY(unaligned_data_trap):
587 SAVE_STATE /* Save registers.*/
588 /* where the trap should return need -8 to adjust for rtsd r15, 8 */
589 la r15, r0, ret_from_exc-8
590 mfs r3, resr /* ESR */
591 nop
592 mfs r4, rear /* EAR */
593 nop
594 la r7, r1, PTO /* parameter struct pt_regs * regs */
595 la r12, r0, _unaligned_data_exception
596 set_vms;
597 rtbd r12, 0; /* interrupts enabled */
598 nop;
599
600 /*
601 * Page fault traps.
602 *
603 * If the real exception handler (from hw_exception_handler.S) didn't find
604 * the mapping for the process, then we're thrown here to handle such situation.
605 *
606 * Trap entered via exceptions, so EE bit is set, and interrupts
607 * are masked. This is nice, means we don't have to CLI before state save
608 *
609 * Build a standard exception frame for TLB Access errors. All TLB exceptions
610 * will bail out to this point if they can't resolve the lightweight TLB fault.
611 *
612 * The C function called is in "arch/microblaze/mm/fault.c", declared as:
613 * void do_page_fault(struct pt_regs *regs,
614 * unsigned long address,
615 * unsigned long error_code)
616 */
617 /* data and intruction trap - which is choose is resolved int fault.c */
618 C_ENTRY(page_fault_data_trap):
619 SAVE_STATE /* Save registers.*/
620 /* where the trap should return need -8 to adjust for rtsd r15, 8 */
621 la r15, r0, ret_from_exc-8
622 la r5, r1, PTO /* parameter struct pt_regs * regs */
623 mfs r6, rear /* parameter unsigned long address */
624 nop
625 mfs r7, resr /* parameter unsigned long error_code */
626 nop
627 la r12, r0, do_page_fault
628 set_vms;
629 rtbd r12, 0; /* interrupts enabled */
630 nop;
631
632 C_ENTRY(page_fault_instr_trap):
633 SAVE_STATE /* Save registers.*/
634 /* where the trap should return need -8 to adjust for rtsd r15, 8 */
635 la r15, r0, ret_from_exc-8
636 la r5, r1, PTO /* parameter struct pt_regs * regs */
637 mfs r6, rear /* parameter unsigned long address */
638 nop
639 ori r7, r0, 0 /* parameter unsigned long error_code */
640 la r12, r0, do_page_fault
641 set_vms;
642 rtbd r12, 0; /* interrupts enabled */
643 nop;
644
645 /* Entry point used to return from an exception. */
646 C_ENTRY(ret_from_exc):
647 lwi r11, r1, PTO+PT_MODE;
648 bnei r11, 2f; /* See if returning to kernel mode, */
649 /* ... if so, skip resched &c. */
650
651 /* We're returning to user mode, so check for various conditions that
652 trigger rescheduling. */
653 lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */
654 lwi r11, r11, TI_FLAGS; /* get flags in thread info */
655 andi r11, r11, _TIF_NEED_RESCHED;
656 beqi r11, 5f;
657
658 /* Call the scheduler before returning from a syscall/trap. */
659 bralid r15, schedule; /* Call scheduler */
660 nop; /* delay slot */
661
662 /* Maybe handle a signal */
663 5: lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */
664 lwi r11, r11, TI_FLAGS; /* get flags in thread info */
665 andi r11, r11, _TIF_SIGPENDING;
666 beqi r11, 1f; /* Signals to handle, handle them */
667
668 /*
669 * Handle a signal return; Pending signals should be in r18.
670 *
671 * Not all registers are saved by the normal trap/interrupt entry
672 * points (for instance, call-saved registers (because the normal
673 * C-compiler calling sequence in the kernel makes sure they're
674 * preserved), and call-clobbered registers in the case of
675 * traps), but signal handlers may want to examine or change the
676 * complete register state. Here we save anything not saved by
677 * the normal entry sequence, so that it may be safely restored
678 * (in a possibly modified form) after do_signal returns. */
679 la r5, r1, PTO; /* Arg 1: struct pt_regs *regs */
680 addi r7, r0, 0; /* Arg 3: int in_syscall */
681 bralid r15, do_signal; /* Handle any signals */
682 add r6, r0, r0; /* Arg 2: sigset_t *oldset */
683
684 /* Finally, return to user state. */
685 1: set_bip; /* Ints masked for state restore */
686 swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); /* save current */
687 VM_OFF;
688 tophys(r1,r1);
689
690 RESTORE_REGS;
691 addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */
692
693 lwi r1, r1, PT_R1 - PT_SIZE; /* Restore user stack pointer. */
694 bri 6f;
695 /* Return to kernel state. */
696 2: set_bip; /* Ints masked for state restore */
697 VM_OFF;
698 tophys(r1,r1);
699 RESTORE_REGS;
700 addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */
701
702 tovirt(r1,r1);
703 6:
704 EXC_return: /* Make global symbol for debugging */
705 rtbd r14, 0; /* Instructions to return from an IRQ */
706 nop;
707
708 /*
709 * HW EXCEPTION rutine end
710 */
711
712 /*
713 * Hardware maskable interrupts.
714 *
715 * The stack-pointer (r1) should have already been saved to the memory
716 * location PER_CPU(ENTRY_SP).
717 */
718 C_ENTRY(_interrupt):
719 /* MS: we are in physical address */
720 /* Save registers, switch to proper stack, convert SP to virtual.*/
721 swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP))
722 swi r11, r0, TOPHYS(PER_CPU(R11_SAVE));
723 /* MS: See if already in kernel mode. */
724 mfs r11, rmsr
725 nop
726 andi r11, r11, MSR_UMS
727 bnei r11, 1f
728
729 /* Kernel-mode state save. */
730 or r11, r1, r0
731 tophys(r1,r11); /* MS: I have in r1 physical address where stack is */
732 /* MS: Save original SP - position PT_R1 to next stack frame 4 *1 - 152*/
733 swi r11, r1, (PT_R1 - PT_SIZE);
734 /* MS: restore r11 because of saving in SAVE_REGS */
735 lwi r11, r0, TOPHYS(PER_CPU(R11_SAVE));
736 /* save registers */
737 /* MS: Make room on the stack -> activation record */
738 addik r1, r1, -STATE_SAVE_SIZE;
739 SAVE_REGS
740 /* MS: store mode */
741 addi r11, r0, 1; /* MS: Was in kernel-mode. */
742 swi r11, r1, PTO + PT_MODE; /* MS: and save it */
743 brid 2f;
744 nop; /* MS: Fill delay slot */
745
746 1:
747 /* User-mode state save. */
748 /* MS: restore r11 -> FIXME move before SAVE_REG */
749 lwi r11, r0, TOPHYS(PER_CPU(R11_SAVE));
750 /* MS: get the saved current */
751 lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
752 tophys(r1,r1);
753 lwi r1, r1, TS_THREAD_INFO;
754 addik r1, r1, THREAD_SIZE;
755 tophys(r1,r1);
756 /* save registers */
757 addik r1, r1, -STATE_SAVE_SIZE;
758 SAVE_REGS
759 /* calculate mode */
760 swi r0, r1, PTO + PT_MODE;
761 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
762 swi r11, r1, PTO+PT_R1;
763 2:
764 lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
765 swi r0, r1, PTO + PT_R0;
766 tovirt(r1,r1)
767 la r5, r1, PTO;
768 set_vms;
769 la r11, r0, do_IRQ;
770 la r15, r0, irq_call;
771 irq_call:rtbd r11, 0;
772 nop;
773
774 /* MS: we are in virtual mode */
775 ret_from_irq:
776 lwi r11, r1, PTO + PT_MODE;
777 bnei r11, 2f;
778
779 lwi r11, CURRENT_TASK, TS_THREAD_INFO;
780 lwi r11, r11, TI_FLAGS; /* MS: get flags from thread info */
781 andi r11, r11, _TIF_NEED_RESCHED;
782 beqi r11, 5f
783 bralid r15, schedule;
784 nop; /* delay slot */
785
786 /* Maybe handle a signal */
787 5: lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* MS: get thread info */
788 lwi r11, r11, TI_FLAGS; /* get flags in thread info */
789 andi r11, r11, _TIF_SIGPENDING;
790 beqid r11, no_intr_resched
791 /* Handle a signal return; Pending signals should be in r18. */
792 addi r7, r0, 0; /* Arg 3: int in_syscall */
793 la r5, r1, PTO; /* Arg 1: struct pt_regs *regs */
794 bralid r15, do_signal; /* Handle any signals */
795 add r6, r0, r0; /* Arg 2: sigset_t *oldset */
796
797 /* Finally, return to user state. */
798 no_intr_resched:
799 /* Disable interrupts, we are now committed to the state restore */
800 disable_irq
801 swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE);
802 VM_OFF;
803 tophys(r1,r1);
804 RESTORE_REGS
805 addik r1, r1, STATE_SAVE_SIZE /* MS: Clean up stack space. */
806 lwi r1, r1, PT_R1 - PT_SIZE;
807 bri 6f;
808 /* MS: Return to kernel state. */
809 2:
810 #ifdef CONFIG_PREEMPT
811 lwi r11, CURRENT_TASK, TS_THREAD_INFO;
812 /* MS: get preempt_count from thread info */
813 lwi r5, r11, TI_PREEMPT_COUNT;
814 bgti r5, restore;
815
816 lwi r5, r11, TI_FLAGS; /* get flags in thread info */
817 andi r5, r5, _TIF_NEED_RESCHED;
818 beqi r5, restore /* if zero jump over */
819
820 preempt:
821 /* interrupts are off that's why I am calling preempt_chedule_irq */
822 bralid r15, preempt_schedule_irq
823 nop
824 lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */
825 lwi r5, r11, TI_FLAGS; /* get flags in thread info */
826 andi r5, r5, _TIF_NEED_RESCHED;
827 bnei r5, preempt /* if non zero jump to resched */
828 restore:
829 #endif
830 VM_OFF /* MS: turn off MMU */
831 tophys(r1,r1)
832 RESTORE_REGS
833 addik r1, r1, STATE_SAVE_SIZE /* MS: Clean up stack space. */
834 tovirt(r1,r1);
835 6:
836 IRQ_return: /* MS: Make global symbol for debugging */
837 rtid r14, 0
838 nop
839
840 /*
841 * `Debug' trap
842 * We enter dbtrap in "BIP" (breakpoint) mode.
843 * So we exit the breakpoint mode with an 'rtbd' and proceed with the
844 * original dbtrap.
845 * however, wait to save state first
846 */
847 C_ENTRY(_debug_exception):
848 /* BIP bit is set on entry, no interrupts can occur */
849 swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP))
850
851 swi r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* Save r11 */
852 set_bip; /*equalize initial state for all possible entries*/
853 clear_eip;
854 enable_irq;
855 mfs r11, rmsr
856 nop
857 andi r11, r11, MSR_UMS
858 bnei r11, 1f
859 /* Kernel-mode state save. */
860 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* Reload kernel stack-ptr*/
861 tophys(r1,r11);
862 swi r11, r1, (PT_R1-PT_SIZE); /* Save original SP. */
863 lwi r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* restore r11 */
864
865 addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */
866 SAVE_REGS;
867
868 addi r11, r0, 1; /* Was in kernel-mode. */
869 swi r11, r1, PTO + PT_MODE;
870 brid 2f;
871 nop; /* Fill delay slot */
872 1: /* User-mode state save. */
873 lwi r11, r0, TOPHYS(r0_ram + PTO + PT_R11); /* restore r11 */
874 lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */
875 tophys(r1,r1);
876 lwi r1, r1, TS_THREAD_INFO; /* get the thread info */
877 addik r1, r1, THREAD_SIZE; /* calculate kernel stack pointer */
878 tophys(r1,r1);
879
880 addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */
881 SAVE_REGS;
882
883 swi r0, r1, PTO+PT_MODE; /* Was in user-mode. */
884 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
885 swi r11, r1, PTO+PT_R1; /* Store user SP. */
886 2: lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
887 /* Save away the syscall number. */
888 swi r0, r1, PTO+PT_R0;
889 tovirt(r1,r1)
890
891 addi r5, r0, SIGTRAP /* send the trap signal */
892 add r6, r0, CURRENT_TASK; /* Get current task ptr into r11 */
893 addk r7, r0, r0 /* 3rd param zero */
894
895 set_vms;
896 la r11, r0, send_sig;
897 la r15, r0, dbtrap_call;
898 dbtrap_call: rtbd r11, 0;
899 nop;
900
901 set_bip; /* Ints masked for state restore*/
902 lwi r11, r1, PTO+PT_MODE;
903 bnei r11, 2f;
904
905 /* Get current task ptr into r11 */
906 lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */
907 lwi r11, r11, TI_FLAGS; /* get flags in thread info */
908 andi r11, r11, _TIF_NEED_RESCHED;
909 beqi r11, 5f;
910
911 /* Call the scheduler before returning from a syscall/trap. */
912
913 bralid r15, schedule; /* Call scheduler */
914 nop; /* delay slot */
915 /* XXX Is PT_DTRACE handling needed here? */
916 /* XXX m68knommu also checks TASK_STATE & TASK_COUNTER here. */
917
918 /* Maybe handle a signal */
919 5: lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */
920 lwi r11, r11, TI_FLAGS; /* get flags in thread info */
921 andi r11, r11, _TIF_SIGPENDING;
922 beqi r11, 1f; /* Signals to handle, handle them */
923
924 /* Handle a signal return; Pending signals should be in r18. */
925 /* Not all registers are saved by the normal trap/interrupt entry
926 points (for instance, call-saved registers (because the normal
927 C-compiler calling sequence in the kernel makes sure they're
928 preserved), and call-clobbered registers in the case of
929 traps), but signal handlers may want to examine or change the
930 complete register state. Here we save anything not saved by
931 the normal entry sequence, so that it may be safely restored
932 (in a possibly modified form) after do_signal returns. */
933
934 la r5, r1, PTO; /* Arg 1: struct pt_regs *regs */
935 addi r7, r0, 0; /* Arg 3: int in_syscall */
936 bralid r15, do_signal; /* Handle any signals */
937 add r6, r0, r0; /* Arg 2: sigset_t *oldset */
938
939
940 /* Finally, return to user state. */
941 1:
942 swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); /* save current */
943 VM_OFF;
944 tophys(r1,r1);
945
946 RESTORE_REGS
947 addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */
948
949
950 lwi r1, r1, PT_R1 - PT_SIZE;
951 /* Restore user stack pointer. */
952 bri 6f;
953
954 /* Return to kernel state. */
955 2: VM_OFF;
956 tophys(r1,r1);
957 RESTORE_REGS
958 addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */
959
960 tovirt(r1,r1);
961 6:
962 DBTRAP_return: /* Make global symbol for debugging */
963 rtbd r14, 0; /* Instructions to return from an IRQ */
964 nop;
965
966
967
968 ENTRY(_switch_to)
969 /* prepare return value */
970 addk r3, r0, CURRENT_TASK
971
972 /* save registers in cpu_context */
973 /* use r11 and r12, volatile registers, as temp register */
974 /* give start of cpu_context for previous process */
975 addik r11, r5, TI_CPU_CONTEXT
976 swi r1, r11, CC_R1
977 swi r2, r11, CC_R2
978 /* skip volatile registers.
979 * they are saved on stack when we jumped to _switch_to() */
980 /* dedicated registers */
981 swi r13, r11, CC_R13
982 swi r14, r11, CC_R14
983 swi r15, r11, CC_R15
984 swi r16, r11, CC_R16
985 swi r17, r11, CC_R17
986 swi r18, r11, CC_R18
987 /* save non-volatile registers */
988 swi r19, r11, CC_R19
989 swi r20, r11, CC_R20
990 swi r21, r11, CC_R21
991 swi r22, r11, CC_R22
992 swi r23, r11, CC_R23
993 swi r24, r11, CC_R24
994 swi r25, r11, CC_R25
995 swi r26, r11, CC_R26
996 swi r27, r11, CC_R27
997 swi r28, r11, CC_R28
998 swi r29, r11, CC_R29
999 swi r30, r11, CC_R30
1000 /* special purpose registers */
1001 mfs r12, rmsr
1002 nop
1003 swi r12, r11, CC_MSR
1004 mfs r12, rear
1005 nop
1006 swi r12, r11, CC_EAR
1007 mfs r12, resr
1008 nop
1009 swi r12, r11, CC_ESR
1010 mfs r12, rfsr
1011 nop
1012 swi r12, r11, CC_FSR
1013
1014 /* update r31, the current-give me pointer to task which will be next */
1015 lwi CURRENT_TASK, r6, TI_TASK
1016 /* stored it to current_save too */
1017 swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE)
1018
1019 /* get new process' cpu context and restore */
1020 /* give me start where start context of next task */
1021 addik r11, r6, TI_CPU_CONTEXT
1022
1023 /* non-volatile registers */
1024 lwi r30, r11, CC_R30
1025 lwi r29, r11, CC_R29
1026 lwi r28, r11, CC_R28
1027 lwi r27, r11, CC_R27
1028 lwi r26, r11, CC_R26
1029 lwi r25, r11, CC_R25
1030 lwi r24, r11, CC_R24
1031 lwi r23, r11, CC_R23
1032 lwi r22, r11, CC_R22
1033 lwi r21, r11, CC_R21
1034 lwi r20, r11, CC_R20
1035 lwi r19, r11, CC_R19
1036 /* dedicated registers */
1037 lwi r18, r11, CC_R18
1038 lwi r17, r11, CC_R17
1039 lwi r16, r11, CC_R16
1040 lwi r15, r11, CC_R15
1041 lwi r14, r11, CC_R14
1042 lwi r13, r11, CC_R13
1043 /* skip volatile registers */
1044 lwi r2, r11, CC_R2
1045 lwi r1, r11, CC_R1
1046
1047 /* special purpose registers */
1048 lwi r12, r11, CC_FSR
1049 mts rfsr, r12
1050 nop
1051 lwi r12, r11, CC_MSR
1052 mts rmsr, r12
1053 nop
1054
1055 rtsd r15, 8
1056 nop
1057
1058 ENTRY(_reset)
1059 brai 0x70; /* Jump back to FS-boot */
1060
1061 ENTRY(_break)
1062 mfs r5, rmsr
1063 nop
1064 swi r5, r0, 0x250 + TOPHYS(r0_ram)
1065 mfs r5, resr
1066 nop
1067 swi r5, r0, 0x254 + TOPHYS(r0_ram)
1068 bri 0
1069
1070 /* These are compiled and loaded into high memory, then
1071 * copied into place in mach_early_setup */
1072 .section .init.ivt, "ax"
1073 .org 0x0
1074 /* this is very important - here is the reset vector */
1075 /* in current MMU branch you don't care what is here - it is
1076 * used from bootloader site - but this is correct for FS-BOOT */
1077 brai 0x70
1078 nop
1079 brai TOPHYS(_user_exception); /* syscall handler */
1080 brai TOPHYS(_interrupt); /* Interrupt handler */
1081 brai TOPHYS(_break); /* nmi trap handler */
1082 brai TOPHYS(_hw_exception_handler); /* HW exception handler */
1083
1084 .org 0x60
1085 brai TOPHYS(_debug_exception); /* debug trap handler*/
1086
1087 .section .rodata,"a"
1088 #include "syscall_table.S"
1089
1090 syscall_table_size=(.-sys_call_table)
1091
1092 type_SYSCALL:
1093 .ascii "SYSCALL\0"
1094 type_IRQ:
1095 .ascii "IRQ\0"
1096 type_IRQ_PREEMPT:
1097 .ascii "IRQ (PREEMPTED)\0"
1098 type_SYSCALL_PREEMPT:
1099 .ascii " SYSCALL (PREEMPTED)\0"
1100
1101 /*
1102 * Trap decoding for stack unwinder
1103 * Tuples are (start addr, end addr, string)
1104 * If return address lies on [start addr, end addr],
1105 * unwinder displays 'string'
1106 */
1107
1108 .align 4
1109 .global microblaze_trap_handlers
1110 microblaze_trap_handlers:
1111 /* Exact matches come first */
1112 .word ret_from_trap; .word ret_from_trap ; .word type_SYSCALL
1113 .word ret_from_irq ; .word ret_from_irq ; .word type_IRQ
1114 /* Fuzzy matches go here */
1115 .word ret_from_irq ; .word no_intr_resched ; .word type_IRQ_PREEMPT
1116 .word ret_from_trap; .word TRAP_return ; .word type_SYSCALL_PREEMPT
1117 /* End of table */
1118 .word 0 ; .word 0 ; .word 0
Linux kernel - Deliverables
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