2 * Low-level system-call handling, trap handlers and context-switching
4 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
5 * Copyright (C) 2008-2009 PetaLogix
6 * Copyright (C) 2003 John Williams <jwilliams@itee.uq.edu.au>
7 * Copyright (C) 2001,2002 NEC Corporation
8 * Copyright (C) 2001,2002 Miles Bader <miles@gnu.org>
10 * This file is subject to the terms and conditions of the GNU General
11 * Public License. See the file COPYING in the main directory of this
12 * archive for more details.
14 * Written by Miles Bader <miles@gnu.org>
15 * Heavily modified by John Williams for Microblaze
18 #include <linux/sys.h>
19 #include <linux/linkage.h>
21 #include <asm/entry.h>
22 #include <asm/current.h>
23 #include <asm/processor.h>
24 #include <asm/exceptions.h>
25 #include <asm/asm-offsets.h>
26 #include <asm/thread_info.h>
29 #include <asm/unistd.h>
31 #include <linux/errno.h>
32 #include <asm/signal.h>
36 /* The size of a state save frame. */
37 #define STATE_SAVE_SIZE (PT_SIZE + STATE_SAVE_ARG_SPACE)
39 /* The offset of the struct pt_regs in a `state save frame' on the stack. */
40 #define PTO STATE_SAVE_ARG_SPACE /* 24 the space for args */
42 #define C_ENTRY(name) .globl name; .align 4; name
45 * Various ways of setting and clearing BIP in flags reg.
46 * This is mucky, but necessary using microblaze version that
47 * allows msr ops to write to BIP
49 #if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
100 msrclr r0, MSR_VMS | MSR_UMS
107 andi r11, r11, ~MSR_BIP
115 ori r11, r11, MSR_BIP
123 andi r11, r11, ~MSR_EIP
139 andi r11, r11, ~MSR_IE
155 ori r11, r11, MSR_VMS
156 andni r11, r11, MSR_UMS
164 ori r11, r11, MSR_VMS
165 andni r11, r11, MSR_UMS
173 andni r11, r11, MSR_UMS
181 andni r11, r11, (MSR_VMS|MSR_UMS)
187 /* Define how to call high-level functions. With MMU, virtual mode must be
188 * enabled when calling the high-level function. Clobbers R11.
189 * VM_ON, VM_OFF, DO_JUMP_BIPCLR, DO_CALL
192 /* turn on virtual protected mode save */
199 /* turn off virtual protected mode save and user mode save*/
202 rted r0, TOPHYS(1f); \
207 swi r2, r1, PTO+PT_R2; /* Save SDA */ \
208 swi r3, r1, PTO+PT_R3; \
209 swi r4, r1, PTO+PT_R4; \
210 swi r5, r1, PTO+PT_R5; \
211 swi r6, r1, PTO+PT_R6; \
212 swi r7, r1, PTO+PT_R7; \
213 swi r8, r1, PTO+PT_R8; \
214 swi r9, r1, PTO+PT_R9; \
215 swi r10, r1, PTO+PT_R10; \
216 swi r11, r1, PTO+PT_R11; /* save clobbered regs after rval */\
217 swi r12, r1, PTO+PT_R12; \
218 swi r13, r1, PTO+PT_R13; /* Save SDA2 */ \
219 swi r14, r1, PTO+PT_PC; /* PC, before IRQ/trap */ \
220 swi r15, r1, PTO+PT_R15; /* Save LP */ \
221 swi r18, r1, PTO+PT_R18; /* Save asm scratch reg */ \
222 swi r19, r1, PTO+PT_R19; \
223 swi r20, r1, PTO+PT_R20; \
224 swi r21, r1, PTO+PT_R21; \
225 swi r22, r1, PTO+PT_R22; \
226 swi r23, r1, PTO+PT_R23; \
227 swi r24, r1, PTO+PT_R24; \
228 swi r25, r1, PTO+PT_R25; \
229 swi r26, r1, PTO+PT_R26; \
230 swi r27, r1, PTO+PT_R27; \
231 swi r28, r1, PTO+PT_R28; \
232 swi r29, r1, PTO+PT_R29; \
233 swi r30, r1, PTO+PT_R30; \
234 swi r31, r1, PTO+PT_R31; /* Save current task reg */ \
235 mfs r11, rmsr; /* save MSR */ \
237 swi r11, r1, PTO+PT_MSR;
239 #define RESTORE_REGS \
240 lwi r11, r1, PTO+PT_MSR; \
243 lwi r2, r1, PTO+PT_R2; /* restore SDA */ \
244 lwi r3, r1, PTO+PT_R3; \
245 lwi r4, r1, PTO+PT_R4; \
246 lwi r5, r1, PTO+PT_R5; \
247 lwi r6, r1, PTO+PT_R6; \
248 lwi r7, r1, PTO+PT_R7; \
249 lwi r8, r1, PTO+PT_R8; \
250 lwi r9, r1, PTO+PT_R9; \
251 lwi r10, r1, PTO+PT_R10; \
252 lwi r11, r1, PTO+PT_R11; /* restore clobbered regs after rval */\
253 lwi r12, r1, PTO+PT_R12; \
254 lwi r13, r1, PTO+PT_R13; /* restore SDA2 */ \
255 lwi r14, r1, PTO+PT_PC; /* RESTORE_LINK PC, before IRQ/trap */\
256 lwi r15, r1, PTO+PT_R15; /* restore LP */ \
257 lwi r18, r1, PTO+PT_R18; /* restore asm scratch reg */ \
258 lwi r19, r1, PTO+PT_R19; \
259 lwi r20, r1, PTO+PT_R20; \
260 lwi r21, r1, PTO+PT_R21; \
261 lwi r22, r1, PTO+PT_R22; \
262 lwi r23, r1, PTO+PT_R23; \
263 lwi r24, r1, PTO+PT_R24; \
264 lwi r25, r1, PTO+PT_R25; \
265 lwi r26, r1, PTO+PT_R26; \
266 lwi r27, r1, PTO+PT_R27; \
267 lwi r28, r1, PTO+PT_R28; \
268 lwi r29, r1, PTO+PT_R29; \
269 lwi r30, r1, PTO+PT_R30; \
270 lwi r31, r1, PTO+PT_R31; /* Restore cur task reg */
273 swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* save stack */ \
274 /* See if already in kernel mode.*/ \
277 andi r1, r1, MSR_UMS; \
279 /* Kernel-mode state save. */ \
280 /* Reload kernel stack-ptr. */ \
281 lwi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); \
283 addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */\
286 swi r1, r1, PTO+PT_MODE; \
287 1: /* User-mode state save. */ \
288 lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */\
290 lwi r1, r1, TS_THREAD_INFO; /* get the thread info */ \
291 addik r1, r1, THREAD_SIZE; /* calculate kernel stack pointer */\
293 addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */\
295 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP)); \
296 swi r11, r1, PTO+PT_R1; /* Store user SP. */ \
297 swi r0, r1, PTO + PT_MODE; /* Was in user-mode. */ \
298 /* MS: I am clearing UMS even in case when I come from kernel space */ \
300 2: lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
307 * System calls are handled here.
310 * Syscall number in r12, args in r5-r10
313 * Trap entered via brki instruction, so BIP bit is set, and interrupts
314 * are masked. This is nice, means we don't have to CLI before state save
316 C_ENTRY(_user_exception):
317 swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)) /* save stack */
318 addi r14, r14, 4 /* return address is 4 byte after call */
325 /* Kernel-mode state save - kernel execve */
326 lwi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* Reload kernel stack-ptr*/
329 addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */
332 swi r1, r1, PTO + PT_MODE; /* pt_regs -> kernel mode */
334 nop; /* Fill delay slot */
336 /* User-mode state save. */
338 lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */
340 lwi r1, r1, TS_THREAD_INFO; /* get stack from task_struct */
341 /* calculate kernel stack pointer from task struct 8k */
342 addik r1, r1, THREAD_SIZE;
345 addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */
348 swi r0, r1, PTO + PT_MODE; /* Was in user-mode. */
349 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
350 swi r11, r1, PTO+PT_R1; /* Store user SP. */
351 2: lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
352 /* Save away the syscall number. */
353 swi r12, r1, PTO+PT_R0;
356 /* where the trap should return need -8 to adjust for rtsd r15, 8*/
357 /* Jump to the appropriate function for the system call number in r12
358 * (r12 is not preserved), or return an error if r12 is not valid. The LP
359 * register should point to the location where
360 * the called function should return. [note that MAKE_SYS_CALL uses label 1] */
362 # Step into virtual mode.
368 lwi r11, CURRENT_TASK, TS_THREAD_INFO /* get thread info */
369 lwi r11, r11, TI_FLAGS /* get flags in thread info */
370 andi r11, r11, _TIF_WORK_SYSCALL_MASK
373 addik r3, r0, -ENOSYS
374 swi r3, r1, PTO + PT_R3
375 brlid r15, do_syscall_trace_enter
376 addik r5, r1, PTO + PT_R0
378 # do_syscall_trace_enter returns the new syscall nr.
380 lwi r5, r1, PTO+PT_R5;
381 lwi r6, r1, PTO+PT_R6;
382 lwi r7, r1, PTO+PT_R7;
383 lwi r8, r1, PTO+PT_R8;
384 lwi r9, r1, PTO+PT_R9;
385 lwi r10, r1, PTO+PT_R10;
387 /* Jump to the appropriate function for the system call number in r12
388 * (r12 is not preserved), or return an error if r12 is not valid.
389 * The LP register should point to the location where the called function
390 * should return. [note that MAKE_SYS_CALL uses label 1] */
391 /* See if the system call number is valid */
392 addi r11, r12, -__NR_syscalls;
394 /* Figure out which function to use for this system call. */
395 /* Note Microblaze barrel shift is optional, so don't rely on it */
396 add r12, r12, r12; /* convert num -> ptr */
400 /* Trac syscalls and stored them to r0_ram */
401 lwi r3, r12, 0x400 + r0_ram
403 swi r3, r12, 0x400 + r0_ram
406 # Find and jump into the syscall handler.
407 lwi r12, r12, sys_call_table
408 /* where the trap should return need -8 to adjust for rtsd r15, 8 */
409 addi r15, r0, ret_from_trap-8
412 /* The syscall number is invalid, return an error. */
414 rtsd r15, 8; /* looks like a normal subroutine return */
415 addi r3, r0, -ENOSYS;
417 /* Entry point used to return from a syscall/trap */
418 /* We re-enable BIP bit before state restore */
419 C_ENTRY(ret_from_trap):
420 swi r3, r1, PTO + PT_R3
421 swi r4, r1, PTO + PT_R4
423 lwi r11, r1, PTO + PT_MODE;
424 /* See if returning to kernel mode, if so, skip resched &c. */
426 /* We're returning to user mode, so check for various conditions that
427 * trigger rescheduling. */
428 /* FIXME: Restructure all these flag checks. */
429 lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */
430 lwi r11, r11, TI_FLAGS; /* get flags in thread info */
431 andi r11, r11, _TIF_WORK_SYSCALL_MASK
434 brlid r15, do_syscall_trace_leave
435 addik r5, r1, PTO + PT_R0
437 /* We're returning to user mode, so check for various conditions that
438 * trigger rescheduling. */
439 /* get thread info from current task */
440 lwi r11, CURRENT_TASK, TS_THREAD_INFO;
441 lwi r11, r11, TI_FLAGS; /* get flags in thread info */
442 andi r11, r11, _TIF_NEED_RESCHED;
445 bralid r15, schedule; /* Call scheduler */
446 nop; /* delay slot */
448 /* Maybe handle a signal */
449 5: /* get thread info from current task*/
450 lwi r11, CURRENT_TASK, TS_THREAD_INFO;
451 lwi r11, r11, TI_FLAGS; /* get flags in thread info */
452 andi r11, r11, _TIF_SIGPENDING;
453 beqi r11, 1f; /* Signals to handle, handle them */
455 addik r5, r1, PTO; /* Arg 1: struct pt_regs *regs */
456 addi r7, r0, 1; /* Arg 3: int in_syscall */
457 bralid r15, do_signal; /* Handle any signals */
458 add r6, r0, r0; /* Arg 2: sigset_t *oldset */
460 /* Finally, return to user state. */
461 1: set_bip; /* Ints masked for state restore */
462 swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); /* save current */
466 addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */
467 lwi r1, r1, PT_R1 - PT_SIZE;/* Restore user stack pointer. */
470 /* Return to kernel state. */
471 2: set_bip; /* Ints masked for state restore */
475 addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */
478 TRAP_return: /* Make global symbol for debugging */
479 rtbd r14, 0; /* Instructions to return from an IRQ */
483 /* These syscalls need access to the struct pt_regs on the stack, so we
484 implement them in assembly (they're basically all wrappers anyway). */
486 C_ENTRY(sys_fork_wrapper):
487 addi r5, r0, SIGCHLD /* Arg 0: flags */
488 lwi r6, r1, PTO+PT_R1 /* Arg 1: child SP (use parent's) */
489 addik r7, r1, PTO /* Arg 2: parent context */
490 add r8. r0, r0 /* Arg 3: (unused) */
491 add r9, r0, r0; /* Arg 4: (unused) */
492 brid do_fork /* Do real work (tail-call) */
493 add r10, r0, r0; /* Arg 5: (unused) */
495 /* This the initial entry point for a new child thread, with an appropriate
496 stack in place that makes it look the the child is in the middle of an
497 syscall. This function is actually `returned to' from switch_thread
498 (copy_thread makes ret_from_fork the return address in each new thread's
500 C_ENTRY(ret_from_fork):
501 bralid r15, schedule_tail; /* ...which is schedule_tail's arg */
502 add r3, r5, r0; /* switch_thread returns the prev task */
503 /* ( in the delay slot ) */
504 brid ret_from_trap; /* Do normal trap return */
505 add r3, r0, r0; /* Child's fork call should return 0. */
508 brid microblaze_vfork /* Do real work (tail-call) */
512 bnei r6, 1f; /* See if child SP arg (arg 1) is 0. */
513 lwi r6, r1, PTO + PT_R1; /* If so, use paret's stack ptr */
514 1: addik r7, r1, PTO; /* Arg 2: parent context */
515 add r8, r0, r0; /* Arg 3: (unused) */
516 add r9, r0, r0; /* Arg 4: (unused) */
517 brid do_fork /* Do real work (tail-call) */
518 add r10, r0, r0; /* Arg 5: (unused) */
521 brid microblaze_execve; /* Do real work (tail-call).*/
522 addik r8, r1, PTO; /* add user context as 4th arg */
524 C_ENTRY(sys_rt_sigreturn_wrapper):
525 swi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
526 swi r4, r1, PTO+PT_R4;
527 brlid r15, sys_rt_sigreturn /* Do real work */
528 addik r5, r1, PTO; /* add user context as 1st arg */
529 lwi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */
530 lwi r4, r1, PTO+PT_R4;
531 bri ret_from_trap /* fall through will not work here due to align */
535 * HW EXCEPTION rutine start
537 C_ENTRY(full_exception_trap):
538 /* adjust exception address for privileged instruction
539 * for finding where is it */
541 SAVE_STATE /* Save registers */
542 /* PC, before IRQ/trap - this is one instruction above */
543 swi r17, r1, PTO+PT_PC;
545 /* FIXME this can be store directly in PT_ESR reg.
546 * I tested it but there is a fault */
547 /* where the trap should return need -8 to adjust for rtsd r15, 8 */
548 addik r15, r0, ret_from_exc - 8
551 mfs r7, rfsr; /* save FSR */
553 mts rfsr, r0; /* Clear sticky fsr */
555 rted r0, full_exception
556 addik r5, r1, PTO /* parameter struct pt_regs * regs */
559 * Unaligned data trap.
561 * Unaligned data trap last on 4k page is handled here.
563 * Trap entered via exception, so EE bit is set, and interrupts
564 * are masked. This is nice, means we don't have to CLI before state save
566 * The assembler routine is in "arch/microblaze/kernel/hw_exception_handler.S"
568 C_ENTRY(unaligned_data_trap):
569 /* MS: I have to save r11 value and then restore it because
570 * set_bit, clear_eip, set_ee use r11 as temp register if MSR
571 * instructions are not used. We don't need to do if MSR instructions
572 * are used and they use r0 instead of r11.
573 * I am using ENTRY_SP which should be primary used only for stack
575 swi r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
576 set_bip; /* equalize initial state for all possible entries */
579 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
580 SAVE_STATE /* Save registers.*/
581 /* PC, before IRQ/trap - this is one instruction above */
582 swi r17, r1, PTO+PT_PC;
584 /* where the trap should return need -8 to adjust for rtsd r15, 8 */
585 addik r15, r0, ret_from_exc-8
586 mfs r3, resr /* ESR */
588 mfs r4, rear /* EAR */
590 rtbd r0, _unaligned_data_exception
591 addik r7, r1, PTO /* parameter struct pt_regs * regs */
596 * If the real exception handler (from hw_exception_handler.S) didn't find
597 * the mapping for the process, then we're thrown here to handle such situation.
599 * Trap entered via exceptions, so EE bit is set, and interrupts
600 * are masked. This is nice, means we don't have to CLI before state save
602 * Build a standard exception frame for TLB Access errors. All TLB exceptions
603 * will bail out to this point if they can't resolve the lightweight TLB fault.
605 * The C function called is in "arch/microblaze/mm/fault.c", declared as:
606 * void do_page_fault(struct pt_regs *regs,
607 * unsigned long address,
608 * unsigned long error_code)
610 /* data and intruction trap - which is choose is resolved int fault.c */
611 C_ENTRY(page_fault_data_trap):
612 SAVE_STATE /* Save registers.*/
613 /* PC, before IRQ/trap - this is one instruction above */
614 swi r17, r1, PTO+PT_PC;
616 /* where the trap should return need -8 to adjust for rtsd r15, 8 */
617 addik r15, r0, ret_from_exc-8
618 mfs r6, rear /* parameter unsigned long address */
620 mfs r7, resr /* parameter unsigned long error_code */
622 rted r0, do_page_fault
623 addik r5, r1, PTO /* parameter struct pt_regs * regs */
625 C_ENTRY(page_fault_instr_trap):
626 SAVE_STATE /* Save registers.*/
627 /* PC, before IRQ/trap - this is one instruction above */
628 swi r17, r1, PTO+PT_PC;
630 /* where the trap should return need -8 to adjust for rtsd r15, 8 */
631 addik r15, r0, ret_from_exc-8
632 mfs r6, rear /* parameter unsigned long address */
634 ori r7, r0, 0 /* parameter unsigned long error_code */
635 rted r0, do_page_fault
636 addik r5, r1, PTO /* parameter struct pt_regs * regs */
638 /* Entry point used to return from an exception. */
639 C_ENTRY(ret_from_exc):
640 lwi r11, r1, PTO + PT_MODE;
641 bnei r11, 2f; /* See if returning to kernel mode, */
642 /* ... if so, skip resched &c. */
644 /* We're returning to user mode, so check for various conditions that
645 trigger rescheduling. */
646 lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */
647 lwi r11, r11, TI_FLAGS; /* get flags in thread info */
648 andi r11, r11, _TIF_NEED_RESCHED;
651 /* Call the scheduler before returning from a syscall/trap. */
652 bralid r15, schedule; /* Call scheduler */
653 nop; /* delay slot */
655 /* Maybe handle a signal */
656 5: lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */
657 lwi r11, r11, TI_FLAGS; /* get flags in thread info */
658 andi r11, r11, _TIF_SIGPENDING;
659 beqi r11, 1f; /* Signals to handle, handle them */
662 * Handle a signal return; Pending signals should be in r18.
664 * Not all registers are saved by the normal trap/interrupt entry
665 * points (for instance, call-saved registers (because the normal
666 * C-compiler calling sequence in the kernel makes sure they're
667 * preserved), and call-clobbered registers in the case of
668 * traps), but signal handlers may want to examine or change the
669 * complete register state. Here we save anything not saved by
670 * the normal entry sequence, so that it may be safely restored
671 * (in a possibly modified form) after do_signal returns. */
672 addik r5, r1, PTO; /* Arg 1: struct pt_regs *regs */
673 addi r7, r0, 0; /* Arg 3: int in_syscall */
674 bralid r15, do_signal; /* Handle any signals */
675 add r6, r0, r0; /* Arg 2: sigset_t *oldset */
677 /* Finally, return to user state. */
678 1: set_bip; /* Ints masked for state restore */
679 swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); /* save current */
684 addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */
686 lwi r1, r1, PT_R1 - PT_SIZE; /* Restore user stack pointer. */
688 /* Return to kernel state. */
689 2: set_bip; /* Ints masked for state restore */
693 addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */
697 EXC_return: /* Make global symbol for debugging */
698 rtbd r14, 0; /* Instructions to return from an IRQ */
702 * HW EXCEPTION rutine end
706 * Hardware maskable interrupts.
708 * The stack-pointer (r1) should have already been saved to the memory
709 * location PER_CPU(ENTRY_SP).
712 /* MS: we are in physical address */
713 /* Save registers, switch to proper stack, convert SP to virtual.*/
714 swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP))
715 /* MS: See if already in kernel mode. */
721 /* Kernel-mode state save. */
722 lwi r1, r0, TOPHYS(PER_CPU(ENTRY_SP))
723 tophys(r1,r1); /* MS: I have in r1 physical address where stack is */
725 /* MS: Make room on the stack -> activation record */
726 addik r1, r1, -STATE_SAVE_SIZE;
728 swi r1, r1, PTO + PT_MODE; /* 0 - user mode, 1 - kernel mode */
730 nop; /* MS: Fill delay slot */
733 /* User-mode state save. */
734 /* MS: get the saved current */
735 lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
737 lwi r1, r1, TS_THREAD_INFO;
738 addik r1, r1, THREAD_SIZE;
741 addik r1, r1, -STATE_SAVE_SIZE;
744 swi r0, r1, PTO + PT_MODE;
745 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
746 swi r11, r1, PTO+PT_R1;
748 lwi CURRENT_TASK, r0, TOPHYS(PER_CPU(CURRENT_SAVE));
752 addik r11, r0, do_IRQ;
753 addik r15, r0, irq_call;
754 irq_call:rtbd r11, 0;
757 /* MS: we are in virtual mode */
759 lwi r11, r1, PTO + PT_MODE;
762 lwi r11, CURRENT_TASK, TS_THREAD_INFO;
763 lwi r11, r11, TI_FLAGS; /* MS: get flags from thread info */
764 andi r11, r11, _TIF_NEED_RESCHED;
766 bralid r15, schedule;
767 nop; /* delay slot */
769 /* Maybe handle a signal */
770 5: lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* MS: get thread info */
771 lwi r11, r11, TI_FLAGS; /* get flags in thread info */
772 andi r11, r11, _TIF_SIGPENDING;
773 beqid r11, no_intr_resched
774 /* Handle a signal return; Pending signals should be in r18. */
775 addi r7, r0, 0; /* Arg 3: int in_syscall */
776 addik r5, r1, PTO; /* Arg 1: struct pt_regs *regs */
777 bralid r15, do_signal; /* Handle any signals */
778 add r6, r0, r0; /* Arg 2: sigset_t *oldset */
780 /* Finally, return to user state. */
782 /* Disable interrupts, we are now committed to the state restore */
784 swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE);
788 addik r1, r1, STATE_SAVE_SIZE /* MS: Clean up stack space. */
789 lwi r1, r1, PT_R1 - PT_SIZE;
791 /* MS: Return to kernel state. */
793 #ifdef CONFIG_PREEMPT
794 lwi r11, CURRENT_TASK, TS_THREAD_INFO;
795 /* MS: get preempt_count from thread info */
796 lwi r5, r11, TI_PREEMPT_COUNT;
799 lwi r5, r11, TI_FLAGS; /* get flags in thread info */
800 andi r5, r5, _TIF_NEED_RESCHED;
801 beqi r5, restore /* if zero jump over */
804 /* interrupts are off that's why I am calling preempt_chedule_irq */
805 bralid r15, preempt_schedule_irq
807 lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */
808 lwi r5, r11, TI_FLAGS; /* get flags in thread info */
809 andi r5, r5, _TIF_NEED_RESCHED;
810 bnei r5, preempt /* if non zero jump to resched */
813 VM_OFF /* MS: turn off MMU */
816 addik r1, r1, STATE_SAVE_SIZE /* MS: Clean up stack space. */
819 IRQ_return: /* MS: Make global symbol for debugging */
825 * We enter dbtrap in "BIP" (breakpoint) mode.
826 * So we exit the breakpoint mode with an 'rtbd' and proceed with the
828 * however, wait to save state first
830 C_ENTRY(_debug_exception):
831 /* BIP bit is set on entry, no interrupts can occur */
832 swi r1, r0, TOPHYS(PER_CPU(ENTRY_SP))
838 /* Kernel-mode state save. */
839 lwi r1, r0, TOPHYS(PER_CPU(ENTRY_SP)); /* Reload kernel stack-ptr*/
842 addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */
845 swi r1, r1, PTO + PT_MODE;
847 nop; /* Fill delay slot */
848 1: /* User-mode state save. */
849 lwi r1, r0, TOPHYS(PER_CPU(CURRENT_SAVE)); /* get saved current */
851 lwi r1, r1, TS_THREAD_INFO; /* get the thread info */
852 addik r1, r1, THREAD_SIZE; /* calculate kernel stack pointer */
855 addik r1, r1, -STATE_SAVE_SIZE; /* Make room on the stack. */
858 swi r0, r1, PTO + PT_MODE; /* Was in user-mode. */
859 lwi r11, r0, TOPHYS(PER_CPU(ENTRY_SP));
860 swi r11, r1, PTO+PT_R1; /* Store user SP. */
865 addi r5, r0, SIGTRAP /* send the trap signal */
866 add r6, r0, CURRENT_TASK; /* Get current task ptr into r11 */
867 addk r7, r0, r0 /* 3rd param zero */
868 dbtrap_call: rtbd r0, send_sig;
869 addik r15, r0, dbtrap_call;
871 set_bip; /* Ints masked for state restore*/
872 lwi r11, r1, PTO + PT_MODE;
875 /* Get current task ptr into r11 */
876 lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */
877 lwi r11, r11, TI_FLAGS; /* get flags in thread info */
878 andi r11, r11, _TIF_NEED_RESCHED;
881 /* Call the scheduler before returning from a syscall/trap. */
883 bralid r15, schedule; /* Call scheduler */
884 nop; /* delay slot */
885 /* XXX Is PT_DTRACE handling needed here? */
886 /* XXX m68knommu also checks TASK_STATE & TASK_COUNTER here. */
888 /* Maybe handle a signal */
889 5: lwi r11, CURRENT_TASK, TS_THREAD_INFO; /* get thread info */
890 lwi r11, r11, TI_FLAGS; /* get flags in thread info */
891 andi r11, r11, _TIF_SIGPENDING;
892 beqi r11, 1f; /* Signals to handle, handle them */
894 /* Handle a signal return; Pending signals should be in r18. */
895 /* Not all registers are saved by the normal trap/interrupt entry
896 points (for instance, call-saved registers (because the normal
897 C-compiler calling sequence in the kernel makes sure they're
898 preserved), and call-clobbered registers in the case of
899 traps), but signal handlers may want to examine or change the
900 complete register state. Here we save anything not saved by
901 the normal entry sequence, so that it may be safely restored
902 (in a possibly modified form) after do_signal returns. */
904 addik r5, r1, PTO; /* Arg 1: struct pt_regs *regs */
905 addi r7, r0, 0; /* Arg 3: int in_syscall */
906 bralid r15, do_signal; /* Handle any signals */
907 add r6, r0, r0; /* Arg 2: sigset_t *oldset */
910 /* Finally, return to user state. */
912 swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE); /* save current */
917 addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */
920 lwi r1, r1, PT_R1 - PT_SIZE;
921 /* Restore user stack pointer. */
924 /* Return to kernel state. */
928 addik r1, r1, STATE_SAVE_SIZE /* Clean up stack space. */
932 DBTRAP_return: /* Make global symbol for debugging */
933 rtbd r14, 0; /* Instructions to return from an IRQ */
939 /* prepare return value */
940 addk r3, r0, CURRENT_TASK
942 /* save registers in cpu_context */
943 /* use r11 and r12, volatile registers, as temp register */
944 /* give start of cpu_context for previous process */
945 addik r11, r5, TI_CPU_CONTEXT
948 /* skip volatile registers.
949 * they are saved on stack when we jumped to _switch_to() */
950 /* dedicated registers */
957 /* save non-volatile registers */
970 /* special purpose registers */
984 /* update r31, the current-give me pointer to task which will be next */
985 lwi CURRENT_TASK, r6, TI_TASK
986 /* stored it to current_save too */
987 swi CURRENT_TASK, r0, PER_CPU(CURRENT_SAVE)
989 /* get new process' cpu context and restore */
990 /* give me start where start context of next task */
991 addik r11, r6, TI_CPU_CONTEXT
993 /* non-volatile registers */
1000 lwi r24, r11, CC_R24
1001 lwi r23, r11, CC_R23
1002 lwi r22, r11, CC_R22
1003 lwi r21, r11, CC_R21
1004 lwi r20, r11, CC_R20
1005 lwi r19, r11, CC_R19
1006 /* dedicated registers */
1007 lwi r18, r11, CC_R18
1008 lwi r17, r11, CC_R17
1009 lwi r16, r11, CC_R16
1010 lwi r15, r11, CC_R15
1011 lwi r14, r11, CC_R14
1012 lwi r13, r11, CC_R13
1013 /* skip volatile registers */
1017 /* special purpose registers */
1018 lwi r12, r11, CC_FSR
1021 lwi r12, r11, CC_MSR
1029 brai 0x70; /* Jump back to FS-boot */
1034 swi r5, r0, 0x250 + TOPHYS(r0_ram)
1037 swi r5, r0, 0x254 + TOPHYS(r0_ram)
1040 /* These are compiled and loaded into high memory, then
1041 * copied into place in mach_early_setup */
1042 .section .init.ivt, "ax"
1044 /* this is very important - here is the reset vector */
1045 /* in current MMU branch you don't care what is here - it is
1046 * used from bootloader site - but this is correct for FS-BOOT */
1049 brai TOPHYS(_user_exception); /* syscall handler */
1050 brai TOPHYS(_interrupt); /* Interrupt handler */
1051 brai TOPHYS(_break); /* nmi trap handler */
1052 brai TOPHYS(_hw_exception_handler); /* HW exception handler */
1055 brai TOPHYS(_debug_exception); /* debug trap handler*/
1057 .section .rodata,"a"
1058 #include "syscall_table.S"
1060 syscall_table_size=(.-sys_call_table)
1067 .ascii "IRQ (PREEMPTED)\0"
1068 type_SYSCALL_PREEMPT:
1069 .ascii " SYSCALL (PREEMPTED)\0"
1072 * Trap decoding for stack unwinder
1073 * Tuples are (start addr, end addr, string)
1074 * If return address lies on [start addr, end addr],
1075 * unwinder displays 'string'
1079 .global microblaze_trap_handlers
1080 microblaze_trap_handlers:
1081 /* Exact matches come first */
1082 .word ret_from_trap; .word ret_from_trap ; .word type_SYSCALL
1083 .word ret_from_irq ; .word ret_from_irq ; .word type_IRQ
1084 /* Fuzzy matches go here */
1085 .word ret_from_irq ; .word no_intr_resched ; .word type_IRQ_PREEMPT
1086 .word ret_from_trap; .word TRAP_return ; .word type_SYSCALL_PREEMPT
1088 .word 0 ; .word 0 ; .word 0