arch/mips/alchemy/devboards/pb1200/board_setup.c

   1 /*
   2  *
   3  * BRIEF MODULE DESCRIPTION
   4  *      Alchemy Pb1200/Db1200 board setup.
   5  *
   6  *  This program is free software; you can redistribute  it and/or modify it
   7  *  under  the terms of  the GNU General  Public License as published by the
   8  *  Free Software Foundation;  either version 2 of the  License, or (at your
   9  *  option) any later version.
  10  *
  11  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
  12  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  13  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  14  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
  15  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  16  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  17  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  18  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  19  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  20  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  21  *
  22  *  You should have received a copy of the  GNU General Public License along
  23  *  with this program; if not, write  to the Free Software Foundation, Inc.,
  24  *  675 Mass Ave, Cambridge, MA 02139, USA.
  25  */
  26
  27 #include <linux/init.h>
  28 #include <linux/interrupt.h>
  29 #include <linux/sched.h>
  30
  31 #include <asm/mach-au1x00/au1000.h>
  32 #include <asm/mach-db1x00/bcsr.h>
  33
  34 #ifdef CONFIG_MIPS_PB1200
  35 #include <asm/mach-pb1x00/pb1200.h>
  36 #endif
  37
  38 #ifdef CONFIG_MIPS_DB1200
  39 #include <asm/mach-db1x00/db1200.h>
  40 #define PB1200_INT_BEGIN DB1200_INT_BEGIN
  41 #define PB1200_INT_END DB1200_INT_END
  42 #endif
  43
  44 #include <prom.h>
  45
  46 const char *get_system_type(void)
  47 {
  48         return "Alchemy Pb1200";
  49 }
  50
  51 void board_reset(void)
  52 {
  53         bcsr_write(BCSR_RESETS, 0);
  54         bcsr_write(BCSR_SYSTEM, 0);
  55 }
  56
  57 void __init board_setup(void)
  58 {
  59         char *argptr;
  60
  61 #ifdef CONFIG_MIPS_PB1200
  62         printk(KERN_INFO "AMD Alchemy Pb1200 Board\n");
  63         bcsr_init(PB1200_BCSR_PHYS_ADDR,
  64                   PB1200_BCSR_PHYS_ADDR + PB1200_BCSR_HEXLED_OFS);
  65 #endif
  66 #ifdef CONFIG_MIPS_DB1200
  67         printk(KERN_INFO "AMD Alchemy Db1200 Board\n");
  68         bcsr_init(DB1200_BCSR_PHYS_ADDR,
  69                   DB1200_BCSR_PHYS_ADDR + DB1200_BCSR_HEXLED_OFS);
  70 #endif
  71
  72         argptr = prom_getcmdline();
  73 #ifdef CONFIG_SERIAL_8250_CONSOLE
  74         argptr = strstr(argptr, "console=");
  75         if (argptr == NULL) {
  76                 argptr = prom_getcmdline();
  77                 strcat(argptr, " console=ttyS0,115200");
  78         }
  79 #endif
  80 #ifdef CONFIG_FB_AU1200
  81         strcat(argptr, " video=au1200fb:panel:bs");
  82 #endif
  83
  84 #if 0
  85         {
  86                 u32 pin_func;
  87
  88                 /*
  89                  * Enable PSC1 SYNC for AC97.  Normaly done in audio driver,
  90                  * but it is board specific code, so put it here.
  91                  */
  92                 pin_func = au_readl(SYS_PINFUNC);
  93                 au_sync();
  94                 pin_func |= SYS_PF_MUST_BE_SET | SYS_PF_PSC1_S1;
  95                 au_writel(pin_func, SYS_PINFUNC);
  96
  97                 au_writel(0, (u32)bcsr | 0x10); /* turn off PCMCIA power */
  98                 au_sync();
  99         }
 100 #endif
 101
 102 #if defined(CONFIG_I2C_AU1550)
 103         {
 104                 u32 freq0, clksrc;
 105                 u32 pin_func;
 106
 107                 /* Select SMBus in CPLD */
 108                 bcsr_mod(BCSR_RESETS, BCSR_RESETS_PSC0MUX, 0);
 109
 110                 pin_func = au_readl(SYS_PINFUNC);
 111                 au_sync();
 112                 pin_func &= ~(SYS_PINFUNC_P0A | SYS_PINFUNC_P0B);
 113                 /* Set GPIOs correctly */
 114                 pin_func |= 2 << 17;
 115                 au_writel(pin_func, SYS_PINFUNC);
 116                 au_sync();
 117
 118                 /* The I2C driver depends on 50 MHz clock */
 119                 freq0 = au_readl(SYS_FREQCTRL0);
 120                 au_sync();
 121                 freq0 &= ~(SYS_FC_FRDIV1_MASK | SYS_FC_FS1 | SYS_FC_FE1);
 122                 freq0 |= 3 << SYS_FC_FRDIV1_BIT;
 123                 /* 396 MHz / (3 + 1) * 2 == 49.5 MHz */
 124                 au_writel(freq0, SYS_FREQCTRL0);
 125                 au_sync();
 126                 freq0 |= SYS_FC_FE1;
 127                 au_writel(freq0, SYS_FREQCTRL0);
 128                 au_sync();
 129
 130                 clksrc = au_readl(SYS_CLKSRC);
 131                 au_sync();
 132                 clksrc &= ~(SYS_CS_CE0 | SYS_CS_DE0 | SYS_CS_ME0_MASK);
 133                 /* Bit 22 is EXTCLK0 for PSC0 */
 134                 clksrc |= SYS_CS_MUX_FQ1 << SYS_CS_ME0_BIT;
 135                 au_writel(clksrc, SYS_CLKSRC);
 136                 au_sync();
 137         }
 138 #endif
 139
 140         /*
 141          * The Pb1200 development board uses external MUX for PSC0 to
 142          * support SMB/SPI. bcsr_resets bit 12: 0=SMB 1=SPI
 143          */
 144 #ifdef CONFIG_I2C_AU1550
 145         bcsr_mod(BCSR_RESETS, BCSR_RESETS_PSC0MUX, 0);
 146 #endif
 147         au_sync();
 148 }
 149
 150 static int __init pb1200_init_irq(void)
 151 {
 152 #ifdef CONFIG_MIPS_PB1200
 153         /* We have a problem with CPLD rev 3. */
 154         if (BCSR_WHOAMI_CPLD(bcsr_read(BCSR_WHOAMI)) <= 3) {
 155                 printk(KERN_ERR "WARNING!!!\n");
 156                 printk(KERN_ERR "WARNING!!!\n");
 157                 printk(KERN_ERR "WARNING!!!\n");
 158                 printk(KERN_ERR "WARNING!!!\n");
 159                 printk(KERN_ERR "WARNING!!!\n");
 160                 printk(KERN_ERR "WARNING!!!\n");
 161                 printk(KERN_ERR "Pb1200 must be at CPLD rev 4. Please have Pb1200\n");
 162                 printk(KERN_ERR "updated to latest revision. This software will\n");
 163                 printk(KERN_ERR "not work on anything less than CPLD rev 4.\n");
 164                 printk(KERN_ERR "WARNING!!!\n");
 165                 printk(KERN_ERR "WARNING!!!\n");
 166                 printk(KERN_ERR "WARNING!!!\n");
 167                 printk(KERN_ERR "WARNING!!!\n");
 168                 printk(KERN_ERR "WARNING!!!\n");
 169                 printk(KERN_ERR "WARNING!!!\n");
 170                 panic("Game over.  Your score is 0.");
 171         }
 172 #endif
 173
 174         set_irq_type(AU1000_GPIO_7, IRQF_TRIGGER_LOW);
 175         bcsr_init_irq(PB1200_INT_BEGIN, PB1200_INT_END, AU1000_GPIO_7);
 176
 177         return 0;
 178 }
 179 arch_initcall(pb1200_init_irq);
 180
 181
 182 int board_au1200fb_panel(void)
 183 {
 184         return (bcsr_read(BCSR_SWITCHES) >> 8) & 0x0f;
 185 }
 186
 187 int board_au1200fb_panel_init(void)
 188 {
 189         /* Apply power */
 190         bcsr_mod(BCSR_BOARD, 0, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD |
 191                                 BCSR_BOARD_LCDBL);
 192         /* printk(KERN_DEBUG "board_au1200fb_panel_init()\n"); */
 193         return 0;
 194 }
 195
 196 int board_au1200fb_panel_shutdown(void)
 197 {
 198         /* Remove power */
 199         bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD |
 200                              BCSR_BOARD_LCDBL, 0);
 201         /* printk(KERN_DEBUG "board_au1200fb_panel_shutdown()\n"); */
 202         return 0;
 203 }