arch/mips/alchemy/mtx-1/board_setup.c

   1 /*
   2  *
   3  * BRIEF MODULE DESCRIPTION
   4  *      4G Systems MTX-1 board setup.
   5  *
   6  * Copyright 2003, 2008 MontaVista Software Inc.
   7  * Author: MontaVista Software, Inc. <source@mvista.com>
   8  *         Bruno Randolf <bruno.randolf@4g-systems.biz>
   9  *
  10  *  This program is free software; you can redistribute  it and/or modify it
  11  *  under  the terms of  the GNU General  Public License as published by the
  12  *  Free Software Foundation;  either version 2 of the  License, or (at your
  13  *  option) any later version.
  14  *
  15  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
  16  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  17  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  18  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
  19  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  20  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
  21  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  22  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  23  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  24  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  25  *
  26  *  You should have received a copy of the  GNU General Public License along
  27  *  with this program; if not, write  to the Free Software Foundation, Inc.,
  28  *  675 Mass Ave, Cambridge, MA 02139, USA.
  29  */
  30
  31 #include <linux/gpio.h>
  32 #include <linux/init.h>
  33 #include <linux/interrupt.h>
  34
  35 #include <asm/mach-au1x00/au1000.h>
  36
  37 #include <prom.h>
  38
  39 char irq_tab_alchemy[][5] __initdata = {
  40         [0] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTA, 0xff, 0xff }, /* IDSEL 00 - AdapterA-Slot0 (top) */
  41         [1] = { -1, AU1500_PCI_INTB, AU1500_PCI_INTA, 0xff, 0xff }, /* IDSEL 01 - AdapterA-Slot1 (bottom) */
  42         [2] = { -1, AU1500_PCI_INTC, AU1500_PCI_INTD, 0xff, 0xff }, /* IDSEL 02 - AdapterB-Slot0 (top) */
  43         [3] = { -1, AU1500_PCI_INTD, AU1500_PCI_INTC, 0xff, 0xff }, /* IDSEL 03 - AdapterB-Slot1 (bottom) */
  44         [4] = { -1, AU1500_PCI_INTA, AU1500_PCI_INTB, 0xff, 0xff }, /* IDSEL 04 - AdapterC-Slot0 (top) */
  45         [5] = { -1, AU1500_PCI_INTB, AU1500_PCI_INTA, 0xff, 0xff }, /* IDSEL 05 - AdapterC-Slot1 (bottom) */
  46         [6] = { -1, AU1500_PCI_INTC, AU1500_PCI_INTD, 0xff, 0xff }, /* IDSEL 06 - AdapterD-Slot0 (top) */
  47         [7] = { -1, AU1500_PCI_INTD, AU1500_PCI_INTC, 0xff, 0xff }, /* IDSEL 07 - AdapterD-Slot1 (bottom) */
  48 };
  49
  50 extern int (*board_pci_idsel)(unsigned int devsel, int assert);
  51 int mtx1_pci_idsel(unsigned int devsel, int assert);
  52
  53 void board_reset(void)
  54 {
  55         /* Hit BCSR.SYSTEM_CONTROL[SW_RST] */
  56         au_writel(0x00000000, 0xAE00001C);
  57 }
  58
  59 void __init board_setup(void)
  60 {
  61 #ifdef CONFIG_SERIAL_8250_CONSOLE
  62         char *argptr;
  63         argptr = prom_getcmdline();
  64         argptr = strstr(argptr, "console=");
  65         if (argptr == NULL) {
  66                 argptr = prom_getcmdline();
  67                 strcat(argptr, " console=ttyS0,115200");
  68         }
  69 #endif
  70
  71         alchemy_gpio2_enable();
  72
  73 #if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
  74         /* Enable USB power switch */
  75         alchemy_gpio_direction_output(204, 0);
  76 #endif /* defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) */
  77
  78 #ifdef CONFIG_PCI
  79 #if defined(__MIPSEB__)
  80         au_writel(0xf | (2 << 6) | (1 << 4), Au1500_PCI_CFG);
  81 #else
  82         au_writel(0xf, Au1500_PCI_CFG);
  83 #endif
  84         board_pci_idsel = mtx1_pci_idsel;
  85 #endif
  86
  87         /* Initialize sys_pinfunc */
  88         au_writel(SYS_PF_NI2, SYS_PINFUNC);
  89
  90         /* Initialize GPIO */
  91         au_writel(0xFFFFFFFF, SYS_TRIOUTCLR);
  92         alchemy_gpio_direction_output(0, 0);    /* Disable M66EN (PCI 66MHz) */
  93         alchemy_gpio_direction_output(3, 1);    /* Disable PCI CLKRUN# */
  94         alchemy_gpio_direction_output(1, 1);    /* Enable EXT_IO3 */
  95         alchemy_gpio_direction_output(5, 0);    /* Disable eth PHY TX_ER */
  96
  97         /* Enable LED and set it to green */
  98         alchemy_gpio_direction_output(211, 1);  /* green on */
  99         alchemy_gpio_direction_output(212, 0);  /* red off */
 100
 101         printk(KERN_INFO "4G Systems MTX-1 Board\n");
 102 }
 103
 104 int
 105 mtx1_pci_idsel(unsigned int devsel, int assert)
 106 {
 107 #define MTX_IDSEL_ONLY_0_AND_3 0
 108 #if MTX_IDSEL_ONLY_0_AND_3
 109         if (devsel != 0 && devsel != 3) {
 110                 printk(KERN_ERR "*** not 0 or 3\n");
 111                 return 0;
 112         }
 113 #endif
 114
 115         if (assert && devsel != 0)
 116                 /* Suppress signal to Cardbus */
 117                 gpio_set_value(1, 0);   /* set EXT_IO3 OFF */
 118         else
 119                 gpio_set_value(1, 1);   /* set EXT_IO3 ON */
 120
 121         au_sync_udelay(1);
 122         return 1;
 123 }
 124
 125 static int __init mtx1_init_irq(void)
 126 {
 127         set_irq_type(AU1500_GPIO204_INT, IRQF_TRIGGER_HIGH);
 128         set_irq_type(AU1500_GPIO201_INT, IRQF_TRIGGER_LOW);
 129         set_irq_type(AU1500_GPIO202_INT, IRQF_TRIGGER_LOW);
 130         set_irq_type(AU1500_GPIO203_INT, IRQF_TRIGGER_LOW);
 131         set_irq_type(AU1500_GPIO205_INT, IRQF_TRIGGER_LOW);
 132
 133         return 0;
 134 }
 135 arch_initcall(mtx1_init_irq);