arch/mips/kernel/smp.c

   1 /*
   2  * This program is free software; you can redistribute it and/or
   3  * modify it under the terms of the GNU General Public License
   4  * as published by the Free Software Foundation; either version 2
   5  * of the License, or (at your option) any later version.
   6  *
   7  * This program is distributed in the hope that it will be useful,
   8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  * GNU General Public License for more details.
  11  *
  12  * You should have received a copy of the GNU General Public License
  13  * along with this program; if not, write to the Free Software
  14  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  15  *
  16  * Copyright (C) 2000, 2001 Kanoj Sarcar
  17  * Copyright (C) 2000, 2001 Ralf Baechle
  18  * Copyright (C) 2000, 2001 Silicon Graphics, Inc.
  19  * Copyright (C) 2000, 2001, 2003 Broadcom Corporation
  20  */
  21 #include <linux/cache.h>
  22 #include <linux/delay.h>
  23 #include <linux/init.h>
  24 #include <linux/interrupt.h>
  25 #include <linux/smp.h>
  26 #include <linux/spinlock.h>
  27 #include <linux/threads.h>
  28 #include <linux/module.h>
  29 #include <linux/time.h>
  30 #include <linux/timex.h>
  31 #include <linux/sched.h>
  32 #include <linux/cpumask.h>
  33 #include <linux/cpu.h>
  34 #include <linux/err.h>
  35 #include <linux/ftrace.h>
  36
  37 #include <linux/atomic.h>
  38 #include <asm/cpu.h>
  39 #include <asm/processor.h>
  40 #include <asm/r4k-timer.h>
  41 #include <asm/mmu_context.h>
  42 #include <asm/time.h>
  43 #include <asm/setup.h>
  44
  45 #ifdef CONFIG_MIPS_MT_SMTC
  46 #include <asm/mipsmtregs.h>
  47 #endif /* CONFIG_MIPS_MT_SMTC */
  48
  49 volatile cpumask_t cpu_callin_map;      /* Bitmask of started secondaries */
  50
  51 int __cpu_number_map[NR_CPUS];          /* Map physical to logical */
  52 EXPORT_SYMBOL(__cpu_number_map);
  53
  54 int __cpu_logical_map[NR_CPUS];         /* Map logical to physical */
  55 EXPORT_SYMBOL(__cpu_logical_map);
  56
  57 /* Number of TCs (or siblings in Intel speak) per CPU core */
  58 int smp_num_siblings = 1;
  59 EXPORT_SYMBOL(smp_num_siblings);
  60
  61 /* representing the TCs (or siblings in Intel speak) of each logical CPU */
  62 cpumask_t cpu_sibling_map[NR_CPUS] __read_mostly;
  63 EXPORT_SYMBOL(cpu_sibling_map);
  64
  65 /* representing cpus for which sibling maps can be computed */
  66 static cpumask_t cpu_sibling_setup_map;
  67
  68 static inline void set_cpu_sibling_map(int cpu)
  69 {
  70         int i;
  71
  72         cpu_set(cpu, cpu_sibling_setup_map);
  73
  74         if (smp_num_siblings > 1) {
  75                 for_each_cpu_mask(i, cpu_sibling_setup_map) {
  76                         if (cpu_data[cpu].core == cpu_data[i].core) {
  77                                 cpu_set(i, cpu_sibling_map[cpu]);
  78                                 cpu_set(cpu, cpu_sibling_map[i]);
  79                         }
  80                 }
  81         } else
  82                 cpu_set(cpu, cpu_sibling_map[cpu]);
  83 }
  84
  85 struct plat_smp_ops *mp_ops;
  86
  87 __cpuinit void register_smp_ops(struct plat_smp_ops *ops)
  88 {
  89         if (mp_ops)
  90                 printk(KERN_WARNING "Overriding previously set SMP ops\n");
  91
  92         mp_ops = ops;
  93 }
  94
  95 /*
  96  * First C code run on the secondary CPUs after being started up by
  97  * the master.
  98  */
  99 asmlinkage __cpuinit void start_secondary(void)
 100 {
 101         unsigned int cpu;
 102
 103 #ifdef CONFIG_MIPS_MT_SMTC
 104         /* Only do cpu_probe for first TC of CPU */
 105         if ((read_c0_tcbind() & TCBIND_CURTC) == 0)
 106 #endif /* CONFIG_MIPS_MT_SMTC */
 107         cpu_probe();
 108         cpu_report();
 109         per_cpu_trap_init(false);
 110         mips_clockevent_init();
 111         mp_ops->init_secondary();
 112
 113         /*
 114          * XXX parity protection should be folded in here when it's converted
 115          * to an option instead of something based on .cputype
 116          */
 117
 118         calibrate_delay();
 119         preempt_disable();
 120         cpu = smp_processor_id();
 121         cpu_data[cpu].udelay_val = loops_per_jiffy;
 122
 123         notify_cpu_starting(cpu);
 124
 125         mp_ops->smp_finish();
 126         set_cpu_sibling_map(cpu);
 127
 128         cpu_set(cpu, cpu_callin_map);
 129
 130         synchronise_count_slave();
 131
 132         cpu_idle();
 133 }
 134
 135 /*
 136  * Call into both interrupt handlers, as we share the IPI for them
 137  */
 138 void __irq_entry smp_call_function_interrupt(void)
 139 {
 140         irq_enter();
 141         generic_smp_call_function_single_interrupt();
 142         generic_smp_call_function_interrupt();
 143         irq_exit();
 144 }
 145
 146 static void stop_this_cpu(void *dummy)
 147 {
 148         /*
 149          * Remove this CPU:
 150          */
 151         set_cpu_online(smp_processor_id(), false);
 152         for (;;) {
 153                 if (cpu_wait)
 154                         (*cpu_wait)();          /* Wait if available. */
 155         }
 156 }
 157
 158 void smp_send_stop(void)
 159 {
 160         smp_call_function(stop_this_cpu, NULL, 0);
 161 }
 162
 163 void __init smp_cpus_done(unsigned int max_cpus)
 164 {
 165         mp_ops->cpus_done();
 166         synchronise_count_master();
 167 }
 168
 169 /* called from main before smp_init() */
 170 void __init smp_prepare_cpus(unsigned int max_cpus)
 171 {
 172         init_new_context(current, &init_mm);
 173         current_thread_info()->cpu = 0;
 174         mp_ops->prepare_cpus(max_cpus);
 175         set_cpu_sibling_map(0);
 176 #ifndef CONFIG_HOTPLUG_CPU
 177         init_cpu_present(cpu_possible_mask);
 178 #endif
 179 }
 180
 181 /* preload SMP state for boot cpu */
 182 void __devinit smp_prepare_boot_cpu(void)
 183 {
 184         set_cpu_possible(0, true);
 185         set_cpu_online(0, true);
 186         cpu_set(0, cpu_callin_map);
 187 }
 188
 189 int __cpuinit __cpu_up(unsigned int cpu, struct task_struct *tidle)
 190 {
 191         mp_ops->boot_secondary(cpu, tidle);
 192
 193         /*
 194          * Trust is futile.  We should really have timeouts ...
 195          */
 196         while (!cpu_isset(cpu, cpu_callin_map))
 197                 udelay(100);
 198
 199         set_cpu_online(cpu, true);
 200
 201         return 0;
 202 }
 203
 204 /* Not really SMP stuff ... */
 205 int setup_profiling_timer(unsigned int multiplier)
 206 {
 207         return 0;
 208 }
 209
 210 static void flush_tlb_all_ipi(void *info)
 211 {
 212         local_flush_tlb_all();
 213 }
 214
 215 void flush_tlb_all(void)
 216 {
 217         on_each_cpu(flush_tlb_all_ipi, NULL, 1);
 218 }
 219
 220 static void flush_tlb_mm_ipi(void *mm)
 221 {
 222         local_flush_tlb_mm((struct mm_struct *)mm);
 223 }
 224
 225 /*
 226  * Special Variant of smp_call_function for use by TLB functions:
 227  *
 228  *  o No return value
 229  *  o collapses to normal function call on UP kernels
 230  *  o collapses to normal function call on systems with a single shared
 231  *    primary cache.
 232  *  o CONFIG_MIPS_MT_SMTC currently implies there is only one physical core.
 233  */
 234 static inline void smp_on_other_tlbs(void (*func) (void *info), void *info)
 235 {
 236 #ifndef CONFIG_MIPS_MT_SMTC
 237         smp_call_function(func, info, 1);
 238 #endif
 239 }
 240
 241 static inline void smp_on_each_tlb(void (*func) (void *info), void *info)
 242 {
 243         preempt_disable();
 244
 245         smp_on_other_tlbs(func, info);
 246         func(info);
 247
 248         preempt_enable();
 249 }
 250
 251 /*
 252  * The following tlb flush calls are invoked when old translations are
 253  * being torn down, or pte attributes are changing. For single threaded
 254  * address spaces, a new context is obtained on the current cpu, and tlb
 255  * context on other cpus are invalidated to force a new context allocation
 256  * at switch_mm time, should the mm ever be used on other cpus. For
 257  * multithreaded address spaces, intercpu interrupts have to be sent.
 258  * Another case where intercpu interrupts are required is when the target
 259  * mm might be active on another cpu (eg debuggers doing the flushes on
 260  * behalf of debugees, kswapd stealing pages from another process etc).
 261  * Kanoj 07/00.
 262  */
 263
 264 void flush_tlb_mm(struct mm_struct *mm)
 265 {
 266         preempt_disable();
 267
 268         if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
 269                 smp_on_other_tlbs(flush_tlb_mm_ipi, mm);
 270         } else {
 271                 unsigned int cpu;
 272
 273                 for_each_online_cpu(cpu) {
 274                         if (cpu != smp_processor_id() && cpu_context(cpu, mm))
 275                                 cpu_context(cpu, mm) = 0;
 276                 }
 277         }
 278         local_flush_tlb_mm(mm);
 279
 280         preempt_enable();
 281 }
 282
 283 struct flush_tlb_data {
 284         struct vm_area_struct *vma;
 285         unsigned long addr1;
 286         unsigned long addr2;
 287 };
 288
 289 static void flush_tlb_range_ipi(void *info)
 290 {
 291         struct flush_tlb_data *fd = info;
 292
 293         local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2);
 294 }
 295
 296 void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
 297 {
 298         struct mm_struct *mm = vma->vm_mm;
 299
 300         preempt_disable();
 301         if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) {
 302                 struct flush_tlb_data fd = {
 303                         .vma = vma,
 304                         .addr1 = start,
 305                         .addr2 = end,
 306                 };
 307
 308                 smp_on_other_tlbs(flush_tlb_range_ipi, &fd);
 309         } else {
 310                 unsigned int cpu;
 311
 312                 for_each_online_cpu(cpu) {
 313                         if (cpu != smp_processor_id() && cpu_context(cpu, mm))
 314                                 cpu_context(cpu, mm) = 0;
 315                 }
 316         }
 317         local_flush_tlb_range(vma, start, end);
 318         preempt_enable();
 319 }
 320
 321 static void flush_tlb_kernel_range_ipi(void *info)
 322 {
 323         struct flush_tlb_data *fd = info;
 324
 325         local_flush_tlb_kernel_range(fd->addr1, fd->addr2);
 326 }
 327
 328 void flush_tlb_kernel_range(unsigned long start, unsigned long end)
 329 {
 330         struct flush_tlb_data fd = {
 331                 .addr1 = start,
 332                 .addr2 = end,
 333         };
 334
 335         on_each_cpu(flush_tlb_kernel_range_ipi, &fd, 1);
 336 }
 337
 338 static void flush_tlb_page_ipi(void *info)
 339 {
 340         struct flush_tlb_data *fd = info;
 341
 342         local_flush_tlb_page(fd->vma, fd->addr1);
 343 }
 344
 345 void flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
 346 {
 347         preempt_disable();
 348         if ((atomic_read(&vma->vm_mm->mm_users) != 1) || (current->mm != vma->vm_mm)) {
 349                 struct flush_tlb_data fd = {
 350                         .vma = vma,
 351                         .addr1 = page,
 352                 };
 353
 354                 smp_on_other_tlbs(flush_tlb_page_ipi, &fd);
 355         } else {
 356                 unsigned int cpu;
 357
 358                 for_each_online_cpu(cpu) {
 359                         if (cpu != smp_processor_id() && cpu_context(cpu, vma->vm_mm))
 360                                 cpu_context(cpu, vma->vm_mm) = 0;
 361                 }
 362         }
 363         local_flush_tlb_page(vma, page);
 364         preempt_enable();
 365 }
 366
 367 static void flush_tlb_one_ipi(void *info)
 368 {
 369         unsigned long vaddr = (unsigned long) info;
 370
 371         local_flush_tlb_one(vaddr);
 372 }
 373
 374 void flush_tlb_one(unsigned long vaddr)
 375 {
 376         smp_on_each_tlb(flush_tlb_one_ipi, (void *) vaddr);
 377 }
 378
 379 EXPORT_SYMBOL(flush_tlb_page);
 380 EXPORT_SYMBOL(flush_tlb_one);