arch/mips/math-emu/sp_fdp.c

   1 /* IEEE754 floating point arithmetic
   2  * single precision
   3  */
   4 /*
   5  * MIPS floating point support
   6  * Copyright (C) 1994-2000 Algorithmics Ltd.
   7  *
   8  *  This program is free software; you can distribute it and/or modify it
   9  *  under the terms of the GNU General Public License (Version 2) as
  10  *  published by the Free Software Foundation.
  11  *
  12  *  This program is distributed in the hope it will be useful, but WITHOUT
  13  *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14  *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  15  *  for more details.
  16  *
  17  *  You should have received a copy of the GNU General Public License along
  18  *  with this program; if not, write to the Free Software Foundation, Inc.,
  19  *  51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA.
  20  */
  21
  22 #include "ieee754sp.h"
  23 #include "ieee754dp.h"
  24
  25 union ieee754sp ieee754sp_fdp(union ieee754dp x)
  26 {
  27         u32 rm;
  28
  29         COMPXDP;
  30         union ieee754sp nan;
  31
  32         EXPLODEXDP;
  33
  34         ieee754_clearcx();
  35
  36         FLUSHXDP;
  37
  38         switch (xc) {
  39         case IEEE754_CLASS_SNAN:
  40                 ieee754_setcx(IEEE754_INVALID_OPERATION);
  41                 return ieee754sp_nanxcpt(ieee754sp_indef());
  42
  43         case IEEE754_CLASS_QNAN:
  44                 nan = buildsp(xs, SP_EMAX + 1 + SP_EBIAS, (u32)
  45                                 (xm >> (DP_FBITS - SP_FBITS)));
  46                 if (!ieee754sp_isnan(nan))
  47                         nan = ieee754sp_indef();
  48                 return ieee754sp_nanxcpt(nan);
  49
  50         case IEEE754_CLASS_INF:
  51                 return ieee754sp_inf(xs);
  52
  53         case IEEE754_CLASS_ZERO:
  54                 return ieee754sp_zero(xs);
  55
  56         case IEEE754_CLASS_DNORM:
  57                 /* can't possibly be sp representable */
  58                 ieee754_setcx(IEEE754_UNDERFLOW);
  59                 ieee754_setcx(IEEE754_INEXACT);
  60                 if ((ieee754_csr.rm == FPU_CSR_RU && !xs) ||
  61                                 (ieee754_csr.rm == FPU_CSR_RD && xs))
  62                         return ieee754sp_mind(xs);
  63                 return ieee754sp_zero(xs);
  64
  65         case IEEE754_CLASS_NORM:
  66                 break;
  67         }
  68
  69         /*
  70          * Convert from DP_FBITS to SP_FBITS+3 with sticky right shift.
  71          */
  72         rm = (xm >> (DP_FBITS - (SP_FBITS + 3))) |
  73              ((xm << (64 - (DP_FBITS - (SP_FBITS + 3)))) != 0);
  74
  75         return ieee754sp_format(xs, xe, rm);
  76 }