Merge with /pub/scm/linux/kernel/git/torvalds/linux-2.6.git
[deliverable/linux.git] / arch / parisc / kernel / vmlinux.lds.S
1 /* Kernel link layout for various "sections"
2 *
3 * Copyright (C) 1999-2003 Matthew Wilcox <willy at parisc-linux.org>
4 * Copyright (C) 2000-2003 Paul Bame <bame at parisc-linux.org>
5 * Copyright (C) 2000 John Marvin <jsm at parisc-linux.org>
6 * Copyright (C) 2000 Michael Ang <mang with subcarrier.org>
7 * Copyright (C) 2002 Randolph Chung <tausq with parisc-linux.org>
8 * Copyright (C) 2003 James Bottomley <jejb with parisc-linux.org>
9 *
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 */
25 #include <linux/config.h>
26 #include <asm-generic/vmlinux.lds.h>
27 /* needed for the processor specific cache alignment size */
28 #include <asm/cache.h>
29 #include <asm/page.h>
30
31 /* ld script to make hppa Linux kernel */
32 #ifndef CONFIG_64BIT
33 OUTPUT_FORMAT("elf32-hppa-linux")
34 OUTPUT_ARCH(hppa)
35 #else
36 OUTPUT_FORMAT("elf64-hppa-linux")
37 OUTPUT_ARCH(hppa:hppa2.0w)
38 #endif
39
40 ENTRY(_stext)
41 #ifndef CONFIG_64BIT
42 jiffies = jiffies_64 + 4;
43 #else
44 jiffies = jiffies_64;
45 #endif
46 SECTIONS
47 {
48
49 . = KERNEL_BINARY_TEXT_START;
50
51 _text = .; /* Text and read-only data */
52 .text ALIGN(16) : {
53 *(.text)
54 SCHED_TEXT
55 LOCK_TEXT
56 *(.text.do_softirq)
57 *(.text.sys_exit)
58 *(.text.do_sigaltstack)
59 *(.text.do_fork)
60 *(.text.*)
61 *(.fixup)
62 *(.lock.text) /* out-of-line lock text */
63 *(.gnu.warning)
64 } = 0
65
66 _etext = .; /* End of text section */
67
68 RODATA
69
70 /* writeable */
71 . = ALIGN(4096); /* Make sure this is page aligned so
72 that we can properly leave these
73 as writable */
74 data_start = .;
75
76 . = ALIGN(16); /* Exception table */
77 __start___ex_table = .;
78 __ex_table : { *(__ex_table) }
79 __stop___ex_table = .;
80
81 __start___unwind = .; /* unwind info */
82 .PARISC.unwind : { *(.PARISC.unwind) }
83 __stop___unwind = .;
84
85 .data : { /* Data */
86 *(.data)
87 *(.data.vm0.pmd)
88 *(.data.vm0.pgd)
89 *(.data.vm0.pte)
90 CONSTRUCTORS
91 }
92
93 . = ALIGN(4096);
94 /* nosave data is really only used for software suspend...it's here
95 * just in case we ever implement it */
96 __nosave_begin = .;
97 .data_nosave : { *(.data.nosave) }
98 . = ALIGN(4096);
99 __nosave_end = .;
100
101 . = ALIGN(L1_CACHE_BYTES);
102 .data.cacheline_aligned : { *(.data.cacheline_aligned) }
103
104 /* PA-RISC locks requires 16-byte alignment */
105 . = ALIGN(16);
106 .data.lock_aligned : { *(.data.lock_aligned) }
107
108 /* rarely changed data like cpu maps */
109 . = ALIGN(16);
110 .data.read_mostly : { *(.data.read_mostly) }
111
112 _edata = .; /* End of data section */
113
114 . = ALIGN(16384); /* init_task */
115 .data.init_task : { *(.data.init_task) }
116
117 /* The interrupt stack is currently partially coded, but not yet
118 * implemented */
119 . = ALIGN(16384);
120 init_istack : { *(init_istack) }
121
122 #ifdef CONFIG_64BIT
123 . = ALIGN(16); /* Linkage tables */
124 .opd : { *(.opd) } PROVIDE (__gp = .);
125 .plt : { *(.plt) }
126 .dlt : { *(.dlt) }
127 #endif
128
129 . = ALIGN(16384);
130 __init_begin = .;
131 .init.text : {
132 _sinittext = .;
133 *(.init.text)
134 _einittext = .;
135 }
136 .init.data : { *(.init.data) }
137 . = ALIGN(16);
138 __setup_start = .;
139 .init.setup : { *(.init.setup) }
140 __setup_end = .;
141 __initcall_start = .;
142 .initcall.init : {
143 *(.initcall1.init)
144 *(.initcall2.init)
145 *(.initcall3.init)
146 *(.initcall4.init)
147 *(.initcall5.init)
148 *(.initcall6.init)
149 *(.initcall7.init)
150 }
151 __initcall_end = .;
152 __con_initcall_start = .;
153 .con_initcall.init : { *(.con_initcall.init) }
154 __con_initcall_end = .;
155 SECURITY_INIT
156 /* alternate instruction replacement. This is a mechanism x86 uses
157 * to detect the CPU type and replace generic instruction sequences
158 * with CPU specific ones. We don't currently do this in PA, but
159 * it seems like a good idea... */
160 . = ALIGN(4);
161 __alt_instructions = .;
162 .altinstructions : { *(.altinstructions) }
163 __alt_instructions_end = .;
164 .altinstr_replacement : { *(.altinstr_replacement) }
165 /* .exit.text is discard at runtime, not link time, to deal with references
166 from .altinstructions and .eh_frame */
167 .exit.text : { *(.exit.text) }
168 .exit.data : { *(.exit.data) }
169 . = ALIGN(4096);
170 __initramfs_start = .;
171 .init.ramfs : { *(.init.ramfs) }
172 __initramfs_end = .;
173 . = ALIGN(32);
174 __per_cpu_start = .;
175 .data.percpu : { *(.data.percpu) }
176 __per_cpu_end = .;
177 . = ALIGN(4096);
178 __init_end = .;
179 /* freed after init ends here */
180
181 __bss_start = .; /* BSS */
182 .bss : { *(.bss) *(COMMON) }
183 __bss_stop = .;
184
185 _end = . ;
186
187 /* Sections to be discarded */
188 /DISCARD/ : {
189 *(.exitcall.exit)
190 #ifdef CONFIG_64BIT
191 /* temporary hack until binutils is fixed to not emit these
192 for static binaries */
193 *(.interp)
194 *(.dynsym)
195 *(.dynstr)
196 *(.dynamic)
197 *(.hash)
198 #endif
199 }
200
201 STABS_DEBUG
202 .note 0 : { *(.note) }
203
204 }
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