arch/parisc/mm/fault.c

   1 /* $Id: fault.c,v 1.5 2000/01/26 16:20:29 jsm Exp $
   2  *
   3  * This file is subject to the terms and conditions of the GNU General Public
   4  * License.  See the file "COPYING" in the main directory of this archive
   5  * for more details.
   6  *
   7  *
   8  * Copyright (C) 1995, 1996, 1997, 1998 by Ralf Baechle
   9  * Copyright 1999 SuSE GmbH (Philipp Rumpf, prumpf@tux.org)
  10  * Copyright 1999 Hewlett Packard Co.
  11  *
  12  */
  13
  14 #include <linux/mm.h>
  15 #include <linux/ptrace.h>
  16 #include <linux/sched.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/module.h>
  19
  20 #include <asm/uaccess.h>
  21 #include <asm/traps.h>
  22
  23 #define PRINT_USER_FAULTS /* (turn this on if you want user faults to be */
  24                          /*  dumped to the console via printk)          */
  25
  26
  27 /* Various important other fields */
  28 #define bit22set(x)             (x & 0x00000200)
  29 #define bits23_25set(x)         (x & 0x000001c0)
  30 #define isGraphicsFlushRead(x)  ((x & 0xfc003fdf) == 0x04001a80)
  31                                 /* extended opcode is 0x6a */
  32
  33 #define BITSSET         0x1c0   /* for identifying LDCW */
  34
  35
  36 DEFINE_PER_CPU(struct exception_data, exception_data);
  37
  38 /*
  39  * parisc_acctyp(unsigned int inst) --
  40  *    Given a PA-RISC memory access instruction, determine if the
  41  *    the instruction would perform a memory read or memory write
  42  *    operation.
  43  *
  44  *    This function assumes that the given instruction is a memory access
  45  *    instruction (i.e. you should really only call it if you know that
  46  *    the instruction has generated some sort of a memory access fault).
  47  *
  48  * Returns:
  49  *   VM_READ  if read operation
  50  *   VM_WRITE if write operation
  51  *   VM_EXEC  if execute operation
  52  */
  53 static unsigned long
  54 parisc_acctyp(unsigned long code, unsigned int inst)
  55 {
  56         if (code == 6 || code == 16)
  57             return VM_EXEC;
  58
  59         switch (inst & 0xf0000000) {
  60         case 0x40000000: /* load */
  61         case 0x50000000: /* new load */
  62                 return VM_READ;
  63
  64         case 0x60000000: /* store */
  65         case 0x70000000: /* new store */
  66                 return VM_WRITE;
  67
  68         case 0x20000000: /* coproc */
  69         case 0x30000000: /* coproc2 */
  70                 if (bit22set(inst))
  71                         return VM_WRITE;
  72
  73         case 0x0: /* indexed/memory management */
  74                 if (bit22set(inst)) {
  75                         /*
  76                          * Check for the 'Graphics Flush Read' instruction.
  77                          * It resembles an FDC instruction, except for bits
  78                          * 20 and 21. Any combination other than zero will
  79                          * utilize the block mover functionality on some
  80                          * older PA-RISC platforms.  The case where a block
  81                          * move is performed from VM to graphics IO space
  82                          * should be treated as a READ.
  83                          *
  84                          * The significance of bits 20,21 in the FDC
  85                          * instruction is:
  86                          *
  87                          *   00  Flush data cache (normal instruction behavior)
  88                          *   01  Graphics flush write  (IO space -> VM)
  89                          *   10  Graphics flush read   (VM -> IO space)
  90                          *   11  Graphics flush read/write (VM <-> IO space)
  91                          */
  92                         if (isGraphicsFlushRead(inst))
  93                                 return VM_READ;
  94                         return VM_WRITE;
  95                 } else {
  96                         /*
  97                          * Check for LDCWX and LDCWS (semaphore instructions).
  98                          * If bits 23 through 25 are all 1's it is one of
  99                          * the above two instructions and is a write.
 100                          *
 101                          * Note: With the limited bits we are looking at,
 102                          * this will also catch PROBEW and PROBEWI. However,
 103                          * these should never get in here because they don't
 104                          * generate exceptions of the type:
 105                          *   Data TLB miss fault/data page fault
 106                          *   Data memory protection trap
 107                          */
 108                         if (bits23_25set(inst) == BITSSET)
 109                                 return VM_WRITE;
 110                 }
 111                 return VM_READ; /* Default */
 112         }
 113         return VM_READ; /* Default */
 114 }
 115
 116 #undef bit22set
 117 #undef bits23_25set
 118 #undef isGraphicsFlushRead
 119 #undef BITSSET
 120
 121
 122 #if 0
 123 /* This is the treewalk to find a vma which is the highest that has
 124  * a start < addr.  We're using find_vma_prev instead right now, but
 125  * we might want to use this at some point in the future.  Probably
 126  * not, but I want it committed to CVS so I don't lose it :-)
 127  */
 128                         while (tree != vm_avl_empty) {
 129                                 if (tree->vm_start > addr) {
 130                                         tree = tree->vm_avl_left;
 131                                 } else {
 132                                         prev = tree;
 133                                         if (prev->vm_next == NULL)
 134                                                 break;
 135                                         if (prev->vm_next->vm_start > addr)
 136                                                 break;
 137                                         tree = tree->vm_avl_right;
 138                                 }
 139                         }
 140 #endif
 141
 142 void do_page_fault(struct pt_regs *regs, unsigned long code,
 143                               unsigned long address)
 144 {
 145         struct vm_area_struct *vma, *prev_vma;
 146         struct task_struct *tsk = current;
 147         struct mm_struct *mm = tsk->mm;
 148         const struct exception_table_entry *fix;
 149         unsigned long acc_type;
 150
 151         if (in_atomic() || !mm)
 152                 goto no_context;
 153
 154         down_read(&mm->mmap_sem);
 155         vma = find_vma_prev(mm, address, &prev_vma);
 156         if (!vma || address < vma->vm_start)
 157                 goto check_expansion;
 158 /*
 159  * Ok, we have a good vm_area for this memory access. We still need to
 160  * check the access permissions.
 161  */
 162
 163 good_area:
 164
 165         acc_type = parisc_acctyp(code,regs->iir);
 166
 167         if ((vma->vm_flags & acc_type) != acc_type)
 168                 goto bad_area;
 169
 170         /*
 171          * If for any reason at all we couldn't handle the fault, make
 172          * sure we exit gracefully rather than endlessly redo the
 173          * fault.
 174          */
 175
 176         switch (handle_mm_fault(mm, vma, address, (acc_type & VM_WRITE) != 0)) {
 177               case VM_FAULT_MINOR:
 178                 ++current->min_flt;
 179                 break;
 180               case VM_FAULT_MAJOR:
 181                 ++current->maj_flt;
 182                 break;
 183               case VM_FAULT_SIGBUS:
 184                 /*
 185                  * We hit a shared mapping outside of the file, or some
 186                  * other thing happened to us that made us unable to
 187                  * handle the page fault gracefully.
 188                  */
 189                 goto bad_area;
 190               default:
 191                 goto out_of_memory;
 192         }
 193         up_read(&mm->mmap_sem);
 194         return;
 195
 196 check_expansion:
 197         vma = prev_vma;
 198         if (vma && (expand_stack(vma, address) == 0))
 199                 goto good_area;
 200
 201 /*
 202  * Something tried to access memory that isn't in our memory map..
 203  */
 204 bad_area:
 205         up_read(&mm->mmap_sem);
 206
 207         if (user_mode(regs)) {
 208                 struct siginfo si;
 209
 210 #ifdef PRINT_USER_FAULTS
 211                 printk(KERN_DEBUG "\n");
 212                 printk(KERN_DEBUG "do_page_fault() pid=%d command='%s' type=%lu address=0x%08lx\n",
 213                     tsk->pid, tsk->comm, code, address);
 214                 if (vma) {
 215                         printk(KERN_DEBUG "vm_start = 0x%08lx, vm_end = 0x%08lx\n",
 216                                         vma->vm_start, vma->vm_end);
 217                 }
 218                 show_regs(regs);
 219 #endif
 220                 /* FIXME: actually we need to get the signo and code correct */
 221                 si.si_signo = SIGSEGV;
 222                 si.si_errno = 0;
 223                 si.si_code = SEGV_MAPERR;
 224                 si.si_addr = (void __user *) address;
 225                 force_sig_info(SIGSEGV, &si, current);
 226                 return;
 227         }
 228
 229 no_context:
 230
 231         if (!user_mode(regs)) {
 232                 fix = search_exception_tables(regs->iaoq[0]);
 233
 234                 if (fix) {
 235                         struct exception_data *d;
 236
 237                         d = &__get_cpu_var(exception_data);
 238                         d->fault_ip = regs->iaoq[0];
 239                         d->fault_space = regs->isr;
 240                         d->fault_addr = regs->ior;
 241
 242                         regs->iaoq[0] = ((fix->fixup) & ~3);
 243
 244                         /*
 245                          * NOTE: In some cases the faulting instruction
 246                          * may be in the delay slot of a branch. We
 247                          * don't want to take the branch, so we don't
 248                          * increment iaoq[1], instead we set it to be
 249                          * iaoq[0]+4, and clear the B bit in the PSW
 250                          */
 251
 252                         regs->iaoq[1] = regs->iaoq[0] + 4;
 253                         regs->gr[0] &= ~PSW_B; /* IPSW in gr[0] */
 254
 255                         return;
 256                 }
 257         }
 258
 259         parisc_terminate("Bad Address (null pointer deref?)", regs, code, address);
 260
 261   out_of_memory:
 262         up_read(&mm->mmap_sem);
 263         printk(KERN_CRIT "VM: killing process %s\n", current->comm);
 264         if (user_mode(regs))
 265                 do_exit(SIGKILL);
 266         goto no_context;
 267 }