2 * Device Tree Source for AMCC Canyonlands (460EX)
4 * Copyright 2008 DENX Software Engineering, Stefan Roese <sr@denx.de>
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without
8 * any warranty of any kind, whether express or implied.
16 model = "amcc,canyonlands";
17 compatible = "amcc,canyonlands";
18 dcr-parent = <&{/cpus/cpu@0}>;
33 model = "PowerPC,460EX";
35 clock-frequency = <0>; /* Filled in by U-Boot */
36 timebase-frequency = <0>; /* Filled in by U-Boot */
37 i-cache-line-size = <32>;
38 d-cache-line-size = <32>;
39 i-cache-size = <32768>;
40 d-cache-size = <32768>;
42 dcr-access-method = "native";
43 next-level-cache = <&L2C0>;
48 device_type = "memory";
49 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
52 UIC0: interrupt-controller0 {
53 compatible = "ibm,uic-460ex","ibm,uic";
56 dcr-reg = <0x0c0 0x009>;
59 #interrupt-cells = <2>;
62 UIC1: interrupt-controller1 {
63 compatible = "ibm,uic-460ex","ibm,uic";
66 dcr-reg = <0x0d0 0x009>;
69 #interrupt-cells = <2>;
70 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
71 interrupt-parent = <&UIC0>;
74 UIC2: interrupt-controller2 {
75 compatible = "ibm,uic-460ex","ibm,uic";
78 dcr-reg = <0x0e0 0x009>;
81 #interrupt-cells = <2>;
82 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
83 interrupt-parent = <&UIC0>;
86 UIC3: interrupt-controller3 {
87 compatible = "ibm,uic-460ex","ibm,uic";
90 dcr-reg = <0x0f0 0x009>;
93 #interrupt-cells = <2>;
94 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
95 interrupt-parent = <&UIC0>;
99 compatible = "ibm,sdr-460ex";
100 dcr-reg = <0x00e 0x002>;
104 compatible = "ibm,cpr-460ex";
105 dcr-reg = <0x00c 0x002>;
109 compatible = "ibm,l2-cache-460ex", "ibm,l2-cache";
110 dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */
111 0x030 0x008>; /* L2 cache DCR's */
112 cache-line-size = <32>; /* 32 bytes */
113 cache-size = <262144>; /* L2, 256K */
114 interrupt-parent = <&UIC1>;
119 compatible = "ibm,plb-460ex", "ibm,plb4";
120 #address-cells = <2>;
123 clock-frequency = <0>; /* Filled in by U-Boot */
126 compatible = "ibm,sdram-460ex", "ibm,sdram-405gp";
127 dcr-reg = <0x010 0x002>;
131 compatible = "ibm,mcmal-460ex", "ibm,mcmal2";
132 dcr-reg = <0x180 0x062>;
135 #address-cells = <0>;
137 interrupt-parent = <&UIC2>;
138 interrupts = < /*TXEOB*/ 0x6 0x4
145 USB0: ehci@bffd0400 {
146 compatible = "ibm,usb-ehci-460ex", "usb-ehci";
147 interrupt-parent = <&UIC2>;
148 interrupts = <0x1d 4>;
149 reg = <4 0xbffd0400 0x90 4 0xbffd0490 0x70>;
153 compatible = "ohci-le";
154 reg = <4 0xbffd0000 0x60>;
155 interrupt-parent = <&UIC2>;
156 interrupts = <0x1e 4>;
160 compatible = "ibm,opb-460ex", "ibm,opb";
161 #address-cells = <1>;
163 ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>;
164 clock-frequency = <0>; /* Filled in by U-Boot */
167 compatible = "ibm,ebc-460ex", "ibm,ebc";
168 dcr-reg = <0x012 0x002>;
169 #address-cells = <2>;
171 clock-frequency = <0>; /* Filled in by U-Boot */
172 /* ranges property is supplied by U-Boot */
173 interrupts = <0x6 0x4>;
174 interrupt-parent = <&UIC1>;
177 compatible = "amd,s29gl512n", "cfi-flash";
179 reg = <0x00000000 0x00000000 0x04000000>;
180 #address-cells = <1>;
184 reg = <0x00000000 0x001e0000>;
188 reg = <0x001e0000 0x00020000>;
192 reg = <0x00200000 0x01400000>;
196 reg = <0x01600000 0x00400000>;
200 reg = <0x01a00000 0x02560000>;
204 reg = <0x03f60000 0x00040000>;
208 reg = <0x03fa0000 0x00060000>;
213 UART0: serial@ef600300 {
214 device_type = "serial";
215 compatible = "ns16550";
216 reg = <0xef600300 0x00000008>;
217 virtual-reg = <0xef600300>;
218 clock-frequency = <0>; /* Filled in by U-Boot */
219 current-speed = <0>; /* Filled in by U-Boot */
220 interrupt-parent = <&UIC1>;
221 interrupts = <0x1 0x4>;
224 UART1: serial@ef600400 {
225 device_type = "serial";
226 compatible = "ns16550";
227 reg = <0xef600400 0x00000008>;
228 virtual-reg = <0xef600400>;
229 clock-frequency = <0>; /* Filled in by U-Boot */
230 current-speed = <0>; /* Filled in by U-Boot */
231 interrupt-parent = <&UIC0>;
232 interrupts = <0x1 0x4>;
235 UART2: serial@ef600500 {
236 device_type = "serial";
237 compatible = "ns16550";
238 reg = <0xef600500 0x00000008>;
239 virtual-reg = <0xef600500>;
240 clock-frequency = <0>; /* Filled in by U-Boot */
241 current-speed = <0>; /* Filled in by U-Boot */
242 interrupt-parent = <&UIC1>;
243 interrupts = <0x1d 0x4>;
246 UART3: serial@ef600600 {
247 device_type = "serial";
248 compatible = "ns16550";
249 reg = <0xef600600 0x00000008>;
250 virtual-reg = <0xef600600>;
251 clock-frequency = <0>; /* Filled in by U-Boot */
252 current-speed = <0>; /* Filled in by U-Boot */
253 interrupt-parent = <&UIC1>;
254 interrupts = <0x1e 0x4>;
258 compatible = "ibm,iic-460ex", "ibm,iic";
259 reg = <0xef600700 0x00000014>;
260 interrupt-parent = <&UIC0>;
261 interrupts = <0x2 0x4>;
262 #address-cells = <1>;
265 compatible = "stm,m41t80";
267 interrupt-parent = <&UIC2>;
268 interrupts = <0x19 0x8>;
271 compatible = "ad,ad7414";
273 interrupt-parent = <&UIC1>;
274 interrupts = <0x14 0x8>;
279 compatible = "ibm,iic-460ex", "ibm,iic";
280 reg = <0xef600800 0x00000014>;
281 interrupt-parent = <&UIC0>;
282 interrupts = <0x3 0x4>;
285 ZMII0: emac-zmii@ef600d00 {
286 compatible = "ibm,zmii-460ex", "ibm,zmii";
287 reg = <0xef600d00 0x0000000c>;
290 RGMII0: emac-rgmii@ef601500 {
291 compatible = "ibm,rgmii-460ex", "ibm,rgmii";
292 reg = <0xef601500 0x00000008>;
296 TAH0: emac-tah@ef601350 {
297 compatible = "ibm,tah-460ex", "ibm,tah";
298 reg = <0xef601350 0x00000030>;
301 TAH1: emac-tah@ef601450 {
302 compatible = "ibm,tah-460ex", "ibm,tah";
303 reg = <0xef601450 0x00000030>;
306 EMAC0: ethernet@ef600e00 {
307 device_type = "network";
308 compatible = "ibm,emac-460ex", "ibm,emac4sync";
309 interrupt-parent = <&EMAC0>;
310 interrupts = <0x0 0x1>;
311 #interrupt-cells = <1>;
312 #address-cells = <0>;
314 interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4
315 /*Wake*/ 0x1 &UIC2 0x14 0x4>;
316 reg = <0xef600e00 0x000000c4>;
317 local-mac-address = [000000000000]; /* Filled in by U-Boot */
318 mal-device = <&MAL0>;
319 mal-tx-channel = <0>;
320 mal-rx-channel = <0>;
322 max-frame-size = <9000>;
323 rx-fifo-size = <4096>;
324 tx-fifo-size = <2048>;
326 phy-map = <0x00000000>;
327 rgmii-device = <&RGMII0>;
329 tah-device = <&TAH0>;
331 has-inverted-stacr-oc;
332 has-new-stacr-staopc;
335 EMAC1: ethernet@ef600f00 {
336 device_type = "network";
337 compatible = "ibm,emac-460ex", "ibm,emac4sync";
338 interrupt-parent = <&EMAC1>;
339 interrupts = <0x0 0x1>;
340 #interrupt-cells = <1>;
341 #address-cells = <0>;
343 interrupt-map = </*Status*/ 0x0 &UIC2 0x11 0x4
344 /*Wake*/ 0x1 &UIC2 0x15 0x4>;
345 reg = <0xef600f00 0x000000c4>;
346 local-mac-address = [000000000000]; /* Filled in by U-Boot */
347 mal-device = <&MAL0>;
348 mal-tx-channel = <1>;
349 mal-rx-channel = <8>;
351 max-frame-size = <9000>;
352 rx-fifo-size = <4096>;
353 tx-fifo-size = <2048>;
355 phy-map = <0x00000000>;
356 rgmii-device = <&RGMII0>;
358 tah-device = <&TAH1>;
360 has-inverted-stacr-oc;
361 has-new-stacr-staopc;
362 mdio-device = <&EMAC0>;
366 PCIX0: pci@c0ec00000 {
368 #interrupt-cells = <1>;
370 #address-cells = <3>;
371 compatible = "ibm,plb-pcix-460ex", "ibm,plb-pcix";
373 large-inbound-windows;
375 reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */
376 0x00000000 0x00000000 0x00000000 /* no IACK cycles */
377 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */
378 0x0000000c 0x0ec80000 0x00000100 /* Internal registers */
379 0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */
381 /* Outbound ranges, one memory and one IO,
382 * later cannot be changed
384 ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000
385 0x02000000 0x00000000 0x00000000 0x0000000c 0x0ee00000 0x00000000 0x00100000
386 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>;
388 /* Inbound 2GB range starting at 0 */
389 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
391 /* This drives busses 0 to 0x3f */
392 bus-range = <0x0 0x3f>;
394 /* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */
395 interrupt-map-mask = <0x0 0x0 0x0 0x0>;
396 interrupt-map = < 0x0 0x0 0x0 0x0 &UIC1 0x0 0x8 >;
399 PCIE0: pciex@d00000000 {
401 #interrupt-cells = <1>;
403 #address-cells = <3>;
404 compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
406 port = <0x0>; /* port number */
407 reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */
408 0x0000000c 0x08010000 0x00001000>; /* Registers */
409 dcr-reg = <0x100 0x020>;
412 /* Outbound ranges, one memory and one IO,
413 * later cannot be changed
415 ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
416 0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000
417 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
419 /* Inbound 2GB range starting at 0 */
420 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
422 /* This drives busses 40 to 0x7f */
423 bus-range = <0x40 0x7f>;
425 /* Legacy interrupts (note the weird polarity, the bridge seems
426 * to invert PCIe legacy interrupts).
427 * We are de-swizzling here because the numbers are actually for
428 * port of the root complex virtual P2P bridge. But I want
429 * to avoid putting a node for it in the tree, so the numbers
430 * below are basically de-swizzled numbers.
431 * The real slot is on idsel 0, so the swizzling is 1:1
433 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
435 0x0 0x0 0x0 0x1 &UIC3 0xc 0x4 /* swizzled int A */
436 0x0 0x0 0x0 0x2 &UIC3 0xd 0x4 /* swizzled int B */
437 0x0 0x0 0x0 0x3 &UIC3 0xe 0x4 /* swizzled int C */
438 0x0 0x0 0x0 0x4 &UIC3 0xf 0x4 /* swizzled int D */>;
441 PCIE1: pciex@d20000000 {
443 #interrupt-cells = <1>;
445 #address-cells = <3>;
446 compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
448 port = <0x1>; /* port number */
449 reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */
450 0x0000000c 0x08011000 0x00001000>; /* Registers */
451 dcr-reg = <0x120 0x020>;
454 /* Outbound ranges, one memory and one IO,
455 * later cannot be changed
457 ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000
458 0x02000000 0x00000000 0x00000000 0x0000000f 0x00100000 0x00000000 0x00100000
459 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>;
461 /* Inbound 2GB range starting at 0 */
462 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
464 /* This drives busses 80 to 0xbf */
465 bus-range = <0x80 0xbf>;
467 /* Legacy interrupts (note the weird polarity, the bridge seems
468 * to invert PCIe legacy interrupts).
469 * We are de-swizzling here because the numbers are actually for
470 * port of the root complex virtual P2P bridge. But I want
471 * to avoid putting a node for it in the tree, so the numbers
472 * below are basically de-swizzled numbers.
473 * The real slot is on idsel 0, so the swizzling is 1:1
475 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
477 0x0 0x0 0x0 0x1 &UIC3 0x10 0x4 /* swizzled int A */
478 0x0 0x0 0x0 0x2 &UIC3 0x11 0x4 /* swizzled int B */
479 0x0 0x0 0x0 0x3 &UIC3 0x12 0x4 /* swizzled int C */
480 0x0 0x0 0x0 0x4 &UIC3 0x13 0x4 /* swizzled int D */>;