arch/powerpc/boot/dts/fsl/p3041si-post.dtsi

   1 /*
   2  * P3041 Silicon/SoC Device Tree Source (post include)
   3  *
   4  * Copyright 2011 - 2014 Freescale Semiconductor Inc.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions are met:
   8  *     * Redistributions of source code must retain the above copyright
   9  *       notice, this list of conditions and the following disclaimer.
  10  *     * Redistributions in binary form must reproduce the above copyright
  11  *       notice, this list of conditions and the following disclaimer in the
  12  *       documentation and/or other materials provided with the distribution.
  13  *     * Neither the name of Freescale Semiconductor nor the
  14  *       names of its contributors may be used to endorse or promote products
  15  *       derived from this software without specific prior written permission.
  16  *
  17  *
  18  * ALTERNATIVELY, this software may be distributed under the terms of the
  19  * GNU General Public License ("GPL") as published by the Free Software
  20  * Foundation, either version 2 of that License or (at your option) any
  21  * later version.
  22  *
  23  * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
  24  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  25  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  26  * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
  27  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  28  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  29  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  30  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  32  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33  */
  34
  35 &bman_fbpr {
  36         compatible = "fsl,bman-fbpr";
  37         alloc-ranges = <0 0 0x10 0>;
  38 };
  39
  40 &lbc {
  41         compatible = "fsl,p3041-elbc", "fsl,elbc", "simple-bus";
  42         interrupts = <25 2 0 0>;
  43         #address-cells = <2>;
  44         #size-cells = <1>;
  45 };
  46
  47 /* controller at 0x200000 */
  48 &pci0 {
  49         compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
  50         device_type = "pci";
  51         #size-cells = <2>;
  52         #address-cells = <3>;
  53         bus-range = <0x0 0xff>;
  54         clock-frequency = <33333333>;
  55         interrupts = <16 2 1 15>;
  56         fsl,iommu-parent = <&pamu0>;
  57         fsl,liodn-reg = <&guts 0x500>; /* PEX1LIODNR */
  58         pcie@0 {
  59                 reg = <0 0 0 0 0>;
  60                 #interrupt-cells = <1>;
  61                 #size-cells = <2>;
  62                 #address-cells = <3>;
  63                 device_type = "pci";
  64                 interrupts = <16 2 1 15>;
  65                 interrupt-map-mask = <0xf800 0 0 7>;
  66                 interrupt-map = <
  67                         /* IDSEL 0x0 */
  68                         0000 0 0 1 &mpic 40 1 0 0
  69                         0000 0 0 2 &mpic 1 1 0 0
  70                         0000 0 0 3 &mpic 2 1 0 0
  71                         0000 0 0 4 &mpic 3 1 0 0
  72                         >;
  73         };
  74 };
  75
  76 /* controller at 0x201000 */
  77 &pci1 {
  78         compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
  79         device_type = "pci";
  80         #size-cells = <2>;
  81         #address-cells = <3>;
  82         bus-range = <0 0xff>;
  83         clock-frequency = <33333333>;
  84         interrupts = <16 2 1 14>;
  85         fsl,iommu-parent = <&pamu0>;
  86         fsl,liodn-reg = <&guts 0x504>; /* PEX2LIODNR */
  87         pcie@0 {
  88                 reg = <0 0 0 0 0>;
  89                 #interrupt-cells = <1>;
  90                 #size-cells = <2>;
  91                 #address-cells = <3>;
  92                 device_type = "pci";
  93                 interrupts = <16 2 1 14>;
  94                 interrupt-map-mask = <0xf800 0 0 7>;
  95                 interrupt-map = <
  96                         /* IDSEL 0x0 */
  97                         0000 0 0 1 &mpic 41 1 0 0
  98                         0000 0 0 2 &mpic 5 1 0 0
  99                         0000 0 0 3 &mpic 6 1 0 0
 100                         0000 0 0 4 &mpic 7 1 0 0
 101                         >;
 102         };
 103 };
 104
 105 /* controller at 0x202000 */
 106 &pci2 {
 107         compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
 108         device_type = "pci";
 109         #size-cells = <2>;
 110         #address-cells = <3>;
 111         bus-range = <0x0 0xff>;
 112         clock-frequency = <33333333>;
 113         interrupts = <16 2 1 13>;
 114         fsl,iommu-parent = <&pamu0>;
 115         fsl,liodn-reg = <&guts 0x508>; /* PEX3LIODNR */
 116         pcie@0 {
 117                 reg = <0 0 0 0 0>;
 118                 #interrupt-cells = <1>;
 119                 #size-cells = <2>;
 120                 #address-cells = <3>;
 121                 device_type = "pci";
 122                 interrupts = <16 2 1 13>;
 123                 interrupt-map-mask = <0xf800 0 0 7>;
 124                 interrupt-map = <
 125                         /* IDSEL 0x0 */
 126                         0000 0 0 1 &mpic 42 1 0 0
 127                         0000 0 0 2 &mpic 9 1 0 0
 128                         0000 0 0 3 &mpic 10 1 0 0
 129                         0000 0 0 4 &mpic 11 1 0 0
 130                         >;
 131         };
 132 };
 133
 134 /* controller at 0x203000 */
 135 &pci3 {
 136         compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
 137         device_type = "pci";
 138         #size-cells = <2>;
 139         #address-cells = <3>;
 140         bus-range = <0x0 0xff>;
 141         clock-frequency = <33333333>;
 142         interrupts = <16 2 1 12>;
 143         pcie@0 {
 144                 reg = <0 0 0 0 0>;
 145                 #interrupt-cells = <1>;
 146                 #size-cells = <2>;
 147                 #address-cells = <3>;
 148                 device_type = "pci";
 149                 interrupts = <16 2 1 12>;
 150                 interrupt-map-mask = <0xf800 0 0 7>;
 151                 interrupt-map = <
 152                         /* IDSEL 0x0 */
 153                         0000 0 0 1 &mpic 43 1 0 0
 154                         0000 0 0 2 &mpic 0 1 0 0
 155                         0000 0 0 3 &mpic 4 1 0 0
 156                         0000 0 0 4 &mpic 8 1 0 0
 157                         >;
 158         };
 159 };
 160
 161 &rio {
 162         compatible = "fsl,srio";
 163         interrupts = <16 2 1 11>;
 164         #address-cells = <2>;
 165         #size-cells = <2>;
 166         fsl,iommu-parent = <&pamu0>;
 167         ranges;
 168
 169         port1 {
 170                 #address-cells = <2>;
 171                 #size-cells = <2>;
 172                 cell-index = <1>;
 173                 fsl,liodn-reg = <&guts 0x510>; /* RIO1LIODNR */
 174         };
 175
 176         port2 {
 177                 #address-cells = <2>;
 178                 #size-cells = <2>;
 179                 cell-index = <2>;
 180                 fsl,liodn-reg = <&guts 0x514>; /* RIO2LIODNR */
 181         };
 182 };
 183
 184 &dcsr {
 185         #address-cells = <1>;
 186         #size-cells = <1>;
 187         compatible = "fsl,dcsr", "simple-bus";
 188
 189         dcsr-epu@0 {
 190                 compatible = "fsl,p3041-dcsr-epu", "fsl,dcsr-epu";
 191                 interrupts = <52 2 0 0
 192                               84 2 0 0
 193                               85 2 0 0>;
 194                 reg = <0x0 0x1000>;
 195         };
 196         dcsr-npc {
 197                 compatible = "fsl,dcsr-npc";
 198                 reg = <0x1000 0x1000 0x1000000 0x8000>;
 199         };
 200         dcsr-nxc@2000 {
 201                 compatible = "fsl,dcsr-nxc";
 202                 reg = <0x2000 0x1000>;
 203         };
 204         dcsr-corenet {
 205                 compatible = "fsl,dcsr-corenet";
 206                 reg = <0x8000 0x1000 0xB0000 0x1000>;
 207         };
 208         dcsr-dpaa@9000 {
 209                 compatible = "fsl,p3041-dcsr-dpaa", "fsl,dcsr-dpaa";
 210                 reg = <0x9000 0x1000>;
 211         };
 212         dcsr-ocn@11000 {
 213                 compatible = "fsl,p3041-dcsr-ocn", "fsl,dcsr-ocn";
 214                 reg = <0x11000 0x1000>;
 215         };
 216         dcsr-ddr@12000 {
 217                 compatible = "fsl,dcsr-ddr";
 218                 dev-handle = <&ddr1>;
 219                 reg = <0x12000 0x1000>;
 220         };
 221         dcsr-nal@18000 {
 222                 compatible = "fsl,p3041-dcsr-nal", "fsl,dcsr-nal";
 223                 reg = <0x18000 0x1000>;
 224         };
 225         dcsr-rcpm@22000 {
 226                 compatible = "fsl,p3041-dcsr-rcpm", "fsl,dcsr-rcpm";
 227                 reg = <0x22000 0x1000>;
 228         };
 229         dcsr-cpu-sb-proxy@40000 {
 230                 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
 231                 cpu-handle = <&cpu0>;
 232                 reg = <0x40000 0x1000>;
 233         };
 234         dcsr-cpu-sb-proxy@41000 {
 235                 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
 236                 cpu-handle = <&cpu1>;
 237                 reg = <0x41000 0x1000>;
 238         };
 239         dcsr-cpu-sb-proxy@42000 {
 240                 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
 241                 cpu-handle = <&cpu2>;
 242                 reg = <0x42000 0x1000>;
 243         };
 244         dcsr-cpu-sb-proxy@43000 {
 245                 compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
 246                 cpu-handle = <&cpu3>;
 247                 reg = <0x43000 0x1000>;
 248         };
 249 };
 250
 251 /include/ "qoriq-bman1-portals.dtsi"
 252
 253 &soc {
 254         #address-cells = <1>;
 255         #size-cells = <1>;
 256         device_type = "soc";
 257         compatible = "simple-bus";
 258
 259         soc-sram-error {
 260                 compatible = "fsl,soc-sram-error";
 261                 interrupts = <16 2 1 29>;
 262         };
 263
 264         corenet-law@0 {
 265                 compatible = "fsl,corenet-law";
 266                 reg = <0x0 0x1000>;
 267                 fsl,num-laws = <32>;
 268         };
 269
 270         ddr1: memory-controller@8000 {
 271                 compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
 272                 reg = <0x8000 0x1000>;
 273                 interrupts = <16 2 1 23>;
 274         };
 275
 276         cpc: l3-cache-controller@10000 {
 277                 compatible = "fsl,p3041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
 278                 reg = <0x10000 0x1000>;
 279                 interrupts = <16 2 1 27>;
 280         };
 281
 282         corenet-cf@18000 {
 283                 compatible = "fsl,corenet1-cf", "fsl,corenet-cf";
 284                 reg = <0x18000 0x1000>;
 285                 interrupts = <16 2 1 31>;
 286                 fsl,ccf-num-csdids = <32>;
 287                 fsl,ccf-num-snoopids = <32>;
 288         };
 289
 290         iommu@20000 {
 291                 compatible = "fsl,pamu-v1.0", "fsl,pamu";
 292                 reg = <0x20000 0x4000>; /* for compatibility with older PAMU drivers */
 293                 ranges = <0 0x20000 0x4000>;
 294                 #address-cells = <1>;
 295                 #size-cells = <1>;
 296                 interrupts = <
 297                         24 2 0 0
 298                         16 2 1 30>;
 299                 fsl,portid-mapping = <0x0f000000>;
 300
 301                 pamu0: pamu@0 {
 302                         reg = <0 0x1000>;
 303                         fsl,primary-cache-geometry = <32 1>;
 304                         fsl,secondary-cache-geometry = <128 2>;
 305                 };
 306
 307                 pamu1: pamu@1000 {
 308                         reg = <0x1000 0x1000>;
 309                         fsl,primary-cache-geometry = <32 1>;
 310                         fsl,secondary-cache-geometry = <128 2>;
 311                 };
 312
 313                 pamu2: pamu@2000 {
 314                         reg = <0x2000 0x1000>;
 315                         fsl,primary-cache-geometry = <32 1>;
 316                         fsl,secondary-cache-geometry = <128 2>;
 317                 };
 318
 319                 pamu3: pamu@3000 {
 320                         reg = <0x3000 0x1000>;
 321                         fsl,primary-cache-geometry = <32 1>;
 322                         fsl,secondary-cache-geometry = <128 2>;
 323                 };
 324         };
 325
 326 /include/ "qoriq-mpic.dtsi"
 327
 328         guts: global-utilities@e0000 {
 329                 compatible = "fsl,qoriq-device-config-1.0";
 330                 reg = <0xe0000 0xe00>;
 331                 fsl,has-rstcr;
 332                 #sleep-cells = <1>;
 333                 fsl,liodn-bits = <12>;
 334         };
 335
 336         pins: global-utilities@e0e00 {
 337                 compatible = "fsl,qoriq-pin-control-1.0";
 338                 reg = <0xe0e00 0x200>;
 339                 #sleep-cells = <2>;
 340         };
 341
 342 /include/ "qoriq-clockgen1.dtsi"
 343         global-utilities@e1000 {
 344                 compatible = "fsl,p3041-clockgen", "fsl,qoriq-clockgen-1.0";
 345
 346                 mux2: mux2@40 {
 347                         #clock-cells = <0>;
 348                         reg = <0x40 0x4>;
 349                         compatible = "fsl,qoriq-core-mux-1.0";
 350                         clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
 351                         clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
 352                         clock-output-names = "cmux2";
 353                 };
 354
 355                 mux3: mux3@60 {
 356                         #clock-cells = <0>;
 357                         reg = <0x60 0x4>;
 358                         compatible = "fsl,qoriq-core-mux-1.0";
 359                         clocks = <&pll0 0>, <&pll0 1>, <&pll1 0>, <&pll1 1>;
 360                         clock-names = "pll0", "pll0-div2", "pll1", "pll1-div2";
 361                         clock-output-names = "cmux3";
 362                 };
 363         };
 364
 365         rcpm: global-utilities@e2000 {
 366                 compatible = "fsl,qoriq-rcpm-1.0";
 367                 reg = <0xe2000 0x1000>;
 368                 #sleep-cells = <1>;
 369         };
 370
 371         sfp: sfp@e8000 {
 372                 compatible = "fsl,p3041-sfp", "fsl,qoriq-sfp-1.0";
 373                 reg        = <0xe8000 0x1000>;
 374         };
 375
 376         serdes: serdes@ea000 {
 377                 compatible = "fsl,p3041-serdes";
 378                 reg        = <0xea000 0x1000>;
 379         };
 380
 381 /include/ "qoriq-dma-0.dtsi"
 382         dma@100300 {
 383                 fsl,iommu-parent = <&pamu0>;
 384                 fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
 385         };
 386
 387 /include/ "qoriq-dma-1.dtsi"
 388         dma@101300 {
 389                 fsl,iommu-parent = <&pamu0>;
 390                 fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
 391         };
 392
 393 /include/ "qoriq-espi-0.dtsi"
 394         spi@110000 {
 395                 fsl,espi-num-chipselects = <4>;
 396         };
 397
 398 /include/ "qoriq-esdhc-0.dtsi"
 399         sdhc@114000 {
 400                 compatible = "fsl,p3041-esdhc", "fsl,esdhc";
 401                 fsl,iommu-parent = <&pamu1>;
 402                 fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
 403                 sdhci,auto-cmd12;
 404         };
 405
 406 /include/ "qoriq-i2c-0.dtsi"
 407 /include/ "qoriq-i2c-1.dtsi"
 408 /include/ "qoriq-duart-0.dtsi"
 409 /include/ "qoriq-duart-1.dtsi"
 410 /include/ "qoriq-gpio-0.dtsi"
 411 /include/ "qoriq-usb2-mph-0.dtsi"
 412         usb0: usb@210000 {
 413                 compatible = "fsl-usb2-mph-v1.6", "fsl-usb2-mph";
 414                 phy_type = "utmi";
 415                 fsl,iommu-parent = <&pamu1>;
 416                 fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
 417                 port0;
 418         };
 419
 420 /include/ "qoriq-usb2-dr-0.dtsi"
 421         usb1: usb@211000 {
 422                 compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
 423                 fsl,iommu-parent = <&pamu1>;
 424                 fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */
 425                 dr_mode = "host";
 426                 phy_type = "utmi";
 427         };
 428
 429 /include/ "qoriq-sata2-0.dtsi"
 430         sata@220000 {
 431                 fsl,iommu-parent = <&pamu1>;
 432                 fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */
 433         };
 434
 435 /include/ "qoriq-sata2-1.dtsi"
 436         sata@221000 {
 437                 fsl,iommu-parent = <&pamu1>;
 438                 fsl,liodn-reg = <&guts 0x554>; /* SATA2LIODNR */
 439         };
 440
 441 /include/ "qoriq-sec4.2-0.dtsi"
 442 crypto: crypto@300000 {
 443                 fsl,iommu-parent = <&pamu1>;
 444         };
 445
 446 /include/ "qoriq-bman1.dtsi"
 447 };