arch/powerpc/boot/dts/mpc8378_rdb.dts

   1 /*
   2  * MPC8378E RDB Device Tree Source
   3  *
   4  * Copyright 2007, 2008 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /dts-v1/;
  13
  14 / {
  15         compatible = "fsl,mpc8378rdb";
  16         #address-cells = <1>;
  17         #size-cells = <1>;
  18
  19         aliases {
  20                 ethernet0 = &enet0;
  21                 ethernet1 = &enet1;
  22                 serial0 = &serial0;
  23                 serial1 = &serial1;
  24                 pci0 = &pci0;
  25         };
  26
  27         cpus {
  28                 #address-cells = <1>;
  29                 #size-cells = <0>;
  30
  31                 PowerPC,8378@0 {
  32                         device_type = "cpu";
  33                         reg = <0x0>;
  34                         d-cache-line-size = <32>;
  35                         i-cache-line-size = <32>;
  36                         d-cache-size = <32768>;
  37                         i-cache-size = <32768>;
  38                         timebase-frequency = <0>;
  39                         bus-frequency = <0>;
  40                         clock-frequency = <0>;
  41                 };
  42         };
  43
  44         memory {
  45                 device_type = "memory";
  46                 reg = <0x00000000 0x10000000>;  // 256MB at 0
  47         };
  48
  49         localbus@e0005000 {
  50                 #address-cells = <2>;
  51                 #size-cells = <1>;
  52                 compatible = "fsl,mpc8378-elbc", "fsl,elbc", "simple-bus";
  53                 reg = <0xe0005000 0x1000>;
  54                 interrupts = <77 0x8>;
  55                 interrupt-parent = <&ipic>;
  56
  57                 // CS0 and CS1 are swapped when
  58                 // booting from nand, but the
  59                 // addresses are the same.
  60                 ranges = <0x0 0x0 0xfe000000 0x00800000
  61                           0x1 0x0 0xe0600000 0x00008000
  62                           0x2 0x0 0xf0000000 0x00020000
  63                           0x3 0x0 0xfa000000 0x00008000>;
  64
  65                 flash@0,0 {
  66                         #address-cells = <1>;
  67                         #size-cells = <1>;
  68                         compatible = "cfi-flash";
  69                         reg = <0x0 0x0 0x800000>;
  70                         bank-width = <2>;
  71                         device-width = <1>;
  72                 };
  73
  74                 nand@1,0 {
  75                         #address-cells = <1>;
  76                         #size-cells = <1>;
  77                         compatible = "fsl,mpc8378-fcm-nand",
  78                                      "fsl,elbc-fcm-nand";
  79                         reg = <0x1 0x0 0x8000>;
  80
  81                         u-boot@0 {
  82                                 reg = <0x0 0x100000>;
  83                                 read-only;
  84                         };
  85
  86                         kernel@100000 {
  87                                 reg = <0x100000 0x300000>;
  88                         };
  89                         fs@400000 {
  90                                 reg = <0x400000 0x1c00000>;
  91                         };
  92                 };
  93         };
  94
  95         immr@e0000000 {
  96                 #address-cells = <1>;
  97                 #size-cells = <1>;
  98                 device_type = "soc";
  99                 compatible = "simple-bus";
 100                 ranges = <0x0 0xe0000000 0x00100000>;
 101                 reg = <0xe0000000 0x00000200>;
 102                 bus-frequency = <0>;
 103
 104                 wdt@200 {
 105                         device_type = "watchdog";
 106                         compatible = "mpc83xx_wdt";
 107                         reg = <0x200 0x100>;
 108                 };
 109
 110                 i2c@3000 {
 111                         #address-cells = <1>;
 112                         #size-cells = <0>;
 113                         cell-index = <0>;
 114                         compatible = "fsl-i2c";
 115                         reg = <0x3000 0x100>;
 116                         interrupts = <14 0x8>;
 117                         interrupt-parent = <&ipic>;
 118                         dfsrr;
 119                         rtc@68 {
 120                                 device_type = "rtc";
 121                                 compatible = "dallas,ds1339";
 122                                 reg = <0x68>;
 123                         };
 124
 125                         mcu_pio: mcu@a {
 126                                 #gpio-cells = <2>;
 127                                 compatible = "fsl,mc9s08qg8-mpc8378erdb",
 128                                              "fsl,mcu-mpc8349emitx";
 129                                 reg = <0x0a>;
 130                                 gpio-controller;
 131                         };
 132                 };
 133
 134                 i2c@3100 {
 135                         #address-cells = <1>;
 136                         #size-cells = <0>;
 137                         cell-index = <1>;
 138                         compatible = "fsl-i2c";
 139                         reg = <0x3100 0x100>;
 140                         interrupts = <15 0x8>;
 141                         interrupt-parent = <&ipic>;
 142                         dfsrr;
 143                 };
 144
 145                 spi@7000 {
 146                         cell-index = <0>;
 147                         compatible = "fsl,spi";
 148                         reg = <0x7000 0x1000>;
 149                         interrupts = <16 0x8>;
 150                         interrupt-parent = <&ipic>;
 151                         mode = "cpu";
 152                 };
 153
 154                 dma@82a8 {
 155                         #address-cells = <1>;
 156                         #size-cells = <1>;
 157                         compatible = "fsl,mpc8378-dma", "fsl,elo-dma";
 158                         reg = <0x82a8 4>;
 159                         ranges = <0 0x8100 0x1a8>;
 160                         interrupt-parent = <&ipic>;
 161                         interrupts = <71 8>;
 162                         cell-index = <0>;
 163                         dma-channel@0 {
 164                                 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
 165                                 reg = <0 0x80>;
 166                                 cell-index = <0>;
 167                                 interrupt-parent = <&ipic>;
 168                                 interrupts = <71 8>;
 169                         };
 170                         dma-channel@80 {
 171                                 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
 172                                 reg = <0x80 0x80>;
 173                                 cell-index = <1>;
 174                                 interrupt-parent = <&ipic>;
 175                                 interrupts = <71 8>;
 176                         };
 177                         dma-channel@100 {
 178                                 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
 179                                 reg = <0x100 0x80>;
 180                                 cell-index = <2>;
 181                                 interrupt-parent = <&ipic>;
 182                                 interrupts = <71 8>;
 183                         };
 184                         dma-channel@180 {
 185                                 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
 186                                 reg = <0x180 0x28>;
 187                                 cell-index = <3>;
 188                                 interrupt-parent = <&ipic>;
 189                                 interrupts = <71 8>;
 190                         };
 191                 };
 192
 193                 usb@23000 {
 194                         compatible = "fsl-usb2-dr";
 195                         reg = <0x23000 0x1000>;
 196                         #address-cells = <1>;
 197                         #size-cells = <0>;
 198                         interrupt-parent = <&ipic>;
 199                         interrupts = <38 0x8>;
 200                         phy_type = "ulpi";
 201                 };
 202
 203                 mdio@24520 {
 204                         #address-cells = <1>;
 205                         #size-cells = <0>;
 206                         compatible = "fsl,gianfar-mdio";
 207                         reg = <0x24520 0x20>;
 208                         phy2: ethernet-phy@2 {
 209                                 interrupt-parent = <&ipic>;
 210                                 interrupts = <17 0x8>;
 211                                 reg = <0x2>;
 212                                 device_type = "ethernet-phy";
 213                         };
 214                         tbi0: tbi-phy@11 {
 215                                 reg = <0x11>;
 216                                 device_type = "tbi-phy";
 217                         };
 218                 };
 219
 220                 mdio@25520 {
 221                         #address-cells = <1>;
 222                         #size-cells = <0>;
 223                         compatible = "fsl,gianfar-tbi";
 224                         reg = <0x25520 0x20>;
 225
 226                         tbi1: tbi-phy@11 {
 227                                 reg = <0x11>;
 228                                 device_type = "tbi-phy";
 229                         };
 230                 };
 231
 232
 233                 enet0: ethernet@24000 {
 234                         cell-index = <0>;
 235                         device_type = "network";
 236                         model = "eTSEC";
 237                         compatible = "gianfar";
 238                         reg = <0x24000 0x1000>;
 239                         local-mac-address = [ 00 00 00 00 00 00 ];
 240                         interrupts = <32 0x8 33 0x8 34 0x8>;
 241                         phy-connection-type = "mii";
 242                         interrupt-parent = <&ipic>;
 243                         phy-handle = <&phy2>;
 244                 };
 245
 246                 enet1: ethernet@25000 {
 247                         cell-index = <1>;
 248                         device_type = "network";
 249                         model = "eTSEC";
 250                         compatible = "gianfar";
 251                         reg = <0x25000 0x1000>;
 252                         local-mac-address = [ 00 00 00 00 00 00 ];
 253                         interrupts = <35 0x8 36 0x8 37 0x8>;
 254                         phy-connection-type = "mii";
 255                         interrupt-parent = <&ipic>;
 256                         fixed-link = <1 1 1000 0 0>;
 257                 };
 258
 259                 serial0: serial@4500 {
 260                         cell-index = <0>;
 261                         device_type = "serial";
 262                         compatible = "ns16550";
 263                         reg = <0x4500 0x100>;
 264                         clock-frequency = <0>;
 265                         interrupts = <9 0x8>;
 266                         interrupt-parent = <&ipic>;
 267                 };
 268
 269                 serial1: serial@4600 {
 270                         cell-index = <1>;
 271                         device_type = "serial";
 272                         compatible = "ns16550";
 273                         reg = <0x4600 0x100>;
 274                         clock-frequency = <0>;
 275                         interrupts = <10 0x8>;
 276                         interrupt-parent = <&ipic>;
 277                 };
 278
 279                 crypto@30000 {
 280                         compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
 281                                      "fsl,sec2.1", "fsl,sec2.0";
 282                         reg = <0x30000 0x10000>;
 283                         interrupts = <11 0x8>;
 284                         interrupt-parent = <&ipic>;
 285                         fsl,num-channels = <4>;
 286                         fsl,channel-fifo-len = <24>;
 287                         fsl,exec-units-mask = <0x9fe>;
 288                         fsl,descriptor-types-mask = <0x3ab0ebf>;
 289                 };
 290
 291                 /* IPIC
 292                  * interrupts cell = <intr #, sense>
 293                  * sense values match linux IORESOURCE_IRQ_* defines:
 294                  * sense == 8: Level, low assertion
 295                  * sense == 2: Edge, high-to-low change
 296                  */
 297                 ipic: interrupt-controller@700 {
 298                         compatible = "fsl,ipic";
 299                         interrupt-controller;
 300                         #address-cells = <0>;
 301                         #interrupt-cells = <2>;
 302                         reg = <0x700 0x100>;
 303                 };
 304         };
 305
 306         pci0: pci@e0008500 {
 307                 interrupt-map-mask = <0xf800 0 0 7>;
 308                 interrupt-map = <
 309                                 /* IRQ5 = 21 = 0x15, IRQ6 = 0x16, IRQ7 = 23 = 0x17 */
 310
 311                                 /* IDSEL AD14 IRQ6 inta */
 312                                  0x7000 0x0 0x0 0x1 &ipic 22 0x8
 313
 314                                 /* IDSEL AD15 IRQ5 inta, IRQ6 intb, IRQ7 intd */
 315                                  0x7800 0x0 0x0 0x1 &ipic 21 0x8
 316                                  0x7800 0x0 0x0 0x2 &ipic 22 0x8
 317                                  0x7800 0x0 0x0 0x4 &ipic 23 0x8
 318
 319                                 /* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/
 320                                  0xE000 0x0 0x0 0x1 &ipic 23 0x8
 321                                  0xE000 0x0 0x0 0x2 &ipic 21 0x8
 322                                  0xE000 0x0 0x0 0x3 &ipic 22 0x8>;
 323                 interrupt-parent = <&ipic>;
 324                 interrupts = <66 0x8>;
 325                 bus-range = <0 0>;
 326                 ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000
 327                           0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
 328                           0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
 329                 clock-frequency = <66666666>;
 330                 #interrupt-cells = <1>;
 331                 #size-cells = <2>;
 332                 #address-cells = <3>;
 333                 reg = <0xe0008500 0x100         /* internal registers */
 334                        0xe0008300 0x8>;         /* config space access registers */
 335                 compatible = "fsl,mpc8349-pci";
 336                 device_type = "pci";
 337         };
 338 };