arch/powerpc/boot/dts/mpc8536ds.dts

   1 /*
   2  * MPC8536 DS Device Tree Source
   3  *
   4  * Copyright 2008 Freescale Semiconductor, Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /dts-v1/;
  13
  14 / {
  15         model = "fsl,mpc8536ds";
  16         compatible = "fsl,mpc8536ds";
  17         #address-cells = <1>;
  18         #size-cells = <1>;
  19
  20         aliases {
  21                 ethernet0 = &enet0;
  22                 ethernet1 = &enet1;
  23                 serial0 = &serial0;
  24                 serial1 = &serial1;
  25                 pci0 = &pci0;
  26                 pci1 = &pci1;
  27                 pci2 = &pci2;
  28                 pci3 = &pci3;
  29         };
  30
  31         cpus {
  32                 #cpus = <1>;
  33                 #address-cells = <1>;
  34                 #size-cells = <0>;
  35
  36                 PowerPC,8536@0 {
  37                         device_type = "cpu";
  38                         reg = <0>;
  39                         next-level-cache = <&L2>;
  40                 };
  41         };
  42
  43         memory {
  44                 device_type = "memory";
  45                 reg = <00000000 00000000>;      // Filled by U-Boot
  46         };
  47
  48         soc@ffe00000 {
  49                 #address-cells = <1>;
  50                 #size-cells = <1>;
  51                 device_type = "soc";
  52                 compatible = "simple-bus";
  53                 ranges = <0x0 0xffe00000 0x100000>;
  54                 reg = <0xffe00000 0x1000>;
  55                 bus-frequency = <0>;            // Filled out by uboot.
  56
  57                 memory-controller@2000 {
  58                         compatible = "fsl,mpc8536-memory-controller";
  59                         reg = <0x2000 0x1000>;
  60                         interrupt-parent = <&mpic>;
  61                         interrupts = <18 0x2>;
  62                 };
  63
  64                 L2: l2-cache-controller@20000 {
  65                         compatible = "fsl,mpc8536-l2-cache-controller";
  66                         reg = <0x20000 0x1000>;
  67                         interrupt-parent = <&mpic>;
  68                         interrupts = <16 0x2>;
  69                 };
  70
  71                 i2c@3000 {
  72                         #address-cells = <1>;
  73                         #size-cells = <0>;
  74                         cell-index = <0>;
  75                         compatible = "fsl-i2c";
  76                         reg = <0x3000 0x100>;
  77                         interrupts = <43 0x2>;
  78                         interrupt-parent = <&mpic>;
  79                         dfsrr;
  80                 };
  81
  82                 i2c@3100 {
  83                         #address-cells = <1>;
  84                         #size-cells = <0>;
  85                         cell-index = <1>;
  86                         compatible = "fsl-i2c";
  87                         reg = <0x3100 0x100>;
  88                         interrupts = <43 0x2>;
  89                         interrupt-parent = <&mpic>;
  90                         dfsrr;
  91                         rtc@68 {
  92                                 compatible = "dallas,ds3232";
  93                                 reg = <0x68>;
  94                                 interrupts = <0 0x1>;
  95                                 interrupt-parent = <&mpic>;
  96                         };
  97                 };
  98
  99                 dma@21300 {
 100                         #address-cells = <1>;
 101                         #size-cells = <1>;
 102                         compatible = "fsl,mpc8536-dma", "fsl,eloplus-dma";
 103                         reg = <0x21300 4>;
 104                         ranges = <0 0x21100 0x200>;
 105                         cell-index = <0>;
 106                         dma-channel@0 {
 107                                 compatible = "fsl,mpc8536-dma-channel",
 108                                              "fsl,eloplus-dma-channel";
 109                                 reg = <0x0 0x80>;
 110                                 cell-index = <0>;
 111                                 interrupt-parent = <&mpic>;
 112                                 interrupts = <20 2>;
 113                         };
 114                         dma-channel@80 {
 115                                 compatible = "fsl,mpc8536-dma-channel",
 116                                              "fsl,eloplus-dma-channel";
 117                                 reg = <0x80 0x80>;
 118                                 cell-index = <1>;
 119                                 interrupt-parent = <&mpic>;
 120                                 interrupts = <21 2>;
 121                         };
 122                         dma-channel@100 {
 123                                 compatible = "fsl,mpc8536-dma-channel",
 124                                              "fsl,eloplus-dma-channel";
 125                                 reg = <0x100 0x80>;
 126                                 cell-index = <2>;
 127                                 interrupt-parent = <&mpic>;
 128                                 interrupts = <22 2>;
 129                         };
 130                         dma-channel@180 {
 131                                 compatible = "fsl,mpc8536-dma-channel",
 132                                              "fsl,eloplus-dma-channel";
 133                                 reg = <0x180 0x80>;
 134                                 cell-index = <3>;
 135                                 interrupt-parent = <&mpic>;
 136                                 interrupts = <23 2>;
 137                         };
 138                 };
 139
 140                 usb@22000 {
 141                         compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
 142                         reg = <0x22000 0x1000>;
 143                         #address-cells = <1>;
 144                         #size-cells = <0>;
 145                         interrupt-parent = <&mpic>;
 146                         interrupts = <28 0x2>;
 147                         phy_type = "ulpi";
 148                 };
 149
 150                 usb@23000 {
 151                         compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
 152                         reg = <0x23000 0x1000>;
 153                         #address-cells = <1>;
 154                         #size-cells = <0>;
 155                         interrupt-parent = <&mpic>;
 156                         interrupts = <46 0x2>;
 157                         phy_type = "ulpi";
 158                 };
 159
 160                 enet0: ethernet@24000 {
 161                         #address-cells = <1>;
 162                         #size-cells = <1>;
 163                         cell-index = <0>;
 164                         device_type = "network";
 165                         model = "eTSEC";
 166                         compatible = "gianfar";
 167                         reg = <0x24000 0x1000>;
 168                         ranges = <0x0 0x24000 0x1000>;
 169                         local-mac-address = [ 00 00 00 00 00 00 ];
 170                         interrupts = <29 2 30 2 34 2>;
 171                         interrupt-parent = <&mpic>;
 172                         tbi-handle = <&tbi0>;
 173                         phy-handle = <&phy1>;
 174                         phy-connection-type = "rgmii-id";
 175
 176                         mdio@520 {
 177                                 #address-cells = <1>;
 178                                 #size-cells = <0>;
 179                                 compatible = "fsl,gianfar-mdio";
 180                                 reg = <0x520 0x20>;
 181
 182                                 phy0: ethernet-phy@0 {
 183                                         interrupt-parent = <&mpic>;
 184                                         interrupts = <10 0x1>;
 185                                         reg = <0>;
 186                                         device_type = "ethernet-phy";
 187                                 };
 188                                 phy1: ethernet-phy@1 {
 189                                         interrupt-parent = <&mpic>;
 190                                         interrupts = <10 0x1>;
 191                                         reg = <1>;
 192                                         device_type = "ethernet-phy";
 193                                 };
 194                                 tbi0: tbi-phy@11 {
 195                                         reg = <0x11>;
 196                                         device_type = "tbi-phy";
 197                                 };
 198                         };
 199                 };
 200
 201                 enet1: ethernet@26000 {
 202                         #address-cells = <1>;
 203                         #size-cells = <1>;
 204                         cell-index = <1>;
 205                         device_type = "network";
 206                         model = "eTSEC";
 207                         compatible = "gianfar";
 208                         reg = <0x26000 0x1000>;
 209                         ranges = <0x0 0x26000 0x1000>;
 210                         local-mac-address = [ 00 00 00 00 00 00 ];
 211                         interrupts = <31 2 32 2 33 2>;
 212                         interrupt-parent = <&mpic>;
 213                         tbi-handle = <&tbi1>;
 214                         phy-handle = <&phy0>;
 215                         phy-connection-type = "rgmii-id";
 216
 217                         mdio@520 {
 218                                 #address-cells = <1>;
 219                                 #size-cells = <0>;
 220                                 compatible = "fsl,gianfar-tbi";
 221                                 reg = <0x520 0x20>;
 222
 223                                 tbi1: tbi-phy@11 {
 224                                         reg = <0x11>;
 225                                         device_type = "tbi-phy";
 226                                 };
 227                         };
 228                 };
 229
 230                 usb@2b000 {
 231                         compatible = "fsl,mpc8536-usb2-dr", "fsl-usb2-dr";
 232                         reg = <0x2b000 0x1000>;
 233                         #address-cells = <1>;
 234                         #size-cells = <0>;
 235                         interrupt-parent = <&mpic>;
 236                         interrupts = <60 0x2>;
 237                         dr_mode = "peripheral";
 238                         phy_type = "ulpi";
 239                 };
 240
 241                 serial0: serial@4500 {
 242                         cell-index = <0>;
 243                         device_type = "serial";
 244                         compatible = "ns16550";
 245                         reg = <0x4500 0x100>;
 246                         clock-frequency = <0>;
 247                         interrupts = <42 0x2>;
 248                         interrupt-parent = <&mpic>;
 249                 };
 250
 251                 serial1: serial@4600 {
 252                         cell-index = <1>;
 253                         device_type = "serial";
 254                         compatible = "ns16550";
 255                         reg = <0x4600 0x100>;
 256                         clock-frequency = <0>;
 257                         interrupts = <42 0x2>;
 258                         interrupt-parent = <&mpic>;
 259                 };
 260
 261                 crypto@30000 {
 262                         compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
 263                                      "fsl,sec2.1", "fsl,sec2.0";
 264                         reg = <0x30000 0x10000>;
 265                         interrupts = <45 2 58 2>;
 266                         interrupt-parent = <&mpic>;
 267                         fsl,num-channels = <4>;
 268                         fsl,channel-fifo-len = <24>;
 269                         fsl,exec-units-mask = <0x9fe>;
 270                         fsl,descriptor-types-mask = <0x3ab0ebf>;
 271                 };
 272
 273                 sata@18000 {
 274                         compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
 275                         reg = <0x18000 0x1000>;
 276                         cell-index = <1>;
 277                         interrupts = <74 0x2>;
 278                         interrupt-parent = <&mpic>;
 279                 };
 280
 281                 sata@19000 {
 282                         compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
 283                         reg = <0x19000 0x1000>;
 284                         cell-index = <2>;
 285                         interrupts = <41 0x2>;
 286                         interrupt-parent = <&mpic>;
 287                 };
 288
 289                 global-utilities@e0000 {        //global utilities block
 290                         compatible = "fsl,mpc8548-guts";
 291                         reg = <0xe0000 0x1000>;
 292                         fsl,has-rstcr;
 293                 };
 294
 295                 mpic: pic@40000 {
 296                         clock-frequency = <0>;
 297                         interrupt-controller;
 298                         #address-cells = <0>;
 299                         #interrupt-cells = <2>;
 300                         reg = <0x40000 0x40000>;
 301                         compatible = "chrp,open-pic";
 302                         device_type = "open-pic";
 303                         big-endian;
 304                 };
 305
 306                 msi@41600 {
 307                         compatible = "fsl,mpc8536-msi", "fsl,mpic-msi";
 308                         reg = <0x41600 0x80>;
 309                         msi-available-ranges = <0 0x100>;
 310                         interrupts = <
 311                                 0xe0 0
 312                                 0xe1 0
 313                                 0xe2 0
 314                                 0xe3 0
 315                                 0xe4 0
 316                                 0xe5 0
 317                                 0xe6 0
 318                                 0xe7 0>;
 319                         interrupt-parent = <&mpic>;
 320                 };
 321         };
 322
 323         pci0: pci@ffe08000 {
 324                 cell-index = <0>;
 325                 compatible = "fsl,mpc8540-pci";
 326                 device_type = "pci";
 327                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 328                 interrupt-map = <
 329
 330                         /* IDSEL 0x11 J17 Slot 1 */
 331                         0x8800 0 0 1 &mpic 1 1
 332                         0x8800 0 0 2 &mpic 2 1
 333                         0x8800 0 0 3 &mpic 3 1
 334                         0x8800 0 0 4 &mpic 4 1>;
 335
 336                 interrupt-parent = <&mpic>;
 337                 interrupts = <24 0x2>;
 338                 bus-range = <0 0xff>;
 339                 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x10000000
 340                           0x01000000 0 0x00000000 0xffc00000 0 0x00010000>;
 341                 clock-frequency = <66666666>;
 342                 #interrupt-cells = <1>;
 343                 #size-cells = <2>;
 344                 #address-cells = <3>;
 345                 reg = <0xffe08000 0x1000>;
 346         };
 347
 348         pci1: pcie@ffe09000 {
 349                 cell-index = <1>;
 350                 compatible = "fsl,mpc8548-pcie";
 351                 device_type = "pci";
 352                 #interrupt-cells = <1>;
 353                 #size-cells = <2>;
 354                 #address-cells = <3>;
 355                 reg = <0xffe09000 0x1000>;
 356                 bus-range = <0 0xff>;
 357                 ranges = <0x02000000 0 0x98000000 0x98000000 0 0x08000000
 358                           0x01000000 0 0x00000000 0xffc20000 0 0x00010000>;
 359                 clock-frequency = <33333333>;
 360                 interrupt-parent = <&mpic>;
 361                 interrupts = <25 0x2>;
 362                 interrupt-map-mask = <0xf800 0 0 7>;
 363                 interrupt-map = <
 364                         /* IDSEL 0x0 */
 365                         0000 0 0 1 &mpic 4 1
 366                         0000 0 0 2 &mpic 5 1
 367                         0000 0 0 3 &mpic 6 1
 368                         0000 0 0 4 &mpic 7 1
 369                         >;
 370                 pcie@0 {
 371                         reg = <0 0 0 0 0>;
 372                         #size-cells = <2>;
 373                         #address-cells = <3>;
 374                         device_type = "pci";
 375                         ranges = <0x02000000 0 0x98000000
 376                                   0x02000000 0 0x98000000
 377                                   0 0x08000000
 378
 379                                   0x01000000 0 0x00000000
 380                                   0x01000000 0 0x00000000
 381                                   0 0x00010000>;
 382                 };
 383         };
 384
 385         pci2: pcie@ffe0a000 {
 386                 cell-index = <2>;
 387                 compatible = "fsl,mpc8548-pcie";
 388                 device_type = "pci";
 389                 #interrupt-cells = <1>;
 390                 #size-cells = <2>;
 391                 #address-cells = <3>;
 392                 reg = <0xffe0a000 0x1000>;
 393                 bus-range = <0 0xff>;
 394                 ranges = <0x02000000 0 0x90000000 0x90000000 0 0x08000000
 395                           0x01000000 0 0x00000000 0xffc10000 0 0x00010000>;
 396                 clock-frequency = <33333333>;
 397                 interrupt-parent = <&mpic>;
 398                 interrupts = <26 0x2>;
 399                 interrupt-map-mask = <0xf800 0 0 7>;
 400                 interrupt-map = <
 401                         /* IDSEL 0x0 */
 402                         0000 0 0 1 &mpic 0 1
 403                         0000 0 0 2 &mpic 1 1
 404                         0000 0 0 3 &mpic 2 1
 405                         0000 0 0 4 &mpic 3 1
 406                         >;
 407                 pcie@0 {
 408                         reg = <0 0 0 0 0>;
 409                         #size-cells = <2>;
 410                         #address-cells = <3>;
 411                         device_type = "pci";
 412                         ranges = <0x02000000 0 0x90000000
 413                                   0x02000000 0 0x90000000
 414                                   0 0x08000000
 415
 416                                   0x01000000 0 0x00000000
 417                                   0x01000000 0 0x00000000
 418                                   0 0x00010000>;
 419                 };
 420         };
 421
 422         pci3: pcie@ffe0b000 {
 423                 cell-index = <3>;
 424                 compatible = "fsl,mpc8548-pcie";
 425                 device_type = "pci";
 426                 #interrupt-cells = <1>;
 427                 #size-cells = <2>;
 428                 #address-cells = <3>;
 429                 reg = <0xffe0b000 0x1000>;
 430                 bus-range = <0 0xff>;
 431                 ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x20000000
 432                           0x01000000 0 0x00000000 0xffc30000 0 0x00010000>;
 433                 clock-frequency = <33333333>;
 434                 interrupt-parent = <&mpic>;
 435                 interrupts = <27 0x2>;
 436                 interrupt-map-mask = <0xf800 0 0 7>;
 437                 interrupt-map = <
 438                         /* IDSEL 0x0 */
 439                         0000 0 0 1 &mpic 8 1
 440                         0000 0 0 2 &mpic 9 1
 441                         0000 0 0 3 &mpic 10 1
 442                         0000 0 0 4 &mpic 11 1
 443                         >;
 444
 445                 pcie@0 {
 446                         reg = <0 0 0 0 0>;
 447                         #size-cells = <2>;
 448                         #address-cells = <3>;
 449                         device_type = "pci";
 450                         ranges = <0x02000000 0 0xa0000000
 451                                   0x02000000 0 0xa0000000
 452                                   0 0x20000000
 453
 454                                   0x01000000 0 0x00000000
 455                                   0x01000000 0 0x00000000
 456                                   0 0x00100000>;
 457                 };
 458         };
 459 };