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Merge branch 'tracing-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[deliverable/linux.git] / arch / powerpc / boot / dts / mpc8641_hpcn.dts
1 /*
2 * MPC8641 HPCN Device Tree Source
3 *
4 * Copyright 2006 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12 /dts-v1/;
13
14 / {
15 model = "MPC8641HPCN";
16 compatible = "fsl,mpc8641hpcn";
17 #address-cells = <1>;
18 #size-cells = <1>;
19
20 aliases {
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 ethernet2 = &enet2;
24 ethernet3 = &enet3;
25 serial0 = &serial0;
26 serial1 = &serial1;
27 pci0 = &pci0;
28 pci1 = &pci1;
29 /*
30 * Only one of Rapid IO or PCI can be present due to HW limitations and
31 * due to the fact that the 2 now share address space in the new memory
32 * map. The most likely case is that we have PCI, so comment out the
33 * rapidio node. Leave it here for reference.
34 */
35 /* rapidio0 = &rapidio0; */
36 };
37
38 cpus {
39 #address-cells = <1>;
40 #size-cells = <0>;
41
42 PowerPC,8641@0 {
43 device_type = "cpu";
44 reg = <0>;
45 d-cache-line-size = <32>;
46 i-cache-line-size = <32>;
47 d-cache-size = <32768>; // L1
48 i-cache-size = <32768>; // L1
49 timebase-frequency = <0>; // From uboot
50 bus-frequency = <0>; // From uboot
51 clock-frequency = <0>; // From uboot
52 };
53 PowerPC,8641@1 {
54 device_type = "cpu";
55 reg = <1>;
56 d-cache-line-size = <32>;
57 i-cache-line-size = <32>;
58 d-cache-size = <32768>;
59 i-cache-size = <32768>;
60 timebase-frequency = <0>; // From uboot
61 bus-frequency = <0>; // From uboot
62 clock-frequency = <0>; // From uboot
63 };
64 };
65
66 memory {
67 device_type = "memory";
68 reg = <0x00000000 0x40000000>; // 1G at 0x0
69 };
70
71 localbus@ffe05000 {
72 #address-cells = <2>;
73 #size-cells = <1>;
74 compatible = "fsl,mpc8641-localbus", "simple-bus";
75 reg = <0xffe05000 0x1000>;
76 interrupts = <19 2>;
77 interrupt-parent = <&mpic>;
78
79 ranges = <0 0 0xef800000 0x00800000
80 2 0 0xffdf8000 0x00008000
81 3 0 0xffdf0000 0x00008000>;
82
83 flash@0,0 {
84 compatible = "cfi-flash";
85 reg = <0 0 0x00800000>;
86 bank-width = <2>;
87 device-width = <2>;
88 #address-cells = <1>;
89 #size-cells = <1>;
90 partition@0 {
91 label = "kernel";
92 reg = <0x00000000 0x00300000>;
93 };
94 partition@300000 {
95 label = "firmware b";
96 reg = <0x00300000 0x00100000>;
97 read-only;
98 };
99 partition@400000 {
100 label = "fs";
101 reg = <0x00400000 0x00300000>;
102 };
103 partition@700000 {
104 label = "firmware a";
105 reg = <0x00700000 0x00100000>;
106 read-only;
107 };
108 };
109 };
110
111 soc8641@ffe00000 {
112 #address-cells = <1>;
113 #size-cells = <1>;
114 device_type = "soc";
115 compatible = "simple-bus";
116 ranges = <0x00000000 0xffe00000 0x00100000>;
117 reg = <0xffe00000 0x00001000>; // CCSRBAR
118 bus-frequency = <0>;
119
120 i2c@3000 {
121 #address-cells = <1>;
122 #size-cells = <0>;
123 cell-index = <0>;
124 compatible = "fsl-i2c";
125 reg = <0x3000 0x100>;
126 interrupts = <43 2>;
127 interrupt-parent = <&mpic>;
128 dfsrr;
129 };
130
131 i2c@3100 {
132 #address-cells = <1>;
133 #size-cells = <0>;
134 cell-index = <1>;
135 compatible = "fsl-i2c";
136 reg = <0x3100 0x100>;
137 interrupts = <43 2>;
138 interrupt-parent = <&mpic>;
139 dfsrr;
140 };
141
142 dma@21300 {
143 #address-cells = <1>;
144 #size-cells = <1>;
145 compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma";
146 reg = <0x21300 0x4>;
147 ranges = <0x0 0x21100 0x200>;
148 cell-index = <0>;
149 dma-channel@0 {
150 compatible = "fsl,mpc8641-dma-channel",
151 "fsl,eloplus-dma-channel";
152 reg = <0x0 0x80>;
153 cell-index = <0>;
154 interrupt-parent = <&mpic>;
155 interrupts = <20 2>;
156 };
157 dma-channel@80 {
158 compatible = "fsl,mpc8641-dma-channel",
159 "fsl,eloplus-dma-channel";
160 reg = <0x80 0x80>;
161 cell-index = <1>;
162 interrupt-parent = <&mpic>;
163 interrupts = <21 2>;
164 };
165 dma-channel@100 {
166 compatible = "fsl,mpc8641-dma-channel",
167 "fsl,eloplus-dma-channel";
168 reg = <0x100 0x80>;
169 cell-index = <2>;
170 interrupt-parent = <&mpic>;
171 interrupts = <22 2>;
172 };
173 dma-channel@180 {
174 compatible = "fsl,mpc8641-dma-channel",
175 "fsl,eloplus-dma-channel";
176 reg = <0x180 0x80>;
177 cell-index = <3>;
178 interrupt-parent = <&mpic>;
179 interrupts = <23 2>;
180 };
181 };
182
183 enet0: ethernet@24000 {
184 #address-cells = <1>;
185 #size-cells = <1>;
186 cell-index = <0>;
187 device_type = "network";
188 model = "TSEC";
189 compatible = "gianfar";
190 reg = <0x24000 0x1000>;
191 ranges = <0x0 0x24000 0x1000>;
192 local-mac-address = [ 00 00 00 00 00 00 ];
193 interrupts = <29 2 30 2 34 2>;
194 interrupt-parent = <&mpic>;
195 tbi-handle = <&tbi0>;
196 phy-handle = <&phy0>;
197 phy-connection-type = "rgmii-id";
198
199 mdio@520 {
200 #address-cells = <1>;
201 #size-cells = <0>;
202 compatible = "fsl,gianfar-mdio";
203 reg = <0x520 0x20>;
204
205 phy0: ethernet-phy@0 {
206 interrupt-parent = <&mpic>;
207 interrupts = <10 1>;
208 reg = <0>;
209 device_type = "ethernet-phy";
210 };
211 phy1: ethernet-phy@1 {
212 interrupt-parent = <&mpic>;
213 interrupts = <10 1>;
214 reg = <1>;
215 device_type = "ethernet-phy";
216 };
217 phy2: ethernet-phy@2 {
218 interrupt-parent = <&mpic>;
219 interrupts = <10 1>;
220 reg = <2>;
221 device_type = "ethernet-phy";
222 };
223 phy3: ethernet-phy@3 {
224 interrupt-parent = <&mpic>;
225 interrupts = <10 1>;
226 reg = <3>;
227 device_type = "ethernet-phy";
228 };
229 tbi0: tbi-phy@11 {
230 reg = <0x11>;
231 device_type = "tbi-phy";
232 };
233 };
234 };
235
236 enet1: ethernet@25000 {
237 #address-cells = <1>;
238 #size-cells = <1>;
239 cell-index = <1>;
240 device_type = "network";
241 model = "TSEC";
242 compatible = "gianfar";
243 reg = <0x25000 0x1000>;
244 ranges = <0x0 0x25000 0x1000>;
245 local-mac-address = [ 00 00 00 00 00 00 ];
246 interrupts = <35 2 36 2 40 2>;
247 interrupt-parent = <&mpic>;
248 tbi-handle = <&tbi1>;
249 phy-handle = <&phy1>;
250 phy-connection-type = "rgmii-id";
251
252 mdio@520 {
253 #address-cells = <1>;
254 #size-cells = <0>;
255 compatible = "fsl,gianfar-tbi";
256 reg = <0x520 0x20>;
257
258 tbi1: tbi-phy@11 {
259 reg = <0x11>;
260 device_type = "tbi-phy";
261 };
262 };
263 };
264
265 enet2: ethernet@26000 {
266 #address-cells = <1>;
267 #size-cells = <1>;
268 cell-index = <2>;
269 device_type = "network";
270 model = "TSEC";
271 compatible = "gianfar";
272 reg = <0x26000 0x1000>;
273 ranges = <0x0 0x26000 0x1000>;
274 local-mac-address = [ 00 00 00 00 00 00 ];
275 interrupts = <31 2 32 2 33 2>;
276 interrupt-parent = <&mpic>;
277 tbi-handle = <&tbi2>;
278 phy-handle = <&phy2>;
279 phy-connection-type = "rgmii-id";
280
281 mdio@520 {
282 #address-cells = <1>;
283 #size-cells = <0>;
284 compatible = "fsl,gianfar-tbi";
285 reg = <0x520 0x20>;
286
287 tbi2: tbi-phy@11 {
288 reg = <0x11>;
289 device_type = "tbi-phy";
290 };
291 };
292 };
293
294 enet3: ethernet@27000 {
295 #address-cells = <1>;
296 #size-cells = <1>;
297 cell-index = <3>;
298 device_type = "network";
299 model = "TSEC";
300 compatible = "gianfar";
301 reg = <0x27000 0x1000>;
302 ranges = <0x0 0x27000 0x1000>;
303 local-mac-address = [ 00 00 00 00 00 00 ];
304 interrupts = <37 2 38 2 39 2>;
305 interrupt-parent = <&mpic>;
306 tbi-handle = <&tbi3>;
307 phy-handle = <&phy3>;
308 phy-connection-type = "rgmii-id";
309
310 mdio@520 {
311 #address-cells = <1>;
312 #size-cells = <0>;
313 compatible = "fsl,gianfar-tbi";
314 reg = <0x520 0x20>;
315
316 tbi3: tbi-phy@11 {
317 reg = <0x11>;
318 device_type = "tbi-phy";
319 };
320 };
321 };
322
323 serial0: serial@4500 {
324 cell-index = <0>;
325 device_type = "serial";
326 compatible = "ns16550";
327 reg = <0x4500 0x100>;
328 clock-frequency = <0>;
329 interrupts = <42 2>;
330 interrupt-parent = <&mpic>;
331 };
332
333 serial1: serial@4600 {
334 cell-index = <1>;
335 device_type = "serial";
336 compatible = "ns16550";
337 reg = <0x4600 0x100>;
338 clock-frequency = <0>;
339 interrupts = <28 2>;
340 interrupt-parent = <&mpic>;
341 };
342
343 mpic: pic@40000 {
344 interrupt-controller;
345 #address-cells = <0>;
346 #interrupt-cells = <2>;
347 reg = <0x40000 0x40000>;
348 compatible = "chrp,open-pic";
349 device_type = "open-pic";
350 };
351
352 global-utilities@e0000 {
353 compatible = "fsl,mpc8641-guts";
354 reg = <0xe0000 0x1000>;
355 fsl,has-rstcr;
356 };
357 };
358
359 pci0: pcie@ffe08000 {
360 cell-index = <0>;
361 compatible = "fsl,mpc8641-pcie";
362 device_type = "pci";
363 #interrupt-cells = <1>;
364 #size-cells = <2>;
365 #address-cells = <3>;
366 reg = <0xffe08000 0x1000>;
367 bus-range = <0x0 0xff>;
368 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000
369 0x01000000 0x0 0x00000000 0xffc00000 0x0 0x00010000>;
370 clock-frequency = <33333333>;
371 interrupt-parent = <&mpic>;
372 interrupts = <24 2>;
373 interrupt-map-mask = <0xff00 0 0 7>;
374 interrupt-map = <
375 /* IDSEL 0x11 func 0 - PCI slot 1 */
376 0x8800 0 0 1 &mpic 2 1
377 0x8800 0 0 2 &mpic 3 1
378 0x8800 0 0 3 &mpic 4 1
379 0x8800 0 0 4 &mpic 1 1
380
381 /* IDSEL 0x11 func 1 - PCI slot 1 */
382 0x8900 0 0 1 &mpic 2 1
383 0x8900 0 0 2 &mpic 3 1
384 0x8900 0 0 3 &mpic 4 1
385 0x8900 0 0 4 &mpic 1 1
386
387 /* IDSEL 0x11 func 2 - PCI slot 1 */
388 0x8a00 0 0 1 &mpic 2 1
389 0x8a00 0 0 2 &mpic 3 1
390 0x8a00 0 0 3 &mpic 4 1
391 0x8a00 0 0 4 &mpic 1 1
392
393 /* IDSEL 0x11 func 3 - PCI slot 1 */
394 0x8b00 0 0 1 &mpic 2 1
395 0x8b00 0 0 2 &mpic 3 1
396 0x8b00 0 0 3 &mpic 4 1
397 0x8b00 0 0 4 &mpic 1 1
398
399 /* IDSEL 0x11 func 4 - PCI slot 1 */
400 0x8c00 0 0 1 &mpic 2 1
401 0x8c00 0 0 2 &mpic 3 1
402 0x8c00 0 0 3 &mpic 4 1
403 0x8c00 0 0 4 &mpic 1 1
404
405 /* IDSEL 0x11 func 5 - PCI slot 1 */
406 0x8d00 0 0 1 &mpic 2 1
407 0x8d00 0 0 2 &mpic 3 1
408 0x8d00 0 0 3 &mpic 4 1
409 0x8d00 0 0 4 &mpic 1 1
410
411 /* IDSEL 0x11 func 6 - PCI slot 1 */
412 0x8e00 0 0 1 &mpic 2 1
413 0x8e00 0 0 2 &mpic 3 1
414 0x8e00 0 0 3 &mpic 4 1
415 0x8e00 0 0 4 &mpic 1 1
416
417 /* IDSEL 0x11 func 7 - PCI slot 1 */
418 0x8f00 0 0 1 &mpic 2 1
419 0x8f00 0 0 2 &mpic 3 1
420 0x8f00 0 0 3 &mpic 4 1
421 0x8f00 0 0 4 &mpic 1 1
422
423 /* IDSEL 0x12 func 0 - PCI slot 2 */
424 0x9000 0 0 1 &mpic 3 1
425 0x9000 0 0 2 &mpic 4 1
426 0x9000 0 0 3 &mpic 1 1
427 0x9000 0 0 4 &mpic 2 1
428
429 /* IDSEL 0x12 func 1 - PCI slot 2 */
430 0x9100 0 0 1 &mpic 3 1
431 0x9100 0 0 2 &mpic 4 1
432 0x9100 0 0 3 &mpic 1 1
433 0x9100 0 0 4 &mpic 2 1
434
435 /* IDSEL 0x12 func 2 - PCI slot 2 */
436 0x9200 0 0 1 &mpic 3 1
437 0x9200 0 0 2 &mpic 4 1
438 0x9200 0 0 3 &mpic 1 1
439 0x9200 0 0 4 &mpic 2 1
440
441 /* IDSEL 0x12 func 3 - PCI slot 2 */
442 0x9300 0 0 1 &mpic 3 1
443 0x9300 0 0 2 &mpic 4 1
444 0x9300 0 0 3 &mpic 1 1
445 0x9300 0 0 4 &mpic 2 1
446
447 /* IDSEL 0x12 func 4 - PCI slot 2 */
448 0x9400 0 0 1 &mpic 3 1
449 0x9400 0 0 2 &mpic 4 1
450 0x9400 0 0 3 &mpic 1 1
451 0x9400 0 0 4 &mpic 2 1
452
453 /* IDSEL 0x12 func 5 - PCI slot 2 */
454 0x9500 0 0 1 &mpic 3 1
455 0x9500 0 0 2 &mpic 4 1
456 0x9500 0 0 3 &mpic 1 1
457 0x9500 0 0 4 &mpic 2 1
458
459 /* IDSEL 0x12 func 6 - PCI slot 2 */
460 0x9600 0 0 1 &mpic 3 1
461 0x9600 0 0 2 &mpic 4 1
462 0x9600 0 0 3 &mpic 1 1
463 0x9600 0 0 4 &mpic 2 1
464
465 /* IDSEL 0x12 func 7 - PCI slot 2 */
466 0x9700 0 0 1 &mpic 3 1
467 0x9700 0 0 2 &mpic 4 1
468 0x9700 0 0 3 &mpic 1 1
469 0x9700 0 0 4 &mpic 2 1
470
471 // IDSEL 0x1c USB
472 0xe000 0 0 1 &i8259 12 2
473 0xe100 0 0 2 &i8259 9 2
474 0xe200 0 0 3 &i8259 10 2
475 0xe300 0 0 4 &i8259 11 2
476
477 // IDSEL 0x1d Audio
478 0xe800 0 0 1 &i8259 6 2
479
480 // IDSEL 0x1e Legacy
481 0xf000 0 0 1 &i8259 7 2
482 0xf100 0 0 1 &i8259 7 2
483
484 // IDSEL 0x1f IDE/SATA
485 0xf800 0 0 1 &i8259 14 2
486 0xf900 0 0 1 &i8259 5 2
487 >;
488
489 pcie@0 {
490 reg = <0 0 0 0 0>;
491 #size-cells = <2>;
492 #address-cells = <3>;
493 device_type = "pci";
494 ranges = <0x02000000 0x0 0x80000000
495 0x02000000 0x0 0x80000000
496 0x0 0x20000000
497
498 0x01000000 0x0 0x00000000
499 0x01000000 0x0 0x00000000
500 0x0 0x00010000>;
501 uli1575@0 {
502 reg = <0 0 0 0 0>;
503 #size-cells = <2>;
504 #address-cells = <3>;
505 ranges = <0x02000000 0x0 0x80000000
506 0x02000000 0x0 0x80000000
507 0x0 0x20000000
508 0x01000000 0x0 0x00000000
509 0x01000000 0x0 0x00000000
510 0x0 0x00010000>;
511 isa@1e {
512 device_type = "isa";
513 #interrupt-cells = <2>;
514 #size-cells = <1>;
515 #address-cells = <2>;
516 reg = <0xf000 0 0 0 0>;
517 ranges = <1 0 0x01000000 0 0
518 0x00001000>;
519 interrupt-parent = <&i8259>;
520
521 i8259: interrupt-controller@20 {
522 reg = <1 0x20 2
523 1 0xa0 2
524 1 0x4d0 2>;
525 interrupt-controller;
526 device_type = "interrupt-controller";
527 #address-cells = <0>;
528 #interrupt-cells = <2>;
529 compatible = "chrp,iic";
530 interrupts = <9 2>;
531 interrupt-parent = <&mpic>;
532 };
533
534 i8042@60 {
535 #size-cells = <0>;
536 #address-cells = <1>;
537 reg = <1 0x60 1 1 0x64 1>;
538 interrupts = <1 3 12 3>;
539 interrupt-parent =
540 <&i8259>;
541
542 keyboard@0 {
543 reg = <0>;
544 compatible = "pnpPNP,303";
545 };
546
547 mouse@1 {
548 reg = <1>;
549 compatible = "pnpPNP,f03";
550 };
551 };
552
553 rtc@70 {
554 compatible =
555 "pnpPNP,b00";
556 reg = <1 0x70 2>;
557 };
558
559 gpio@400 {
560 reg = <1 0x400 0x80>;
561 };
562 };
563 };
564 };
565
566 };
567
568 pci1: pcie@ffe09000 {
569 cell-index = <1>;
570 compatible = "fsl,mpc8641-pcie";
571 device_type = "pci";
572 #interrupt-cells = <1>;
573 #size-cells = <2>;
574 #address-cells = <3>;
575 reg = <0xffe09000 0x1000>;
576 bus-range = <0 0xff>;
577 ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
578 0x01000000 0x0 0x00000000 0xffc10000 0x0 0x00010000>;
579 clock-frequency = <33333333>;
580 interrupt-parent = <&mpic>;
581 interrupts = <25 2>;
582 interrupt-map-mask = <0xf800 0 0 7>;
583 interrupt-map = <
584 /* IDSEL 0x0 */
585 0x0000 0 0 1 &mpic 4 1
586 0x0000 0 0 2 &mpic 5 1
587 0x0000 0 0 3 &mpic 6 1
588 0x0000 0 0 4 &mpic 7 1
589 >;
590 pcie@0 {
591 reg = <0 0 0 0 0>;
592 #size-cells = <2>;
593 #address-cells = <3>;
594 device_type = "pci";
595 ranges = <0x02000000 0x0 0xa0000000
596 0x02000000 0x0 0xa0000000
597 0x0 0x20000000
598
599 0x01000000 0x0 0x00000000
600 0x01000000 0x0 0x00000000
601 0x0 0x00010000>;
602 };
603 };
604 /*
605 rapidio0: rapidio@ffec0000 {
606 #address-cells = <2>;
607 #size-cells = <2>;
608 compatible = "fsl,rapidio-delta";
609 reg = <0xffec0000 0x20000>;
610 ranges = <0 0 0x80000000 0 0x20000000>;
611 interrupt-parent = <&mpic>;
612 // err_irq bell_outb_irq bell_inb_irq
613 // msg1_tx_irq msg1_rx_irq msg2_tx_irq msg2_rx_irq
614 interrupts = <48 2 49 2 50 2 53 2 54 2 55 2 56 2>;
615 };
616 */
617
618 };
Linux kernel - Deliverables
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