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powerpc/86xx: Add new LAW & MCM device tree nodes for all 86xx systems
[deliverable/linux.git] / arch / powerpc / boot / dts / mpc8641_hpcn.dts
1 /*
2 * MPC8641 HPCN Device Tree Source
3 *
4 * Copyright 2006 Freescale Semiconductor Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12 /dts-v1/;
13
14 / {
15 model = "MPC8641HPCN";
16 compatible = "fsl,mpc8641hpcn";
17 #address-cells = <1>;
18 #size-cells = <1>;
19
20 aliases {
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 ethernet2 = &enet2;
24 ethernet3 = &enet3;
25 serial0 = &serial0;
26 serial1 = &serial1;
27 pci0 = &pci0;
28 pci1 = &pci1;
29 /*
30 * Only one of Rapid IO or PCI can be present due to HW limitations and
31 * due to the fact that the 2 now share address space in the new memory
32 * map. The most likely case is that we have PCI, so comment out the
33 * rapidio node. Leave it here for reference.
34 */
35 /* rapidio0 = &rapidio0; */
36 };
37
38 cpus {
39 #address-cells = <1>;
40 #size-cells = <0>;
41
42 PowerPC,8641@0 {
43 device_type = "cpu";
44 reg = <0>;
45 d-cache-line-size = <32>;
46 i-cache-line-size = <32>;
47 d-cache-size = <32768>; // L1
48 i-cache-size = <32768>; // L1
49 timebase-frequency = <0>; // From uboot
50 bus-frequency = <0>; // From uboot
51 clock-frequency = <0>; // From uboot
52 };
53 PowerPC,8641@1 {
54 device_type = "cpu";
55 reg = <1>;
56 d-cache-line-size = <32>;
57 i-cache-line-size = <32>;
58 d-cache-size = <32768>;
59 i-cache-size = <32768>;
60 timebase-frequency = <0>; // From uboot
61 bus-frequency = <0>; // From uboot
62 clock-frequency = <0>; // From uboot
63 };
64 };
65
66 memory {
67 device_type = "memory";
68 reg = <0x00000000 0x40000000>; // 1G at 0x0
69 };
70
71 localbus@ffe05000 {
72 #address-cells = <2>;
73 #size-cells = <1>;
74 compatible = "fsl,mpc8641-localbus", "simple-bus";
75 reg = <0xffe05000 0x1000>;
76 interrupts = <19 2>;
77 interrupt-parent = <&mpic>;
78
79 ranges = <0 0 0xef800000 0x00800000
80 2 0 0xffdf8000 0x00008000
81 3 0 0xffdf0000 0x00008000>;
82
83 flash@0,0 {
84 compatible = "cfi-flash";
85 reg = <0 0 0x00800000>;
86 bank-width = <2>;
87 device-width = <2>;
88 #address-cells = <1>;
89 #size-cells = <1>;
90 partition@0 {
91 label = "kernel";
92 reg = <0x00000000 0x00300000>;
93 };
94 partition@300000 {
95 label = "firmware b";
96 reg = <0x00300000 0x00100000>;
97 read-only;
98 };
99 partition@400000 {
100 label = "fs";
101 reg = <0x00400000 0x00300000>;
102 };
103 partition@700000 {
104 label = "firmware a";
105 reg = <0x00700000 0x00100000>;
106 read-only;
107 };
108 };
109 };
110
111 soc8641@ffe00000 {
112 #address-cells = <1>;
113 #size-cells = <1>;
114 device_type = "soc";
115 compatible = "simple-bus";
116 ranges = <0x00000000 0xffe00000 0x00100000>;
117 reg = <0xffe00000 0x00001000>; // CCSRBAR
118 bus-frequency = <0>;
119
120 mcm-law@0 {
121 compatible = "fsl,mcm-law";
122 reg = <0x0 0x1000>;
123 fsl,num-laws = <10>;
124 };
125
126 mcm@1000 {
127 compatible = "fsl,mpc8641-mcm", "fsl,mcm";
128 reg = <0x1000 0x1000>;
129 interrupts = <17 2>;
130 interrupt-parent = <&mpic>;
131 };
132
133 i2c@3000 {
134 #address-cells = <1>;
135 #size-cells = <0>;
136 cell-index = <0>;
137 compatible = "fsl-i2c";
138 reg = <0x3000 0x100>;
139 interrupts = <43 2>;
140 interrupt-parent = <&mpic>;
141 dfsrr;
142 };
143
144 i2c@3100 {
145 #address-cells = <1>;
146 #size-cells = <0>;
147 cell-index = <1>;
148 compatible = "fsl-i2c";
149 reg = <0x3100 0x100>;
150 interrupts = <43 2>;
151 interrupt-parent = <&mpic>;
152 dfsrr;
153 };
154
155 dma@21300 {
156 #address-cells = <1>;
157 #size-cells = <1>;
158 compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma";
159 reg = <0x21300 0x4>;
160 ranges = <0x0 0x21100 0x200>;
161 cell-index = <0>;
162 dma-channel@0 {
163 compatible = "fsl,mpc8641-dma-channel",
164 "fsl,eloplus-dma-channel";
165 reg = <0x0 0x80>;
166 cell-index = <0>;
167 interrupt-parent = <&mpic>;
168 interrupts = <20 2>;
169 };
170 dma-channel@80 {
171 compatible = "fsl,mpc8641-dma-channel",
172 "fsl,eloplus-dma-channel";
173 reg = <0x80 0x80>;
174 cell-index = <1>;
175 interrupt-parent = <&mpic>;
176 interrupts = <21 2>;
177 };
178 dma-channel@100 {
179 compatible = "fsl,mpc8641-dma-channel",
180 "fsl,eloplus-dma-channel";
181 reg = <0x100 0x80>;
182 cell-index = <2>;
183 interrupt-parent = <&mpic>;
184 interrupts = <22 2>;
185 };
186 dma-channel@180 {
187 compatible = "fsl,mpc8641-dma-channel",
188 "fsl,eloplus-dma-channel";
189 reg = <0x180 0x80>;
190 cell-index = <3>;
191 interrupt-parent = <&mpic>;
192 interrupts = <23 2>;
193 };
194 };
195
196 enet0: ethernet@24000 {
197 #address-cells = <1>;
198 #size-cells = <1>;
199 cell-index = <0>;
200 device_type = "network";
201 model = "TSEC";
202 compatible = "gianfar";
203 reg = <0x24000 0x1000>;
204 ranges = <0x0 0x24000 0x1000>;
205 local-mac-address = [ 00 00 00 00 00 00 ];
206 interrupts = <29 2 30 2 34 2>;
207 interrupt-parent = <&mpic>;
208 tbi-handle = <&tbi0>;
209 phy-handle = <&phy0>;
210 phy-connection-type = "rgmii-id";
211
212 mdio@520 {
213 #address-cells = <1>;
214 #size-cells = <0>;
215 compatible = "fsl,gianfar-mdio";
216 reg = <0x520 0x20>;
217
218 phy0: ethernet-phy@0 {
219 interrupt-parent = <&mpic>;
220 interrupts = <10 1>;
221 reg = <0>;
222 device_type = "ethernet-phy";
223 };
224 phy1: ethernet-phy@1 {
225 interrupt-parent = <&mpic>;
226 interrupts = <10 1>;
227 reg = <1>;
228 device_type = "ethernet-phy";
229 };
230 phy2: ethernet-phy@2 {
231 interrupt-parent = <&mpic>;
232 interrupts = <10 1>;
233 reg = <2>;
234 device_type = "ethernet-phy";
235 };
236 phy3: ethernet-phy@3 {
237 interrupt-parent = <&mpic>;
238 interrupts = <10 1>;
239 reg = <3>;
240 device_type = "ethernet-phy";
241 };
242 tbi0: tbi-phy@11 {
243 reg = <0x11>;
244 device_type = "tbi-phy";
245 };
246 };
247 };
248
249 enet1: ethernet@25000 {
250 #address-cells = <1>;
251 #size-cells = <1>;
252 cell-index = <1>;
253 device_type = "network";
254 model = "TSEC";
255 compatible = "gianfar";
256 reg = <0x25000 0x1000>;
257 ranges = <0x0 0x25000 0x1000>;
258 local-mac-address = [ 00 00 00 00 00 00 ];
259 interrupts = <35 2 36 2 40 2>;
260 interrupt-parent = <&mpic>;
261 tbi-handle = <&tbi1>;
262 phy-handle = <&phy1>;
263 phy-connection-type = "rgmii-id";
264
265 mdio@520 {
266 #address-cells = <1>;
267 #size-cells = <0>;
268 compatible = "fsl,gianfar-tbi";
269 reg = <0x520 0x20>;
270
271 tbi1: tbi-phy@11 {
272 reg = <0x11>;
273 device_type = "tbi-phy";
274 };
275 };
276 };
277
278 enet2: ethernet@26000 {
279 #address-cells = <1>;
280 #size-cells = <1>;
281 cell-index = <2>;
282 device_type = "network";
283 model = "TSEC";
284 compatible = "gianfar";
285 reg = <0x26000 0x1000>;
286 ranges = <0x0 0x26000 0x1000>;
287 local-mac-address = [ 00 00 00 00 00 00 ];
288 interrupts = <31 2 32 2 33 2>;
289 interrupt-parent = <&mpic>;
290 tbi-handle = <&tbi2>;
291 phy-handle = <&phy2>;
292 phy-connection-type = "rgmii-id";
293
294 mdio@520 {
295 #address-cells = <1>;
296 #size-cells = <0>;
297 compatible = "fsl,gianfar-tbi";
298 reg = <0x520 0x20>;
299
300 tbi2: tbi-phy@11 {
301 reg = <0x11>;
302 device_type = "tbi-phy";
303 };
304 };
305 };
306
307 enet3: ethernet@27000 {
308 #address-cells = <1>;
309 #size-cells = <1>;
310 cell-index = <3>;
311 device_type = "network";
312 model = "TSEC";
313 compatible = "gianfar";
314 reg = <0x27000 0x1000>;
315 ranges = <0x0 0x27000 0x1000>;
316 local-mac-address = [ 00 00 00 00 00 00 ];
317 interrupts = <37 2 38 2 39 2>;
318 interrupt-parent = <&mpic>;
319 tbi-handle = <&tbi3>;
320 phy-handle = <&phy3>;
321 phy-connection-type = "rgmii-id";
322
323 mdio@520 {
324 #address-cells = <1>;
325 #size-cells = <0>;
326 compatible = "fsl,gianfar-tbi";
327 reg = <0x520 0x20>;
328
329 tbi3: tbi-phy@11 {
330 reg = <0x11>;
331 device_type = "tbi-phy";
332 };
333 };
334 };
335
336 serial0: serial@4500 {
337 cell-index = <0>;
338 device_type = "serial";
339 compatible = "ns16550";
340 reg = <0x4500 0x100>;
341 clock-frequency = <0>;
342 interrupts = <42 2>;
343 interrupt-parent = <&mpic>;
344 };
345
346 serial1: serial@4600 {
347 cell-index = <1>;
348 device_type = "serial";
349 compatible = "ns16550";
350 reg = <0x4600 0x100>;
351 clock-frequency = <0>;
352 interrupts = <28 2>;
353 interrupt-parent = <&mpic>;
354 };
355
356 mpic: pic@40000 {
357 interrupt-controller;
358 #address-cells = <0>;
359 #interrupt-cells = <2>;
360 reg = <0x40000 0x40000>;
361 compatible = "chrp,open-pic";
362 device_type = "open-pic";
363 };
364
365 global-utilities@e0000 {
366 compatible = "fsl,mpc8641-guts";
367 reg = <0xe0000 0x1000>;
368 fsl,has-rstcr;
369 };
370 };
371
372 pci0: pcie@ffe08000 {
373 compatible = "fsl,mpc8641-pcie";
374 device_type = "pci";
375 #interrupt-cells = <1>;
376 #size-cells = <2>;
377 #address-cells = <3>;
378 reg = <0xffe08000 0x1000>;
379 bus-range = <0x0 0xff>;
380 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000
381 0x01000000 0x0 0x00000000 0xffc00000 0x0 0x00010000>;
382 clock-frequency = <33333333>;
383 interrupt-parent = <&mpic>;
384 interrupts = <24 2>;
385 interrupt-map-mask = <0xff00 0 0 7>;
386 interrupt-map = <
387 /* IDSEL 0x11 func 0 - PCI slot 1 */
388 0x8800 0 0 1 &mpic 2 1
389 0x8800 0 0 2 &mpic 3 1
390 0x8800 0 0 3 &mpic 4 1
391 0x8800 0 0 4 &mpic 1 1
392
393 /* IDSEL 0x11 func 1 - PCI slot 1 */
394 0x8900 0 0 1 &mpic 2 1
395 0x8900 0 0 2 &mpic 3 1
396 0x8900 0 0 3 &mpic 4 1
397 0x8900 0 0 4 &mpic 1 1
398
399 /* IDSEL 0x11 func 2 - PCI slot 1 */
400 0x8a00 0 0 1 &mpic 2 1
401 0x8a00 0 0 2 &mpic 3 1
402 0x8a00 0 0 3 &mpic 4 1
403 0x8a00 0 0 4 &mpic 1 1
404
405 /* IDSEL 0x11 func 3 - PCI slot 1 */
406 0x8b00 0 0 1 &mpic 2 1
407 0x8b00 0 0 2 &mpic 3 1
408 0x8b00 0 0 3 &mpic 4 1
409 0x8b00 0 0 4 &mpic 1 1
410
411 /* IDSEL 0x11 func 4 - PCI slot 1 */
412 0x8c00 0 0 1 &mpic 2 1
413 0x8c00 0 0 2 &mpic 3 1
414 0x8c00 0 0 3 &mpic 4 1
415 0x8c00 0 0 4 &mpic 1 1
416
417 /* IDSEL 0x11 func 5 - PCI slot 1 */
418 0x8d00 0 0 1 &mpic 2 1
419 0x8d00 0 0 2 &mpic 3 1
420 0x8d00 0 0 3 &mpic 4 1
421 0x8d00 0 0 4 &mpic 1 1
422
423 /* IDSEL 0x11 func 6 - PCI slot 1 */
424 0x8e00 0 0 1 &mpic 2 1
425 0x8e00 0 0 2 &mpic 3 1
426 0x8e00 0 0 3 &mpic 4 1
427 0x8e00 0 0 4 &mpic 1 1
428
429 /* IDSEL 0x11 func 7 - PCI slot 1 */
430 0x8f00 0 0 1 &mpic 2 1
431 0x8f00 0 0 2 &mpic 3 1
432 0x8f00 0 0 3 &mpic 4 1
433 0x8f00 0 0 4 &mpic 1 1
434
435 /* IDSEL 0x12 func 0 - PCI slot 2 */
436 0x9000 0 0 1 &mpic 3 1
437 0x9000 0 0 2 &mpic 4 1
438 0x9000 0 0 3 &mpic 1 1
439 0x9000 0 0 4 &mpic 2 1
440
441 /* IDSEL 0x12 func 1 - PCI slot 2 */
442 0x9100 0 0 1 &mpic 3 1
443 0x9100 0 0 2 &mpic 4 1
444 0x9100 0 0 3 &mpic 1 1
445 0x9100 0 0 4 &mpic 2 1
446
447 /* IDSEL 0x12 func 2 - PCI slot 2 */
448 0x9200 0 0 1 &mpic 3 1
449 0x9200 0 0 2 &mpic 4 1
450 0x9200 0 0 3 &mpic 1 1
451 0x9200 0 0 4 &mpic 2 1
452
453 /* IDSEL 0x12 func 3 - PCI slot 2 */
454 0x9300 0 0 1 &mpic 3 1
455 0x9300 0 0 2 &mpic 4 1
456 0x9300 0 0 3 &mpic 1 1
457 0x9300 0 0 4 &mpic 2 1
458
459 /* IDSEL 0x12 func 4 - PCI slot 2 */
460 0x9400 0 0 1 &mpic 3 1
461 0x9400 0 0 2 &mpic 4 1
462 0x9400 0 0 3 &mpic 1 1
463 0x9400 0 0 4 &mpic 2 1
464
465 /* IDSEL 0x12 func 5 - PCI slot 2 */
466 0x9500 0 0 1 &mpic 3 1
467 0x9500 0 0 2 &mpic 4 1
468 0x9500 0 0 3 &mpic 1 1
469 0x9500 0 0 4 &mpic 2 1
470
471 /* IDSEL 0x12 func 6 - PCI slot 2 */
472 0x9600 0 0 1 &mpic 3 1
473 0x9600 0 0 2 &mpic 4 1
474 0x9600 0 0 3 &mpic 1 1
475 0x9600 0 0 4 &mpic 2 1
476
477 /* IDSEL 0x12 func 7 - PCI slot 2 */
478 0x9700 0 0 1 &mpic 3 1
479 0x9700 0 0 2 &mpic 4 1
480 0x9700 0 0 3 &mpic 1 1
481 0x9700 0 0 4 &mpic 2 1
482
483 // IDSEL 0x1c USB
484 0xe000 0 0 1 &i8259 12 2
485 0xe100 0 0 2 &i8259 9 2
486 0xe200 0 0 3 &i8259 10 2
487 0xe300 0 0 4 &i8259 11 2
488
489 // IDSEL 0x1d Audio
490 0xe800 0 0 1 &i8259 6 2
491
492 // IDSEL 0x1e Legacy
493 0xf000 0 0 1 &i8259 7 2
494 0xf100 0 0 1 &i8259 7 2
495
496 // IDSEL 0x1f IDE/SATA
497 0xf800 0 0 1 &i8259 14 2
498 0xf900 0 0 1 &i8259 5 2
499 >;
500
501 pcie@0 {
502 reg = <0 0 0 0 0>;
503 #size-cells = <2>;
504 #address-cells = <3>;
505 device_type = "pci";
506 ranges = <0x02000000 0x0 0x80000000
507 0x02000000 0x0 0x80000000
508 0x0 0x20000000
509
510 0x01000000 0x0 0x00000000
511 0x01000000 0x0 0x00000000
512 0x0 0x00010000>;
513 uli1575@0 {
514 reg = <0 0 0 0 0>;
515 #size-cells = <2>;
516 #address-cells = <3>;
517 ranges = <0x02000000 0x0 0x80000000
518 0x02000000 0x0 0x80000000
519 0x0 0x20000000
520 0x01000000 0x0 0x00000000
521 0x01000000 0x0 0x00000000
522 0x0 0x00010000>;
523 isa@1e {
524 device_type = "isa";
525 #interrupt-cells = <2>;
526 #size-cells = <1>;
527 #address-cells = <2>;
528 reg = <0xf000 0 0 0 0>;
529 ranges = <1 0 0x01000000 0 0
530 0x00001000>;
531 interrupt-parent = <&i8259>;
532
533 i8259: interrupt-controller@20 {
534 reg = <1 0x20 2
535 1 0xa0 2
536 1 0x4d0 2>;
537 interrupt-controller;
538 device_type = "interrupt-controller";
539 #address-cells = <0>;
540 #interrupt-cells = <2>;
541 compatible = "chrp,iic";
542 interrupts = <9 2>;
543 interrupt-parent = <&mpic>;
544 };
545
546 i8042@60 {
547 #size-cells = <0>;
548 #address-cells = <1>;
549 reg = <1 0x60 1 1 0x64 1>;
550 interrupts = <1 3 12 3>;
551 interrupt-parent =
552 <&i8259>;
553
554 keyboard@0 {
555 reg = <0>;
556 compatible = "pnpPNP,303";
557 };
558
559 mouse@1 {
560 reg = <1>;
561 compatible = "pnpPNP,f03";
562 };
563 };
564
565 rtc@70 {
566 compatible =
567 "pnpPNP,b00";
568 reg = <1 0x70 2>;
569 };
570
571 gpio@400 {
572 reg = <1 0x400 0x80>;
573 };
574 };
575 };
576 };
577
578 };
579
580 pci1: pcie@ffe09000 {
581 compatible = "fsl,mpc8641-pcie";
582 device_type = "pci";
583 #interrupt-cells = <1>;
584 #size-cells = <2>;
585 #address-cells = <3>;
586 reg = <0xffe09000 0x1000>;
587 bus-range = <0 0xff>;
588 ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
589 0x01000000 0x0 0x00000000 0xffc10000 0x0 0x00010000>;
590 clock-frequency = <33333333>;
591 interrupt-parent = <&mpic>;
592 interrupts = <25 2>;
593 interrupt-map-mask = <0xf800 0 0 7>;
594 interrupt-map = <
595 /* IDSEL 0x0 */
596 0x0000 0 0 1 &mpic 4 1
597 0x0000 0 0 2 &mpic 5 1
598 0x0000 0 0 3 &mpic 6 1
599 0x0000 0 0 4 &mpic 7 1
600 >;
601 pcie@0 {
602 reg = <0 0 0 0 0>;
603 #size-cells = <2>;
604 #address-cells = <3>;
605 device_type = "pci";
606 ranges = <0x02000000 0x0 0xa0000000
607 0x02000000 0x0 0xa0000000
608 0x0 0x20000000
609
610 0x01000000 0x0 0x00000000
611 0x01000000 0x0 0x00000000
612 0x0 0x00010000>;
613 };
614 };
615 /*
616 rapidio0: rapidio@ffec0000 {
617 #address-cells = <2>;
618 #size-cells = <2>;
619 compatible = "fsl,rapidio-delta";
620 reg = <0xffec0000 0x20000>;
621 ranges = <0 0 0x80000000 0 0x20000000>;
622 interrupt-parent = <&mpic>;
623 // err_irq bell_outb_irq bell_inb_irq
624 // msg1_tx_irq msg1_rx_irq msg2_tx_irq msg2_rx_irq
625 interrupts = <48 2 49 2 50 2 53 2 54 2 55 2 56 2>;
626 };
627 */
628
629 };
Linux kernel - Deliverables
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