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Merge commit 'kumar/next' into next
[deliverable/linux.git] / arch / powerpc / boot / dts / pcm030.dts
1 /*
2 * phyCORE-MPC5200B-tiny (pcm030) board Device Tree Source
3 *
4 * Copyright 2006 Pengutronix
5 * Sascha Hauer <s.hauer@pengutronix.de>
6 * Copyright 2007 Pengutronix
7 * Juergen Beisert <j.beisert@pengutronix.de>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 */
14
15 /dts-v1/;
16
17 / {
18 model = "phytec,pcm030";
19 compatible = "phytec,pcm030";
20 #address-cells = <1>;
21 #size-cells = <1>;
22
23 cpus {
24 #address-cells = <1>;
25 #size-cells = <0>;
26
27 PowerPC,5200@0 {
28 device_type = "cpu";
29 reg = <0>;
30 d-cache-line-size = <32>;
31 i-cache-line-size = <32>;
32 d-cache-size = <0x4000>; /* L1, 16K */
33 i-cache-size = <0x4000>; /* L1, 16K */
34 timebase-frequency = <0>; /* From Bootloader */
35 bus-frequency = <0>; /* From Bootloader */
36 clock-frequency = <0>; /* From Bootloader */
37 };
38 };
39
40 memory {
41 device_type = "memory";
42 reg = <0x00000000 0x04000000>; /* 64MB */
43 };
44
45 soc5200@f0000000 {
46 #address-cells = <1>;
47 #size-cells = <1>;
48 compatible = "fsl,mpc5200b-immr";
49 ranges = <0x0 0xf0000000 0x0000c000>;
50 bus-frequency = <0>; /* From bootloader */
51 system-frequency = <0>; /* From bootloader */
52
53 cdm@200 {
54 compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
55 reg = <0x200 0x38>;
56 };
57
58 mpc5200_pic: interrupt-controller@500 {
59 /* 5200 interrupts are encoded into two levels; */
60 interrupt-controller;
61 #interrupt-cells = <3>;
62 device_type = "interrupt-controller";
63 compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
64 reg = <0x500 0x80>;
65 };
66
67 timer@600 { /* General Purpose Timer */
68 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
69 cell-index = <0>;
70 reg = <0x600 0x10>;
71 interrupts = <0x1 0x9 0x0>;
72 interrupt-parent = <&mpc5200_pic>;
73 fsl,has-wdt;
74 };
75
76 timer@610 { /* General Purpose Timer */
77 compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
78 cell-index = <1>;
79 reg = <0x610 0x10>;
80 interrupts = <0x1 0xa 0x0>;
81 interrupt-parent = <&mpc5200_pic>;
82 };
83
84 gpt2: timer@620 { /* General Purpose Timer in GPIO mode */
85 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
86 cell-index = <2>;
87 reg = <0x620 0x10>;
88 interrupts = <0x1 0xb 0x0>;
89 interrupt-parent = <&mpc5200_pic>;
90 gpio-controller;
91 #gpio-cells = <2>;
92 };
93
94 gpt3: timer@630 { /* General Purpose Timer in GPIO mode */
95 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
96 cell-index = <3>;
97 reg = <0x630 0x10>;
98 interrupts = <0x1 0xc 0x0>;
99 interrupt-parent = <&mpc5200_pic>;
100 gpio-controller;
101 #gpio-cells = <2>;
102 };
103
104 gpt4: timer@640 { /* General Purpose Timer in GPIO mode */
105 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
106 cell-index = <4>;
107 reg = <0x640 0x10>;
108 interrupts = <0x1 0xd 0x0>;
109 interrupt-parent = <&mpc5200_pic>;
110 gpio-controller;
111 #gpio-cells = <2>;
112 };
113
114 gpt5: timer@650 { /* General Purpose Timer in GPIO mode */
115 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
116 cell-index = <5>;
117 reg = <0x650 0x10>;
118 interrupts = <0x1 0xe 0x0>;
119 interrupt-parent = <&mpc5200_pic>;
120 gpio-controller;
121 #gpio-cells = <2>;
122 };
123
124 gpt6: timer@660 { /* General Purpose Timer in GPIO mode */
125 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
126 cell-index = <6>;
127 reg = <0x660 0x10>;
128 interrupts = <0x1 0xf 0x0>;
129 interrupt-parent = <&mpc5200_pic>;
130 gpio-controller;
131 #gpio-cells = <2>;
132 };
133
134 gpt7: timer@670 { /* General Purpose Timer in GPIO mode */
135 compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
136 cell-index = <7>;
137 reg = <0x670 0x10>;
138 interrupts = <0x1 0x10 0x0>;
139 interrupt-parent = <&mpc5200_pic>;
140 gpio-controller;
141 #gpio-cells = <2>;
142 };
143
144 rtc@800 { // Real time clock
145 compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
146 reg = <0x800 0x100>;
147 interrupts = <0x1 0x5 0x0 0x1 0x6 0x0>;
148 interrupt-parent = <&mpc5200_pic>;
149 };
150
151 can@900 {
152 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
153 cell-index = <0>;
154 interrupts = <0x2 0x11 0x0>;
155 interrupt-parent = <&mpc5200_pic>;
156 reg = <0x900 0x80>;
157 };
158
159 can@980 {
160 compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
161 cell-index = <1>;
162 interrupts = <0x2 0x12 0x0>;
163 interrupt-parent = <&mpc5200_pic>;
164 reg = <0x980 0x80>;
165 };
166
167 gpio_simple: gpio@b00 {
168 compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
169 reg = <0xb00 0x40>;
170 interrupts = <0x1 0x7 0x0>;
171 interrupt-parent = <&mpc5200_pic>;
172 gpio-controller;
173 #gpio-cells = <2>;
174 };
175
176 gpio_wkup: gpio-wkup@c00 {
177 compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
178 reg = <0xc00 0x40>;
179 interrupts = <0x1 0x8 0x0 0x0 0x3 0x0>;
180 interrupt-parent = <&mpc5200_pic>;
181 gpio-controller;
182 #gpio-cells = <2>;
183 };
184
185 spi@f00 {
186 compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
187 reg = <0xf00 0x20>;
188 interrupts = <0x2 0xd 0x0 0x2 0xe 0x0>;
189 interrupt-parent = <&mpc5200_pic>;
190 };
191
192 usb@1000 {
193 compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
194 reg = <0x1000 0xff>;
195 interrupts = <0x2 0x6 0x0>;
196 interrupt-parent = <&mpc5200_pic>;
197 };
198
199 dma-controller@1200 {
200 device_type = "dma-controller";
201 compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
202 reg = <0x1200 0x80>;
203 interrupts = <0x3 0x0 0x0 0x3 0x1 0x0 0x3 0x2 0x0 0x3 0x3 0x0
204 0x3 0x4 0x0 0x3 0x5 0x0 0x3 0x6 0x0 0x3 0x7 0x0
205 0x3 0x8 0x0 0x3 0x9 0x0 0x3 0xa 0x0 0x3 0xb 0x0
206 0x3 0xc 0x0 0x3 0xd 0x0 0x3 0xe 0x0 0x3 0xf 0x0>;
207 interrupt-parent = <&mpc5200_pic>;
208 };
209
210 xlb@1f00 {
211 compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
212 reg = <0x1f00 0x100>;
213 };
214
215 ac97@2000 { /* PSC1 in ac97 mode */
216 device_type = "sound";
217 compatible = "mpc5200b-psc-ac97","fsl,mpc5200b-psc-ac97";
218 cell-index = <0>;
219 reg = <0x2000 0x100>;
220 interrupts = <0x2 0x2 0x0>;
221 interrupt-parent = <&mpc5200_pic>;
222 };
223
224 /* PSC2 port is used by CAN1/2 */
225
226 serial@2400 { /* PSC3 in UART mode */
227 device_type = "serial";
228 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
229 port-number = <0>;
230 cell-index = <2>;
231 reg = <0x2400 0x100>;
232 interrupts = <0x2 0x3 0x0>;
233 interrupt-parent = <&mpc5200_pic>;
234 };
235
236 /* PSC4 is ??? */
237
238 /* PSC5 is ??? */
239
240 serial@2c00 { /* PSC6 in UART mode */
241 device_type = "serial";
242 compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
243 port-number = <1>;
244 cell-index = <5>;
245 reg = <0x2c00 0x100>;
246 interrupts = <0x2 0x4 0x0>;
247 interrupt-parent = <&mpc5200_pic>;
248 };
249
250 ethernet@3000 {
251 device_type = "network";
252 compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
253 reg = <0x3000 0x400>;
254 local-mac-address = [00 00 00 00 00 00];
255 interrupts = <0x2 0x5 0x0>;
256 interrupt-parent = <&mpc5200_pic>;
257 phy-handle = <&phy0>;
258 };
259
260 mdio@3000 {
261 #address-cells = <1>;
262 #size-cells = <0>;
263 compatible = "fsl,mpc5200b-mdio", "fsl,mpc5200-mdio";
264 reg = <0x3000 0x400>; /* fec range, since we need to setup fec interrupts */
265 interrupts = <0x2 0x5 0x0>; /* these are for "mii command finished", not link changes & co. */
266 interrupt-parent = <&mpc5200_pic>;
267
268 phy0:ethernet-phy@0 {
269 device_type = "ethernet-phy";
270 reg = <0x0>;
271 };
272 };
273
274 ata@3a00 {
275 device_type = "ata";
276 compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
277 reg = <0x3a00 0x100>;
278 interrupts = <0x2 0x7 0x0>;
279 interrupt-parent = <&mpc5200_pic>;
280 };
281
282 i2c@3d00 {
283 #address-cells = <1>;
284 #size-cells = <0>;
285 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
286 cell-index = <0>;
287 reg = <0x3d00 0x40>;
288 interrupts = <0x2 0xf 0x0>;
289 interrupt-parent = <&mpc5200_pic>;
290 fsl5200-clocking;
291 };
292
293 i2c@3d40 {
294 #address-cells = <1>;
295 #size-cells = <0>;
296 compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
297 cell-index = <1>;
298 reg = <0x3d40 0x40>;
299 interrupts = <0x2 0x10 0x0>;
300 interrupt-parent = <&mpc5200_pic>;
301 fsl5200-clocking;
302 rtc@51 {
303 compatible = "nxp,pcf8563";
304 reg = <0x51>;
305 };
306 /* FIXME: EEPROM */
307 };
308
309 sram@8000 {
310 compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram","sram";
311 reg = <0x8000 0x4000>;
312 };
313
314 /* This is only an example device to show the usage of gpios. It maps all available
315 * gpios to the "gpio-provider" device.
316 */
317 gpio {
318 compatible = "gpio-provider";
319
320 /* mpc52xx exp.con patchfield */
321 gpios = <&gpio_wkup 0 0 /* GPIO_WKUP_7 11d jp13-3 */
322 &gpio_wkup 1 0 /* GPIO_WKUP_6 14c */
323 &gpio_wkup 6 0 /* PSC2_4 43c x5-11 */
324 &gpio_simple 2 0 /* IRDA_1 24c x7-6 set GPS_PORT_CONFIG[IRDA] = 0 */
325 &gpio_simple 3 0 /* IRDA_0 x8-5 set GPS_PORT_CONFIG[IRDA] = 0 */
326 &gpt2 0 0 /* timer2 12d x4-4 */
327 &gpt3 0 0 /* timer3 13d x6-4 */
328 &gpt4 0 0 /* timer4 61c x2-16 */
329 &gpt5 0 0 /* timer5 44c x7-11 */
330 &gpt6 0 0 /* timer6 60c x8-15 */
331 &gpt7 0 0 /* timer7 36a x17-9 */
332 >;
333 };
334 };
335
336 pci@f0000d00 {
337 #interrupt-cells = <1>;
338 #size-cells = <2>;
339 #address-cells = <3>;
340 device_type = "pci";
341 compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
342 reg = <0xf0000d00 0x100>;
343 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
344 interrupt-map = <0xc000 0x0 0x0 0x1 &mpc5200_pic 0x0 0x0 0x3 /* 1st slot */
345 0xc000 0x0 0x0 0x2 &mpc5200_pic 0x1 0x1 0x3
346 0xc000 0x0 0x0 0x3 &mpc5200_pic 0x1 0x2 0x3
347 0xc000 0x0 0x0 0x4 &mpc5200_pic 0x1 0x3 0x3
348
349 0xc800 0x0 0x0 0x1 &mpc5200_pic 0x1 0x1 0x3 /* 2nd slot */
350 0xc800 0x0 0x0 0x2 &mpc5200_pic 0x1 0x2 0x3
351 0xc800 0x0 0x0 0x3 &mpc5200_pic 0x1 0x3 0x3
352 0xc800 0x0 0x0 0x4 &mpc5200_pic 0x0 0x0 0x3>;
353 clock-frequency = <0>; // From boot loader
354 interrupts = <0x2 0x8 0x0 0x2 0x9 0x0 0x2 0xa 0x0>;
355 interrupt-parent = <&mpc5200_pic>;
356 bus-range = <0 0>;
357 ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x20000000
358 0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
359 0x01000000 0x0 0x00000000 0xb0000000 0x0 0x01000000>;
360 };
361 };
Linux kernel - Deliverables
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