arch/powerpc/boot/dts/pq2fads.dts

   1 /*
   2  * Device Tree for the PQ2FADS-ZU board with an MPC8280 chip.
   3  *
   4  * Copyright 2007,2008 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /dts-v1/;
  13
  14 / {
  15         model = "pq2fads";
  16         compatible = "fsl,pq2fads";
  17         #address-cells = <1>;
  18         #size-cells = <1>;
  19
  20         aliases {
  21                 ethernet0 = &enet0;
  22                 ethernet1 = &enet1;
  23                 serial0 = &serial0;
  24                 serial1 = &serial1;
  25                 pci0 = &pci0;
  26         };
  27
  28         cpus {
  29                 #address-cells = <1>;
  30                 #size-cells = <0>;
  31
  32                 cpu@0 {
  33                         device_type = "cpu";
  34                         reg = <0x0>;
  35                         d-cache-line-size = <32>;
  36                         i-cache-line-size = <32>;
  37                         d-cache-size = <16384>;
  38                         i-cache-size = <16384>;
  39                         timebase-frequency = <0>;
  40                         clock-frequency = <0>;
  41                 };
  42         };
  43
  44         memory {
  45                 device_type = "memory";
  46                 reg = <0x0 0x0>;
  47         };
  48
  49         localbus@f0010100 {
  50                 compatible = "fsl,mpc8280-localbus",
  51                              "fsl,pq2-localbus";
  52                 #address-cells = <2>;
  53                 #size-cells = <1>;
  54                 reg = <0xf0010100 0x60>;
  55
  56                 ranges = <0x0 0x0 0xff800000 0x800000
  57                           0x1 0x0 0xf4500000 0x8000
  58                           0x8 0x0 0xf8200000 0x8000>;
  59
  60                 flash@0,0 {
  61                         compatible = "jedec-flash";
  62                         reg = <0x0 0x0 0x800000>;
  63                         bank-width = <4>;
  64                         device-width = <1>;
  65                 };
  66
  67                 bcsr@1,0 {
  68                         reg = <0x1 0x0 0x20>;
  69                         compatible = "fsl,pq2fads-bcsr";
  70                 };
  71
  72                 PCI_PIC: pic@8,0 {
  73                         #interrupt-cells = <1>;
  74                         interrupt-controller;
  75                         reg = <0x8 0x0 0x8>;
  76                         compatible = "fsl,pq2ads-pci-pic";
  77                         interrupt-parent = <&PIC>;
  78                         interrupts = <24 8>;
  79                 };
  80         };
  81
  82         pci0: pci@f0010800 {
  83                 device_type = "pci";
  84                 reg = <0xf0010800 0x10c 0xf00101ac 0x8 0xf00101c4 0x8>;
  85                 compatible = "fsl,mpc8280-pci", "fsl,pq2-pci";
  86                 #interrupt-cells = <1>;
  87                 #size-cells = <2>;
  88                 #address-cells = <3>;
  89                 clock-frequency = <66000000>;
  90                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
  91                 interrupt-map = <
  92                                 /* IDSEL 0x16 */
  93                                  0xb000 0x0 0x0 0x1 &PCI_PIC 0
  94                                  0xb000 0x0 0x0 0x2 &PCI_PIC 1
  95                                  0xb000 0x0 0x0 0x3 &PCI_PIC 2
  96                                  0xb000 0x0 0x0 0x4 &PCI_PIC 3
  97
  98                                 /* IDSEL 0x17 */
  99                                  0xb800 0x0 0x0 0x1 &PCI_PIC 4
 100                                  0xb800 0x0 0x0 0x2 &PCI_PIC 5
 101                                  0xb800 0x0 0x0 0x3 &PCI_PIC 6
 102                                  0xb800 0x0 0x0 0x4 &PCI_PIC 7
 103
 104                                 /* IDSEL 0x18 */
 105                                  0xc000 0x0 0x0 0x1 &PCI_PIC 8
 106                                  0xc000 0x0 0x0 0x2 &PCI_PIC 9
 107                                  0xc000 0x0 0x0 0x3 &PCI_PIC 10
 108                                  0xc000 0x0 0x0 0x4 &PCI_PIC 11>;
 109
 110                 interrupt-parent = <&PIC>;
 111                 interrupts = <18 8>;
 112                 ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x20000000
 113                           0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
 114                           0x1000000 0x0 0x0 0xf6000000 0x0 0x2000000>;
 115         };
 116
 117         soc@f0000000 {
 118                 #address-cells = <1>;
 119                 #size-cells = <1>;
 120                 device_type = "soc";
 121                 compatible = "fsl,mpc8280", "fsl,pq2-soc";
 122                 ranges = <0x0 0xf0000000 0x53000>;
 123
 124                 // Temporary -- will go away once kernel uses ranges for get_immrbase().
 125                 reg = <0xf0000000 0x53000>;
 126
 127                 cpm@119c0 {
 128                         #address-cells = <1>;
 129                         #size-cells = <1>;
 130                         #interrupt-cells = <2>;
 131                         compatible = "fsl,mpc8280-cpm", "fsl,cpm2";
 132                         reg = <0x119c0 0x30>;
 133                         ranges;
 134
 135                         muram@0 {
 136                                 #address-cells = <1>;
 137                                 #size-cells = <1>;
 138                                 ranges = <0x0 0x0 0x10000>;
 139
 140                                 data@0 {
 141                                         compatible = "fsl,cpm-muram-data";
 142                                         reg = <0x0 0x2000 0x9800 0x800>;
 143                                 };
 144                         };
 145
 146                         brg@119f0 {
 147                                 compatible = "fsl,mpc8280-brg",
 148                                              "fsl,cpm2-brg",
 149                                              "fsl,cpm-brg";
 150                                 reg = <0x119f0 0x10 0x115f0 0x10>;
 151                         };
 152
 153                         serial0: serial@11a00 {
 154                                 device_type = "serial";
 155                                 compatible = "fsl,mpc8280-scc-uart",
 156                                              "fsl,cpm2-scc-uart";
 157                                 reg = <0x11a00 0x20 0x8000 0x100>;
 158                                 interrupts = <40 8>;
 159                                 interrupt-parent = <&PIC>;
 160                                 fsl,cpm-brg = <1>;
 161                                 fsl,cpm-command = <0x800000>;
 162                         };
 163
 164                         serial1: serial@11a20 {
 165                                 device_type = "serial";
 166                                 compatible = "fsl,mpc8280-scc-uart",
 167                                              "fsl,cpm2-scc-uart";
 168                                 reg = <0x11a20 0x20 0x8100 0x100>;
 169                                 interrupts = <41 8>;
 170                                 interrupt-parent = <&PIC>;
 171                                 fsl,cpm-brg = <2>;
 172                                 fsl,cpm-command = <0x4a00000>;
 173                         };
 174
 175                         enet0: ethernet@11320 {
 176                                 device_type = "network";
 177                                 compatible = "fsl,mpc8280-fcc-enet",
 178                                              "fsl,cpm2-fcc-enet";
 179                                 reg = <0x11320 0x20 0x8500 0x100 0x113b0 0x1>;
 180                                 interrupts = <33 8>;
 181                                 interrupt-parent = <&PIC>;
 182                                 phy-handle = <&PHY0>;
 183                                 linux,network-index = <0>;
 184                                 fsl,cpm-command = <0x16200300>;
 185                         };
 186
 187                         enet1: ethernet@11340 {
 188                                 device_type = "network";
 189                                 compatible = "fsl,mpc8280-fcc-enet",
 190                                              "fsl,cpm2-fcc-enet";
 191                                 reg = <0x11340 0x20 0x8600 0x100 0x113d0 0x1>;
 192                                 interrupts = <34 8>;
 193                                 interrupt-parent = <&PIC>;
 194                                 phy-handle = <&PHY1>;
 195                                 linux,network-index = <1>;
 196                                 fsl,cpm-command = <0x1a400300>;
 197                                 local-mac-address = [00 e0 0c 00 79 01];
 198                         };
 199
 200                         mdio@10d40 {
 201                                 device_type = "mdio";
 202                                 compatible = "fsl,pq2fads-mdio-bitbang",
 203                                              "fsl,mpc8280-mdio-bitbang",
 204                                              "fsl,cpm2-mdio-bitbang";
 205                                 #address-cells = <1>;
 206                                 #size-cells = <0>;
 207                                 reg = <0x10d40 0x14>;
 208                                 fsl,mdio-pin = <9>;
 209                                 fsl,mdc-pin = <10>;
 210
 211                                 PHY0: ethernet-phy@0 {
 212                                         interrupt-parent = <&PIC>;
 213                                         interrupts = <25 2>;
 214                                         reg = <0x0>;
 215                                 };
 216
 217                                 PHY1: ethernet-phy@1 {
 218                                         interrupt-parent = <&PIC>;
 219                                         interrupts = <25 2>;
 220                                         reg = <0x3>;
 221                                 };
 222                         };
 223
 224                         usb@11b60 {
 225                                 #address-cells = <1>;
 226                                 #size-cells = <0>;
 227                                 compatible = "fsl,mpc8280-usb",
 228                                              "fsl,cpm2-usb";
 229                                 reg = <0x11b60 0x18 0x8b00 0x100>;
 230                                 interrupt-parent = <&PIC>;
 231                                 interrupts = <11 8>;
 232                                 fsl,cpm-command = <0x2e600000>;
 233                         };
 234                 };
 235
 236                 PIC: interrupt-controller@10c00 {
 237                         #interrupt-cells = <2>;
 238                         interrupt-controller;
 239                         reg = <0x10c00 0x80>;
 240                         compatible = "fsl,mpc8280-pic", "fsl,cpm2-pic";
 241                 };
 242
 243         };
 244
 245         chosen {
 246                 linux,stdout-path = "/soc/cpm/serial@11a00";
 247         };
 248 };