arch/powerpc/boot/dts/socrates.dts

   1 /*
   2  * Device Tree Source for the Socrates board (MPC8544).
   3  *
   4  * Copyright (c) 2008 Emcraft Systems.
   5  * Sergei Poselenov, <sposelenov@emcraft.com>
   6  *
   7  * This program is free software; you can redistribute  it and/or modify it
   8  * under  the terms of  the GNU General  Public License as published by the
   9  * Free Software Foundation;  either version 2 of the  License, or (at your
  10  * option) any later version.
  11  */
  12
  13 /dts-v1/;
  14
  15 / {
  16         model = "abb,socrates";
  17         compatible = "abb,socrates";
  18         #address-cells = <1>;
  19         #size-cells = <1>;
  20
  21         aliases {
  22                 ethernet0 = &enet0;
  23                 ethernet1 = &enet1;
  24                 serial0 = &serial0;
  25                 serial1 = &serial1;
  26                 pci0 = &pci0;
  27         };
  28
  29         cpus {
  30                 #address-cells = <1>;
  31                 #size-cells = <0>;
  32
  33                 PowerPC,8544@0 {
  34                         device_type = "cpu";
  35                         reg = <0>;
  36                         d-cache-line-size = <32>;
  37                         i-cache-line-size = <32>;
  38                         d-cache-size = <0x8000>;        // L1, 32K
  39                         i-cache-size = <0x8000>;        // L1, 32K
  40                         timebase-frequency = <0>;
  41                         bus-frequency = <0>;
  42                         clock-frequency = <0>;
  43                         next-level-cache = <&L2>;
  44                 };
  45         };
  46
  47         memory {
  48                 device_type = "memory";
  49                 reg = <0x00000000 0x00000000>;  // Filled in by U-Boot
  50         };
  51
  52         soc8544@e0000000 {
  53                 #address-cells = <1>;
  54                 #size-cells = <1>;
  55                 device_type = "soc";
  56
  57                 ranges = <0x00000000 0xe0000000 0x00100000>;
  58                 reg = <0xe0000000 0x00001000>;  // CCSRBAR 1M
  59                 bus-frequency = <0>;            // Filled in by U-Boot
  60                 compatible = "fsl,mpc8544-immr", "simple-bus";
  61
  62                 memory-controller@2000 {
  63                         compatible = "fsl,mpc8544-memory-controller";
  64                         reg = <0x2000 0x1000>;
  65                         interrupt-parent = <&mpic>;
  66                         interrupts = <18 2>;
  67                 };
  68
  69                 L2: l2-cache-controller@20000 {
  70                         compatible = "fsl,mpc8544-l2-cache-controller";
  71                         reg = <0x20000 0x1000>;
  72                         cache-line-size = <32>;
  73                         cache-size = <0x40000>; // L2, 256K
  74                         interrupt-parent = <&mpic>;
  75                         interrupts = <16 2>;
  76                 };
  77
  78                 i2c@3000 {
  79                         #address-cells = <1>;
  80                         #size-cells = <0>;
  81                         cell-index = <0>;
  82                         compatible = "fsl,mpc8544-i2c", "fsl-i2c";
  83                         reg = <0x3000 0x100>;
  84                         interrupts = <43 2>;
  85                         interrupt-parent = <&mpic>;
  86                         fsl,preserve-clocking;
  87
  88                         dtt@28 {
  89                                 compatible = "winbond,w83782d";
  90                                 reg = <0x28>;
  91                         };
  92                         rtc@32 {
  93                                 compatible = "epson,rx8025";
  94                                 reg = <0x32>;
  95                                 interrupts = <7 1>;
  96                                 interrupt-parent = <&mpic>;
  97                         };
  98                         dtt@4c {
  99                                 compatible = "dallas,ds75";
 100                                 reg = <0x4c>;
 101                         };
 102                         ts@4a {
 103                                 compatible = "ti,tsc2003";
 104                                 reg = <0x4a>;
 105                                 interrupt-parent = <&mpic>;
 106                                 interrupts = <8 1>;
 107                         };
 108                 };
 109
 110                 i2c@3100 {
 111                         #address-cells = <1>;
 112                         #size-cells = <0>;
 113                         cell-index = <1>;
 114                         compatible = "fsl,mpc8544-i2c", "fsl-i2c";
 115                         reg = <0x3100 0x100>;
 116                         interrupts = <43 2>;
 117                         interrupt-parent = <&mpic>;
 118                         fsl,preserve-clocking;
 119                 };
 120
 121                 enet0: ethernet@24000 {
 122                         #address-cells = <1>;
 123                         #size-cells = <1>;
 124                         cell-index = <0>;
 125                         device_type = "network";
 126                         model = "eTSEC";
 127                         compatible = "gianfar";
 128                         reg = <0x24000 0x1000>;
 129                         ranges = <0x0 0x24000 0x1000>;
 130                         local-mac-address = [ 00 00 00 00 00 00 ];
 131                         interrupts = <29 2 30 2 34 2>;
 132                         interrupt-parent = <&mpic>;
 133                         phy-handle = <&phy0>;
 134                         tbi-handle = <&tbi0>;
 135                         phy-connection-type = "rgmii-id";
 136
 137                         mdio@520 {
 138                                 #address-cells = <1>;
 139                                 #size-cells = <0>;
 140                                 compatible = "fsl,gianfar-mdio";
 141                                 reg = <0x520 0x20>;
 142
 143                                 phy0: ethernet-phy@0 {
 144                                         interrupt-parent = <&mpic>;
 145                                         interrupts = <0 1>;
 146                                         reg = <0>;
 147                                 };
 148                                 phy1: ethernet-phy@1 {
 149                                         interrupt-parent = <&mpic>;
 150                                         interrupts = <0 1>;
 151                                         reg = <1>;
 152                                 };
 153                                 tbi0: tbi-phy@11 {
 154                                         reg = <0x11>;
 155                                 };
 156                         };
 157                 };
 158
 159                 enet1: ethernet@26000 {
 160                         #address-cells = <1>;
 161                         #size-cells = <1>;
 162                         cell-index = <1>;
 163                         device_type = "network";
 164                         model = "eTSEC";
 165                         compatible = "gianfar";
 166                         reg = <0x26000 0x1000>;
 167                         ranges = <0x0 0x26000 0x1000>;
 168                         local-mac-address = [ 00 00 00 00 00 00 ];
 169                         interrupts = <31 2 32 2 33 2>;
 170                         interrupt-parent = <&mpic>;
 171                         phy-handle = <&phy1>;
 172                         tbi-handle = <&tbi1>;
 173                         phy-connection-type = "rgmii-id";
 174
 175                         mdio@520 {
 176                                 #address-cells = <1>;
 177                                 #size-cells = <0>;
 178                                 compatible = "fsl,gianfar-tbi";
 179                                 reg = <0x520 0x20>;
 180
 181                                 tbi1: tbi-phy@11 {
 182                                         reg = <0x11>;
 183                                 };
 184                         };
 185                 };
 186
 187                 serial0: serial@4500 {
 188                         cell-index = <0>;
 189                         device_type = "serial";
 190                         compatible = "ns16550";
 191                         reg = <0x4500 0x100>;
 192                         clock-frequency = <0>;
 193                         interrupts = <42 2>;
 194                         interrupt-parent = <&mpic>;
 195                 };
 196
 197                 serial1: serial@4600 {
 198                         cell-index = <1>;
 199                         device_type = "serial";
 200                         compatible = "ns16550";
 201                         reg = <0x4600 0x100>;
 202                         clock-frequency = <0>;
 203                         interrupts = <42 2>;
 204                         interrupt-parent = <&mpic>;
 205                 };
 206
 207                 global-utilities@e0000 {        //global utilities block
 208                         compatible = "fsl,mpc8548-guts";
 209                         reg = <0xe0000 0x1000>;
 210                         fsl,has-rstcr;
 211                 };
 212
 213                 mpic: pic@40000 {
 214                         interrupt-controller;
 215                         #address-cells = <0>;
 216                         #interrupt-cells = <2>;
 217                         reg = <0x40000 0x40000>;
 218                         compatible = "chrp,open-pic";
 219                         device_type = "open-pic";
 220                 };
 221         };
 222
 223
 224         localbus {
 225                 compatible = "fsl,mpc8544-localbus",
 226                              "fsl,pq3-localbus",
 227                              "simple-bus";
 228                 #address-cells = <2>;
 229                 #size-cells = <1>;
 230                 reg = <0xe0005000 0x40>;
 231
 232                 ranges = <0 0 0xfc000000 0x04000000
 233                           2 0 0xc8000000 0x04000000
 234                           3 0 0xc0000000 0x00100000
 235                         >; /* Overwritten by U-Boot */
 236
 237                 nor_flash@0,0 {
 238                         compatible = "amd,s29gl256n", "cfi-flash";
 239                         bank-width = <2>;
 240                         reg = <0x0 0x000000 0x4000000>;
 241                         #address-cells = <1>;
 242                         #size-cells = <1>;
 243                         partition@0 {
 244                                 label = "kernel";
 245                                 reg = <0x0 0x1e0000>;
 246                                 read-only;
 247                         };
 248                         partition@1e0000 {
 249                                 label = "dtb";
 250                                 reg = <0x1e0000 0x20000>;
 251                         };
 252                         partition@200000 {
 253                                 label = "root";
 254                                 reg = <0x200000 0x200000>;
 255                         };
 256                         partition@400000 {
 257                                 label = "user";
 258                                 reg = <0x400000 0x3b80000>;
 259                         };
 260                         partition@3f80000 {
 261                                 label = "env";
 262                                 reg = <0x3f80000 0x40000>;
 263                                 read-only;
 264                         };
 265                         partition@3fc0000 {
 266                                 label = "u-boot";
 267                                 reg = <0x3fc0000 0x40000>;
 268                                 read-only;
 269                         };
 270                 };
 271
 272                 display@2,0 {
 273                         compatible = "fujitsu,lime";
 274                         reg = <2 0x0 0x4000000>;
 275                         interrupt-parent = <&mpic>;
 276                         interrupts = <6 1>;
 277                 };
 278
 279                 fpga_pic: fpga-pic@3,10 {
 280                         compatible = "abb,socrates-fpga-pic";
 281                         reg = <3 0x10 0x10>;
 282                         interrupt-controller;
 283                         /* IRQs 2, 10, 11, active low, level-sensitive */
 284                         interrupts = <2 1 10 1 11 1>;
 285                         interrupt-parent = <&mpic>;
 286                         #interrupt-cells = <3>;
 287                 };
 288
 289                 spi@3,60 {
 290                         compatible = "abb,socrates-spi";
 291                         reg = <3 0x60 0x10>;
 292                         interrupts = <8 4 0>;   // number, type, routing
 293                         interrupt-parent = <&fpga_pic>;
 294                 };
 295
 296                 nand@3,70 {
 297                         compatible = "abb,socrates-nand";
 298                         reg = <3 0x70 0x04>;
 299                         bank-width = <1>;
 300                         #address-cells = <1>;
 301                         #size-cells = <1>;
 302                         data@0 {
 303                                 label = "data";
 304                                 reg = <0x0 0x40000000>;
 305                         };
 306                 };
 307
 308                 can@3,100 {
 309                         compatible = "philips,sja1000";
 310                         reg = <3 0x100 0x80>;
 311                         interrupts = <2 8 1>;   // number, type, routing
 312                         interrupt-parent = <&fpga_pic>;
 313                 };
 314         };
 315
 316         pci0: pci@e0008000 {
 317                 cell-index = <0>;
 318                 #interrupt-cells = <1>;
 319                 #size-cells = <2>;
 320                 #address-cells = <3>;
 321                 compatible = "fsl,mpc8540-pci";
 322                 device_type = "pci";
 323                 reg = <0xe0008000 0x1000>;
 324                 clock-frequency = <66666666>;
 325
 326                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 327                 interrupt-map = <
 328                                 /* IDSEL 0x11 */
 329                                  0x8800 0x0 0x0 1 &mpic 5 1
 330                                 /* IDSEL 0x12 */
 331                                  0x9000 0x0 0x0 1 &mpic 4 1>;
 332                 interrupt-parent = <&mpic>;
 333                 interrupts = <24 2>;
 334                 bus-range = <0x0 0x0>;
 335                 ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000
 336                           0x01000000 0x0 0x00000000 0xe2000000 0x0 0x01000000>;
 337         };
 338
 339 };