arch/powerpc/boot/dts/tqm8540.dts

   1 /*
   2  * TQM 8540 Device Tree Source
   3  *
   4  * Copyright 2008 Freescale Semiconductor Inc.
   5  *
   6  * This program is free software; you can redistribute  it and/or modify it
   7  * under  the terms of  the GNU General  Public License as published by the
   8  * Free Software Foundation;  either version 2 of the  License, or (at your
   9  * option) any later version.
  10  */
  11
  12 /dts-v1/;
  13
  14 / {
  15         model = "tqc,tqm8540";
  16         compatible = "tqc,tqm8540";
  17         #address-cells = <1>;
  18         #size-cells = <1>;
  19
  20         aliases {
  21                 ethernet0 = &enet0;
  22                 ethernet1 = &enet1;
  23                 ethernet2 = &enet2;
  24                 serial0 = &serial0;
  25                 serial1 = &serial1;
  26                 pci0 = &pci0;
  27         };
  28
  29         cpus {
  30                 #address-cells = <1>;
  31                 #size-cells = <0>;
  32
  33                 PowerPC,8540@0 {
  34                         device_type = "cpu";
  35                         reg = <0>;
  36                         d-cache-line-size = <32>;
  37                         i-cache-line-size = <32>;
  38                         d-cache-size = <32768>;
  39                         i-cache-size = <32768>;
  40                         timebase-frequency = <0>;
  41                         bus-frequency = <0>;
  42                         clock-frequency = <0>;
  43                         next-level-cache = <&L2>;
  44                 };
  45         };
  46
  47         memory {
  48                 device_type = "memory";
  49                 reg = <0x00000000 0x10000000>;
  50         };
  51
  52         soc@e0000000 {
  53                 #address-cells = <1>;
  54                 #size-cells = <1>;
  55                 device_type = "soc";
  56                 ranges = <0x0 0xe0000000 0x100000>;
  57                 reg = <0xe0000000 0x200>;
  58                 bus-frequency = <0>;
  59                 compatible = "fsl,mpc8540-immr", "simple-bus";
  60
  61                 memory-controller@2000 {
  62                         compatible = "fsl,8540-memory-controller";
  63                         reg = <0x2000 0x1000>;
  64                         interrupt-parent = <&mpic>;
  65                         interrupts = <18 2>;
  66                 };
  67
  68                 L2: l2-cache-controller@20000 {
  69                         compatible = "fsl,8540-l2-cache-controller";
  70                         reg = <0x20000 0x1000>;
  71                         cache-line-size = <32>;
  72                         cache-size = <0x40000>; // L2, 256K
  73                         interrupt-parent = <&mpic>;
  74                         interrupts = <16 2>;
  75                 };
  76
  77                 i2c@3000 {
  78                         #address-cells = <1>;
  79                         #size-cells = <0>;
  80                         cell-index = <0>;
  81                         compatible = "fsl-i2c";
  82                         reg = <0x3000 0x100>;
  83                         interrupts = <43 2>;
  84                         interrupt-parent = <&mpic>;
  85                         dfsrr;
  86
  87                         rtc@68 {
  88                                 compatible = "dallas,ds1337";
  89                                 reg = <0x68>;
  90                         };
  91                 };
  92
  93                 dma@21300 {
  94                         #address-cells = <1>;
  95                         #size-cells = <1>;
  96                         compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
  97                         reg = <0x21300 0x4>;
  98                         ranges = <0x0 0x21100 0x200>;
  99                         cell-index = <0>;
 100                         dma-channel@0 {
 101                                 compatible = "fsl,mpc8540-dma-channel",
 102                                                 "fsl,eloplus-dma-channel";
 103                                 reg = <0x0 0x80>;
 104                                 cell-index = <0>;
 105                                 interrupt-parent = <&mpic>;
 106                                 interrupts = <20 2>;
 107                         };
 108                         dma-channel@80 {
 109                                 compatible = "fsl,mpc8540-dma-channel",
 110                                                 "fsl,eloplus-dma-channel";
 111                                 reg = <0x80 0x80>;
 112                                 cell-index = <1>;
 113                                 interrupt-parent = <&mpic>;
 114                                 interrupts = <21 2>;
 115                         };
 116                         dma-channel@100 {
 117                                 compatible = "fsl,mpc8540-dma-channel",
 118                                                 "fsl,eloplus-dma-channel";
 119                                 reg = <0x100 0x80>;
 120                                 cell-index = <2>;
 121                                 interrupt-parent = <&mpic>;
 122                                 interrupts = <22 2>;
 123                         };
 124                         dma-channel@180 {
 125                                 compatible = "fsl,mpc8540-dma-channel",
 126                                                 "fsl,eloplus-dma-channel";
 127                                 reg = <0x180 0x80>;
 128                                 cell-index = <3>;
 129                                 interrupt-parent = <&mpic>;
 130                                 interrupts = <23 2>;
 131                         };
 132                 };
 133
 134                 mdio@24520 {
 135                         #address-cells = <1>;
 136                         #size-cells = <0>;
 137                         compatible = "fsl,gianfar-mdio";
 138                         reg = <0x24520 0x20>;
 139
 140                         phy1: ethernet-phy@1 {
 141                                 interrupt-parent = <&mpic>;
 142                                 interrupts = <8 1>;
 143                                 reg = <1>;
 144                                 device_type = "ethernet-phy";
 145                         };
 146                         phy2: ethernet-phy@2 {
 147                                 interrupt-parent = <&mpic>;
 148                                 interrupts = <8 1>;
 149                                 reg = <2>;
 150                                 device_type = "ethernet-phy";
 151                         };
 152                         phy3: ethernet-phy@3 {
 153                                 interrupt-parent = <&mpic>;
 154                                 interrupts = <8 1>;
 155                                 reg = <3>;
 156                                 device_type = "ethernet-phy";
 157                         };
 158                         tbi0: tbi-phy@11 {
 159                                 reg = <0x11>;
 160                                 device_type = "tbi-phy";
 161                         };
 162                 };
 163
 164                 mdio@25520 {
 165                         #address-cells = <1>;
 166                         #size-cells = <0>;
 167                         compatible = "fsl,gianfar-tbi";
 168                         reg = <0x25520 0x20>;
 169
 170                         tbi1: tbi-phy@11 {
 171                                 reg = <0x11>;
 172                                 device_type = "tbi-phy";
 173                         };
 174                 };
 175
 176                 mdio@26520 {
 177                         #address-cells = <1>;
 178                         #size-cells = <0>;
 179                         compatible = "fsl,gianfar-tbi";
 180                         reg = <0x26520 0x20>;
 181
 182                         tbi2: tbi-phy@11 {
 183                                 reg = <0x11>;
 184                                 device_type = "tbi-phy";
 185                         };
 186                 };
 187
 188                 enet0: ethernet@24000 {
 189                         cell-index = <0>;
 190                         device_type = "network";
 191                         model = "TSEC";
 192                         compatible = "gianfar";
 193                         reg = <0x24000 0x1000>;
 194                         local-mac-address = [ 00 00 00 00 00 00 ];
 195                         interrupts = <29 2 30 2 34 2>;
 196                         interrupt-parent = <&mpic>;
 197                         phy-handle = <&phy2>;
 198                 };
 199
 200                 enet1: ethernet@25000 {
 201                         cell-index = <1>;
 202                         device_type = "network";
 203                         model = "TSEC";
 204                         compatible = "gianfar";
 205                         reg = <0x25000 0x1000>;
 206                         local-mac-address = [ 00 00 00 00 00 00 ];
 207                         interrupts = <35 2 36 2 40 2>;
 208                         interrupt-parent = <&mpic>;
 209                         phy-handle = <&phy1>;
 210                 };
 211
 212                 enet2: ethernet@26000 {
 213                         cell-index = <2>;
 214                         device_type = "network";
 215                         model = "FEC";
 216                         compatible = "gianfar";
 217                         reg = <0x26000 0x1000>;
 218                         local-mac-address = [ 00 00 00 00 00 00 ];
 219                         interrupts = <41 2>;
 220                         interrupt-parent = <&mpic>;
 221                         phy-handle = <&phy3>;
 222                 };
 223
 224                 serial0: serial@4500 {
 225                         cell-index = <0>;
 226                         device_type = "serial";
 227                         compatible = "ns16550";
 228                         reg = <0x4500 0x100>;   // reg base, size
 229                         clock-frequency = <0>;  // should we fill in in uboot?
 230                         interrupts = <42 2>;
 231                         interrupt-parent = <&mpic>;
 232                 };
 233
 234                 serial1: serial@4600 {
 235                         cell-index = <1>;
 236                         device_type = "serial";
 237                         compatible = "ns16550";
 238                         reg = <0x4600 0x100>;   // reg base, size
 239                         clock-frequency = <0>;  // should we fill in in uboot?
 240                         interrupts = <42 2>;
 241                         interrupt-parent = <&mpic>;
 242                 };
 243
 244                 mpic: pic@40000 {
 245                         interrupt-controller;
 246                         #address-cells = <0>;
 247                         #interrupt-cells = <2>;
 248                         reg = <0x40000 0x40000>;
 249                         device_type = "open-pic";
 250                         compatible = "chrp,open-pic";
 251                 };
 252         };
 253
 254         pci0: pci@e0008000 {
 255                 cell-index = <0>;
 256                 #interrupt-cells = <1>;
 257                 #size-cells = <2>;
 258                 #address-cells = <3>;
 259                 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
 260                 device_type = "pci";
 261                 reg = <0xe0008000 0x1000>;
 262                 clock-frequency = <66666666>;
 263                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 264                 interrupt-map = <
 265                                 /* IDSEL 28 */
 266                                  0xe000 0 0 1 &mpic 2 1
 267                                  0xe000 0 0 2 &mpic 3 1>;
 268
 269                 interrupt-parent = <&mpic>;
 270                 interrupts = <24 2>;
 271                 bus-range = <0 0>;
 272                 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
 273                           0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;
 274         };
 275 };