arch/powerpc/boot/dts/tqm8560.dts

   1 /*
   2  * TQM 8560 Device Tree Source
   3  *
   4  * Copyright 2008 Freescale Semiconductor Inc.
   5  * Copyright 2008 Wolfgang Grandegger <wg@grandegger.com>
   6  *
   7  * This program is free software; you can redistribute  it and/or modify it
   8  * under  the terms of  the GNU General  Public License as published by the
   9  * Free Software Foundation;  either version 2 of the  License, or (at your
  10  * option) any later version.
  11  */
  12
  13 /dts-v1/;
  14
  15 / {
  16         model = "tqc,tqm8560";
  17         compatible = "tqc,tqm8560";
  18         #address-cells = <1>;
  19         #size-cells = <1>;
  20
  21         aliases {
  22                 ethernet0 = &enet0;
  23                 ethernet1 = &enet1;
  24                 ethernet2 = &enet2;
  25                 serial0 = &serial0;
  26                 serial1 = &serial1;
  27                 pci0 = &pci0;
  28         };
  29
  30         cpus {
  31                 #address-cells = <1>;
  32                 #size-cells = <0>;
  33
  34                 PowerPC,8560@0 {
  35                         device_type = "cpu";
  36                         reg = <0>;
  37                         d-cache-line-size = <32>;
  38                         i-cache-line-size = <32>;
  39                         d-cache-size = <32768>;
  40                         i-cache-size = <32768>;
  41                         timebase-frequency = <0>;
  42                         bus-frequency = <0>;
  43                         clock-frequency = <0>;
  44                         next-level-cache = <&L2>;
  45                 };
  46         };
  47
  48         memory {
  49                 device_type = "memory";
  50                 reg = <0x00000000 0x10000000>;
  51         };
  52
  53         soc@e0000000 {
  54                 #address-cells = <1>;
  55                 #size-cells = <1>;
  56                 device_type = "soc";
  57                 ranges = <0x0 0xe0000000 0x100000>;
  58                 reg = <0xe0000000 0x200>;
  59                 bus-frequency = <0>;
  60                 compatible = "fsl,mpc8560-immr", "simple-bus";
  61
  62                 memory-controller@2000 {
  63                         compatible = "fsl,8540-memory-controller";
  64                         reg = <0x2000 0x1000>;
  65                         interrupt-parent = <&mpic>;
  66                         interrupts = <18 2>;
  67                 };
  68
  69                 L2: l2-cache-controller@20000 {
  70                         compatible = "fsl,8540-l2-cache-controller";
  71                         reg = <0x20000 0x1000>;
  72                         cache-line-size = <32>;
  73                         cache-size = <0x40000>; // L2, 256K
  74                         interrupt-parent = <&mpic>;
  75                         interrupts = <16 2>;
  76                 };
  77
  78                 i2c@3000 {
  79                         #address-cells = <1>;
  80                         #size-cells = <0>;
  81                         cell-index = <0>;
  82                         compatible = "fsl-i2c";
  83                         reg = <0x3000 0x100>;
  84                         interrupts = <43 2>;
  85                         interrupt-parent = <&mpic>;
  86                         dfsrr;
  87
  88                         dtt@50 {
  89                                 compatible = "national,lm75";
  90                                 reg = <0x50>;
  91                         };
  92
  93                         rtc@68 {
  94                                 compatible = "dallas,ds1337";
  95                                 reg = <0x68>;
  96                         };
  97                 };
  98
  99                 dma@21300 {
 100                         #address-cells = <1>;
 101                         #size-cells = <1>;
 102                         compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
 103                         reg = <0x21300 0x4>;
 104                         ranges = <0x0 0x21100 0x200>;
 105                         cell-index = <0>;
 106                         dma-channel@0 {
 107                                 compatible = "fsl,mpc8560-dma-channel",
 108                                                 "fsl,eloplus-dma-channel";
 109                                 reg = <0x0 0x80>;
 110                                 cell-index = <0>;
 111                                 interrupt-parent = <&mpic>;
 112                                 interrupts = <20 2>;
 113                         };
 114                         dma-channel@80 {
 115                                 compatible = "fsl,mpc8560-dma-channel",
 116                                                 "fsl,eloplus-dma-channel";
 117                                 reg = <0x80 0x80>;
 118                                 cell-index = <1>;
 119                                 interrupt-parent = <&mpic>;
 120                                 interrupts = <21 2>;
 121                         };
 122                         dma-channel@100 {
 123                                 compatible = "fsl,mpc8560-dma-channel",
 124                                                 "fsl,eloplus-dma-channel";
 125                                 reg = <0x100 0x80>;
 126                                 cell-index = <2>;
 127                                 interrupt-parent = <&mpic>;
 128                                 interrupts = <22 2>;
 129                         };
 130                         dma-channel@180 {
 131                                 compatible = "fsl,mpc8560-dma-channel",
 132                                                 "fsl,eloplus-dma-channel";
 133                                 reg = <0x180 0x80>;
 134                                 cell-index = <3>;
 135                                 interrupt-parent = <&mpic>;
 136                                 interrupts = <23 2>;
 137                         };
 138                 };
 139
 140                 mdio@24520 {
 141                         #address-cells = <1>;
 142                         #size-cells = <0>;
 143                         compatible = "fsl,gianfar-mdio";
 144                         reg = <0x24520 0x20>;
 145
 146                         phy1: ethernet-phy@1 {
 147                                 interrupt-parent = <&mpic>;
 148                                 interrupts = <8 1>;
 149                                 reg = <1>;
 150                                 device_type = "ethernet-phy";
 151                         };
 152                         phy2: ethernet-phy@2 {
 153                                 interrupt-parent = <&mpic>;
 154                                 interrupts = <8 1>;
 155                                 reg = <2>;
 156                                 device_type = "ethernet-phy";
 157                         };
 158                         phy3: ethernet-phy@3 {
 159                                 interrupt-parent = <&mpic>;
 160                                 interrupts = <8 1>;
 161                                 reg = <3>;
 162                                 device_type = "ethernet-phy";
 163                         };
 164                         tbi0: tbi-phy@11 {
 165                                 reg = <0x11>;
 166                                 device_type = "tbi-phy";
 167                         };
 168                 };
 169
 170                 mdio@25520 {
 171                         #address-cells = <1>;
 172                         #size-cells = <0>;
 173                         compatible = "fsl,gianfar-tbi";
 174                         reg = <0x25520 0x20>;
 175
 176                         tbi1: tbi-phy@11 {
 177                                 reg = <0x11>;
 178                                 device_type = "tbi-phy";
 179                         };
 180                 };
 181
 182                 enet0: ethernet@24000 {
 183                         cell-index = <0>;
 184                         device_type = "network";
 185                         model = "TSEC";
 186                         compatible = "gianfar";
 187                         reg = <0x24000 0x1000>;
 188                         local-mac-address = [ 00 00 00 00 00 00 ];
 189                         interrupts = <29 2 30 2 34 2>;
 190                         interrupt-parent = <&mpic>;
 191                         tbi-handle = <&tbi0>;
 192                         phy-handle = <&phy2>;
 193                 };
 194
 195                 enet1: ethernet@25000 {
 196                         cell-index = <1>;
 197                         device_type = "network";
 198                         model = "TSEC";
 199                         compatible = "gianfar";
 200                         reg = <0x25000 0x1000>;
 201                         local-mac-address = [ 00 00 00 00 00 00 ];
 202                         interrupts = <35 2 36 2 40 2>;
 203                         interrupt-parent = <&mpic>;
 204                         tbi-handle = <&tbi1>;
 205                         phy-handle = <&phy1>;
 206                 };
 207
 208                 mpic: pic@40000 {
 209                         interrupt-controller;
 210                         #address-cells = <0>;
 211                         #interrupt-cells = <2>;
 212                         reg = <0x40000 0x40000>;
 213                         device_type = "open-pic";
 214                         compatible = "chrp,open-pic";
 215                 };
 216
 217                 cpm@919c0 {
 218                         #address-cells = <1>;
 219                         #size-cells = <1>;
 220                         compatible = "fsl,mpc8560-cpm", "fsl,cpm2", "simple-bus";
 221                         reg = <0x919c0 0x30>;
 222                         ranges;
 223
 224                         muram@80000 {
 225                                 #address-cells = <1>;
 226                                 #size-cells = <1>;
 227                                 ranges = <0 0x80000 0x10000>;
 228
 229                                 data@0 {
 230                                         compatible = "fsl,cpm-muram-data";
 231                                         reg = <0 0x4000 0x9000 0x2000>;
 232                                 };
 233                         };
 234
 235                         brg@919f0 {
 236                                 compatible = "fsl,mpc8560-brg",
 237                                              "fsl,cpm2-brg",
 238                                              "fsl,cpm-brg";
 239                                 reg = <0x919f0 0x10 0x915f0 0x10>;
 240                                 clock-frequency = <0>;
 241                         };
 242
 243                         cpmpic: pic@90c00 {
 244                                 interrupt-controller;
 245                                 #address-cells = <0>;
 246                                 #interrupt-cells = <2>;
 247                                 interrupts = <46 2>;
 248                                 interrupt-parent = <&mpic>;
 249                                 reg = <0x90c00 0x80>;
 250                                 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
 251                         };
 252
 253                         serial0: serial@91a00 {
 254                                 device_type = "serial";
 255                                 compatible = "fsl,mpc8560-scc-uart",
 256                                              "fsl,cpm2-scc-uart";
 257                                 reg = <0x91a00 0x20 0x88000 0x100>;
 258                                 fsl,cpm-brg = <1>;
 259                                 fsl,cpm-command = <0x800000>;
 260                                 current-speed = <115200>;
 261                                 interrupts = <40 8>;
 262                                 interrupt-parent = <&cpmpic>;
 263                         };
 264
 265                         serial1: serial@91a20 {
 266                                 device_type = "serial";
 267                                 compatible = "fsl,mpc8560-scc-uart",
 268                                              "fsl,cpm2-scc-uart";
 269                                 reg = <0x91a20 0x20 0x88100 0x100>;
 270                                 fsl,cpm-brg = <2>;
 271                                 fsl,cpm-command = <0x4a00000>;
 272                                 current-speed = <115200>;
 273                                 interrupts = <41 8>;
 274                                 interrupt-parent = <&cpmpic>;
 275                         };
 276
 277                         enet2: ethernet@91340 {
 278                                 device_type = "network";
 279                                 compatible = "fsl,mpc8560-fcc-enet",
 280                                              "fsl,cpm2-fcc-enet";
 281                                 reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>;
 282                                 local-mac-address = [ 00 00 00 00 00 00 ];
 283                                 fsl,cpm-command = <0x1a400300>;
 284                                 interrupts = <34 8>;
 285                                 interrupt-parent = <&cpmpic>;
 286                                 phy-handle = <&phy3>;
 287                         };
 288                 };
 289         };
 290
 291         localbus@e0005000 {
 292                 compatible = "fsl,mpc8560-localbus", "fsl,pq3-localbus",
 293                              "simple-bus";
 294                 #address-cells = <2>;
 295                 #size-cells = <1>;
 296                 reg = <0xe0005000 0x100>;       // BRx, ORx, etc.
 297
 298                 ranges = <
 299                         0 0x0 0xfc000000 0x04000000     // NOR FLASH bank 1
 300                         1 0x0 0xf8000000 0x08000000     // NOR FLASH bank 0
 301                         2 0x0 0xe3000000 0x00008000     // CAN (2 x i82527)
 302                 >;
 303
 304                 flash@1,0 {
 305                         #address-cells = <1>;
 306                         #size-cells = <1>;
 307                         compatible = "cfi-flash";
 308                         reg = <1 0x0 0x8000000>;
 309                         bank-width = <4>;
 310                         device-width = <1>;
 311
 312                         partition@0 {
 313                                 label = "kernel";
 314                                 reg = <0x00000000 0x00200000>;
 315                         };
 316                         partition@200000 {
 317                                 label = "root";
 318                                 reg = <0x00200000 0x00300000>;
 319                         };
 320                         partition@500000 {
 321                                 label = "user";
 322                                 reg = <0x00500000 0x07a00000>;
 323                         };
 324                         partition@7f00000 {
 325                                 label = "env1";
 326                                 reg = <0x07f00000 0x00040000>;
 327                         };
 328                         partition@7f40000 {
 329                                 label = "env2";
 330                                 reg = <0x07f40000 0x00040000>;
 331                         };
 332                         partition@7f80000 {
 333                                 label = "u-boot";
 334                                 reg = <0x07f80000 0x00080000>;
 335                                 read-only;
 336                         };
 337                 };
 338
 339                 /* Note: CAN support needs be enabled in U-Boot */
 340                 can0@2,0 {
 341                         compatible = "intel,82527"; // Bosch CC770
 342                         reg = <2 0x0 0x100>;
 343                         interrupts = <4 1>;
 344                         interrupt-parent = <&mpic>;
 345                 };
 346
 347                 can1@2,100 {
 348                         compatible = "intel,82527"; // Bosch CC770
 349                         reg = <2 0x100 0x100>;
 350                         interrupts = <4 1>;
 351                         interrupt-parent = <&mpic>;
 352                 };
 353         };
 354
 355         pci0: pci@e0008000 {
 356                 cell-index = <0>;
 357                 #interrupt-cells = <1>;
 358                 #size-cells = <2>;
 359                 #address-cells = <3>;
 360                 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
 361                 device_type = "pci";
 362                 reg = <0xe0008000 0x1000>;
 363                 clock-frequency = <66666666>;
 364                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
 365                 interrupt-map = <
 366                                 /* IDSEL 28 */
 367                                  0xe000 0 0 1 &mpic 2 1
 368                                  0xe000 0 0 2 &mpic 3 1>;
 369
 370                 interrupt-parent = <&mpic>;
 371                 interrupts = <24 2>;
 372                 bus-range = <0 0>;
 373                 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
 374                           0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;
 375         };
 376 };