2 * TQM 8560 Device Tree Source
4 * Copyright 2008 Freescale Semiconductor Inc.
5 * Copyright 2008 Wolfgang Grandegger <wg@grandegger.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
16 model = "tqc,tqm8560";
17 compatible = "tqc,tqm8560";
37 d-cache-line-size = <32>;
38 i-cache-line-size = <32>;
39 d-cache-size = <32768>;
40 i-cache-size = <32768>;
41 timebase-frequency = <0>;
43 clock-frequency = <0>;
44 next-level-cache = <&L2>;
49 device_type = "memory";
50 reg = <0x00000000 0x10000000>;
57 ranges = <0x0 0xe0000000 0x100000>;
58 reg = <0xe0000000 0x200>;
60 compatible = "fsl,mpc8560-immr", "simple-bus";
62 memory-controller@2000 {
63 compatible = "fsl,8540-memory-controller";
64 reg = <0x2000 0x1000>;
65 interrupt-parent = <&mpic>;
69 L2: l2-cache-controller@20000 {
70 compatible = "fsl,8540-l2-cache-controller";
71 reg = <0x20000 0x1000>;
72 cache-line-size = <32>;
73 cache-size = <0x40000>; // L2, 256K
74 interrupt-parent = <&mpic>;
82 compatible = "fsl-i2c";
85 interrupt-parent = <&mpic>;
89 compatible = "national,lm75";
94 compatible = "dallas,ds1337";
100 #address-cells = <1>;
102 compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
104 ranges = <0x0 0x21100 0x200>;
107 compatible = "fsl,mpc8560-dma-channel",
108 "fsl,eloplus-dma-channel";
111 interrupt-parent = <&mpic>;
115 compatible = "fsl,mpc8560-dma-channel",
116 "fsl,eloplus-dma-channel";
119 interrupt-parent = <&mpic>;
123 compatible = "fsl,mpc8560-dma-channel",
124 "fsl,eloplus-dma-channel";
127 interrupt-parent = <&mpic>;
131 compatible = "fsl,mpc8560-dma-channel",
132 "fsl,eloplus-dma-channel";
135 interrupt-parent = <&mpic>;
141 #address-cells = <1>;
143 compatible = "fsl,gianfar-mdio";
144 reg = <0x24520 0x20>;
146 phy1: ethernet-phy@1 {
147 interrupt-parent = <&mpic>;
150 device_type = "ethernet-phy";
152 phy2: ethernet-phy@2 {
153 interrupt-parent = <&mpic>;
156 device_type = "ethernet-phy";
158 phy3: ethernet-phy@3 {
159 interrupt-parent = <&mpic>;
162 device_type = "ethernet-phy";
166 device_type = "tbi-phy";
171 #address-cells = <1>;
173 compatible = "fsl,gianfar-tbi";
174 reg = <0x25520 0x20>;
178 device_type = "tbi-phy";
182 enet0: ethernet@24000 {
184 device_type = "network";
186 compatible = "gianfar";
187 reg = <0x24000 0x1000>;
188 local-mac-address = [ 00 00 00 00 00 00 ];
189 interrupts = <29 2 30 2 34 2>;
190 interrupt-parent = <&mpic>;
191 tbi-handle = <&tbi0>;
192 phy-handle = <&phy2>;
195 enet1: ethernet@25000 {
197 device_type = "network";
199 compatible = "gianfar";
200 reg = <0x25000 0x1000>;
201 local-mac-address = [ 00 00 00 00 00 00 ];
202 interrupts = <35 2 36 2 40 2>;
203 interrupt-parent = <&mpic>;
204 tbi-handle = <&tbi1>;
205 phy-handle = <&phy1>;
209 interrupt-controller;
210 #address-cells = <0>;
211 #interrupt-cells = <2>;
212 reg = <0x40000 0x40000>;
213 device_type = "open-pic";
214 compatible = "chrp,open-pic";
218 #address-cells = <1>;
220 compatible = "fsl,mpc8560-cpm", "fsl,cpm2", "simple-bus";
221 reg = <0x919c0 0x30>;
225 #address-cells = <1>;
227 ranges = <0 0x80000 0x10000>;
230 compatible = "fsl,cpm-muram-data";
231 reg = <0 0x4000 0x9000 0x2000>;
236 compatible = "fsl,mpc8560-brg",
239 reg = <0x919f0 0x10 0x915f0 0x10>;
240 clock-frequency = <0>;
244 interrupt-controller;
245 #address-cells = <0>;
246 #interrupt-cells = <2>;
248 interrupt-parent = <&mpic>;
249 reg = <0x90c00 0x80>;
250 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
253 serial0: serial@91a00 {
254 device_type = "serial";
255 compatible = "fsl,mpc8560-scc-uart",
257 reg = <0x91a00 0x20 0x88000 0x100>;
259 fsl,cpm-command = <0x800000>;
260 current-speed = <115200>;
262 interrupt-parent = <&cpmpic>;
265 serial1: serial@91a20 {
266 device_type = "serial";
267 compatible = "fsl,mpc8560-scc-uart",
269 reg = <0x91a20 0x20 0x88100 0x100>;
271 fsl,cpm-command = <0x4a00000>;
272 current-speed = <115200>;
274 interrupt-parent = <&cpmpic>;
277 enet2: ethernet@91340 {
278 device_type = "network";
279 compatible = "fsl,mpc8560-fcc-enet",
281 reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>;
282 local-mac-address = [ 00 00 00 00 00 00 ];
283 fsl,cpm-command = <0x1a400300>;
285 interrupt-parent = <&cpmpic>;
286 phy-handle = <&phy3>;
292 compatible = "fsl,mpc8560-localbus", "fsl,pq3-localbus",
294 #address-cells = <2>;
296 reg = <0xe0005000 0x100>; // BRx, ORx, etc.
299 0 0x0 0xfc000000 0x04000000 // NOR FLASH bank 1
300 1 0x0 0xf8000000 0x08000000 // NOR FLASH bank 0
301 2 0x0 0xe3000000 0x00008000 // CAN (2 x i82527)
305 #address-cells = <1>;
307 compatible = "cfi-flash";
308 reg = <1 0x0 0x8000000>;
314 reg = <0x00000000 0x00200000>;
318 reg = <0x00200000 0x00300000>;
322 reg = <0x00500000 0x07a00000>;
326 reg = <0x07f00000 0x00040000>;
330 reg = <0x07f40000 0x00040000>;
334 reg = <0x07f80000 0x00080000>;
339 /* Note: CAN support needs be enabled in U-Boot */
341 compatible = "intel,82527"; // Bosch CC770
344 interrupt-parent = <&mpic>;
348 compatible = "intel,82527"; // Bosch CC770
349 reg = <2 0x100 0x100>;
351 interrupt-parent = <&mpic>;
357 #interrupt-cells = <1>;
359 #address-cells = <3>;
360 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
362 reg = <0xe0008000 0x1000>;
363 clock-frequency = <66666666>;
364 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
367 0xe000 0 0 1 &mpic 2 1
368 0xe000 0 0 2 &mpic 3 1>;
370 interrupt-parent = <&mpic>;
373 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
374 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;