2 * Copyright (C) 2001 Dave Engebretsen & Todd Inglett IBM Corporation.
3 * Copyright 2001-2012 IBM Corporation.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 #ifndef _POWERPC_EEH_H
21 #define _POWERPC_EEH_H
24 #include <linux/init.h>
25 #include <linux/list.h>
26 #include <linux/string.h>
27 #include <linux/time.h>
36 * The struct is used to trace PE related EEH functionality.
37 * In theory, there will have one instance of the struct to
38 * be created against particular PE. In nature, PEs corelate
39 * to each other. the struct has to reflect that hierarchy in
40 * order to easily pick up those affected PEs when one particular
43 * Also, one particular PE might be composed of PCI device, PCI
44 * bus and its subordinate components. The struct also need ship
45 * the information. Further more, one particular PE is only meaingful
46 * in the corresponding PHB. Therefore, the root PEs should be created
47 * against existing PHBs in on-to-one fashion.
49 #define EEH_PE_INVALID (1 << 0) /* Invalid */
50 #define EEH_PE_PHB (1 << 1) /* PHB PE */
51 #define EEH_PE_DEVICE (1 << 2) /* Device PE */
52 #define EEH_PE_BUS (1 << 3) /* Bus PE */
54 #define EEH_PE_ISOLATED (1 << 0) /* Isolated PE */
55 #define EEH_PE_RECOVERING (1 << 1) /* Recovering PE */
56 #define EEH_PE_PHB_DEAD (1 << 2) /* Dead PHB */
59 int type
; /* PE type: PHB/Bus/Device */
60 int state
; /* PE EEH dependent mode */
61 int config_addr
; /* Traditional PCI address */
62 int addr
; /* PE configuration address */
63 struct pci_controller
*phb
; /* Associated PHB */
64 struct pci_bus
*bus
; /* Top PCI bus for bus PE */
65 int check_count
; /* Times of ignored error */
66 int freeze_count
; /* Times of froze up */
67 struct timeval tstamp
; /* Time on first-time freeze */
68 int false_positives
; /* Times of reported #ff's */
69 struct eeh_pe
*parent
; /* Parent PE */
70 struct list_head child_list
; /* Link PE to the child list */
71 struct list_head edevs
; /* Link list of EEH devices */
72 struct list_head child
; /* Child PEs */
75 #define eeh_pe_for_each_dev(pe, edev) \
76 list_for_each_entry(edev, &pe->edevs, list)
79 * The struct is used to trace EEH state for the associated
80 * PCI device node or PCI device. In future, it might
81 * represent PE as well so that the EEH device to form
82 * another tree except the currently existing tree of PCI
83 * buses and PCI devices
85 #define EEH_DEV_IRQ_DISABLED (1<<0) /* Interrupt disabled */
88 int mode
; /* EEH mode */
89 int class_code
; /* Class code of the device */
90 int config_addr
; /* Config address */
91 int pe_config_addr
; /* PE config address */
92 u32 config_space
[16]; /* Saved PCI config space */
93 struct eeh_pe
*pe
; /* Associated PE */
94 struct list_head list
; /* Form link list in the PE */
95 struct pci_controller
*phb
; /* Associated PHB */
96 struct device_node
*dn
; /* Associated device node */
97 struct pci_dev
*pdev
; /* Associated PCI device */
100 static inline struct device_node
*eeh_dev_to_of_node(struct eeh_dev
*edev
)
102 return edev
? edev
->dn
: NULL
;
105 static inline struct pci_dev
*eeh_dev_to_pci_dev(struct eeh_dev
*edev
)
107 return edev
? edev
->pdev
: NULL
;
111 * The struct is used to trace the registered EEH operation
112 * callback functions. Actually, those operation callback
113 * functions are heavily platform dependent. That means the
114 * platform should register its own EEH operation callback
115 * functions before any EEH further operations.
117 #define EEH_OPT_DISABLE 0 /* EEH disable */
118 #define EEH_OPT_ENABLE 1 /* EEH enable */
119 #define EEH_OPT_THAW_MMIO 2 /* MMIO enable */
120 #define EEH_OPT_THAW_DMA 3 /* DMA enable */
121 #define EEH_STATE_UNAVAILABLE (1 << 0) /* State unavailable */
122 #define EEH_STATE_NOT_SUPPORT (1 << 1) /* EEH not supported */
123 #define EEH_STATE_RESET_ACTIVE (1 << 2) /* Active reset */
124 #define EEH_STATE_MMIO_ACTIVE (1 << 3) /* Active MMIO */
125 #define EEH_STATE_DMA_ACTIVE (1 << 4) /* Active DMA */
126 #define EEH_STATE_MMIO_ENABLED (1 << 5) /* MMIO enabled */
127 #define EEH_STATE_DMA_ENABLED (1 << 6) /* DMA enabled */
128 #define EEH_RESET_DEACTIVATE 0 /* Deactivate the PE reset */
129 #define EEH_RESET_HOT 1 /* Hot reset */
130 #define EEH_RESET_FUNDAMENTAL 3 /* Fundamental reset */
131 #define EEH_LOG_TEMP 1 /* EEH temporary error log */
132 #define EEH_LOG_PERM 2 /* EEH permanent error log */
137 int (*post_init
)(void);
138 void* (*of_probe
)(struct device_node
*dn
, void *flag
);
139 int (*dev_probe
)(struct pci_dev
*dev
, void *flag
);
140 int (*set_option
)(struct eeh_pe
*pe
, int option
);
141 int (*get_pe_addr
)(struct eeh_pe
*pe
);
142 int (*get_state
)(struct eeh_pe
*pe
, int *state
);
143 int (*reset
)(struct eeh_pe
*pe
, int option
);
144 int (*wait_state
)(struct eeh_pe
*pe
, int max_wait
);
145 int (*get_log
)(struct eeh_pe
*pe
, int severity
, char *drv_log
, unsigned long len
);
146 int (*configure_bridge
)(struct eeh_pe
*pe
);
147 int (*read_config
)(struct device_node
*dn
, int where
, int size
, u32
*val
);
148 int (*write_config
)(struct device_node
*dn
, int where
, int size
, u32 val
);
149 int (*next_error
)(struct eeh_pe
**pe
);
152 extern struct eeh_ops
*eeh_ops
;
153 extern int eeh_subsystem_enabled
;
154 extern raw_spinlock_t confirm_error_lock
;
155 extern int eeh_probe_mode
;
157 #define EEH_PROBE_MODE_DEV (1<<0) /* From PCI device */
158 #define EEH_PROBE_MODE_DEVTREE (1<<1) /* From device tree */
160 static inline void eeh_probe_mode_set(int flag
)
162 eeh_probe_mode
= flag
;
165 static inline int eeh_probe_mode_devtree(void)
167 return (eeh_probe_mode
== EEH_PROBE_MODE_DEVTREE
);
170 static inline int eeh_probe_mode_dev(void)
172 return (eeh_probe_mode
== EEH_PROBE_MODE_DEV
);
175 static inline void eeh_serialize_lock(unsigned long *flags
)
177 raw_spin_lock_irqsave(&confirm_error_lock
, *flags
);
180 static inline void eeh_serialize_unlock(unsigned long flags
)
182 raw_spin_unlock_irqrestore(&confirm_error_lock
, flags
);
186 * Max number of EEH freezes allowed before we consider the device
187 * to be permanently disabled.
189 #define EEH_MAX_ALLOWED_FREEZES 5
191 typedef void *(*eeh_traverse_func
)(void *data
, void *flag
);
192 int eeh_phb_pe_create(struct pci_controller
*phb
);
193 struct eeh_pe
*eeh_phb_pe_get(struct pci_controller
*phb
);
194 struct eeh_pe
*eeh_pe_get(struct eeh_dev
*edev
);
195 int eeh_add_to_parent_pe(struct eeh_dev
*edev
);
196 int eeh_rmv_from_parent_pe(struct eeh_dev
*edev
, int purge_pe
);
197 void eeh_pe_update_time_stamp(struct eeh_pe
*pe
);
198 void *eeh_pe_dev_traverse(struct eeh_pe
*root
,
199 eeh_traverse_func fn
, void *flag
);
200 void eeh_pe_restore_bars(struct eeh_pe
*pe
);
201 struct pci_bus
*eeh_pe_bus_get(struct eeh_pe
*pe
);
203 void *eeh_dev_init(struct device_node
*dn
, void *data
);
204 void eeh_dev_phb_init_dynamic(struct pci_controller
*phb
);
206 int __init
eeh_ops_register(struct eeh_ops
*ops
);
207 int __exit
eeh_ops_unregister(const char *name
);
208 unsigned long eeh_check_failure(const volatile void __iomem
*token
,
210 int eeh_dev_check_failure(struct eeh_dev
*edev
);
211 void eeh_addr_cache_build(void);
212 void eeh_add_device_tree_early(struct device_node
*);
213 void eeh_add_device_tree_late(struct pci_bus
*);
214 void eeh_add_sysfs_files(struct pci_bus
*);
215 void eeh_remove_bus_device(struct pci_dev
*, int);
218 * EEH_POSSIBLE_ERROR() -- test for possible MMIO failure.
220 * If this macro yields TRUE, the caller relays to eeh_check_failure()
221 * which does further tests out of line.
223 #define EEH_POSSIBLE_ERROR(val, type) ((val) == (type)~0 && eeh_subsystem_enabled)
226 * Reads from a device which has been isolated by EEH will return
227 * all 1s. This macro gives an all-1s value of the given size (in
228 * bytes: 1, 2, or 4) for comparing with the result of a read.
230 #define EEH_IO_ERROR_VALUE(size) (~0U >> ((4 - (size)) * 8))
232 #else /* !CONFIG_EEH */
234 static inline int eeh_init(void)
239 static inline void *eeh_dev_init(struct device_node
*dn
, void *data
)
244 static inline void eeh_dev_phb_init_dynamic(struct pci_controller
*phb
) { }
246 static inline unsigned long eeh_check_failure(const volatile void __iomem
*token
, unsigned long val
)
251 #define eeh_dev_check_failure(x) (0)
253 static inline void eeh_addr_cache_build(void) { }
255 static inline void eeh_add_device_tree_early(struct device_node
*dn
) { }
257 static inline void eeh_add_device_tree_late(struct pci_bus
*bus
) { }
259 static inline void eeh_add_sysfs_files(struct pci_bus
*bus
) { }
261 static inline void eeh_remove_bus_device(struct pci_dev
*dev
, int purge_pe
) { }
263 #define EEH_POSSIBLE_ERROR(val, type) (0)
264 #define EEH_IO_ERROR_VALUE(size) (-1UL)
265 #endif /* CONFIG_EEH */
269 * MMIO read/write operations with EEH support.
271 static inline u8
eeh_readb(const volatile void __iomem
*addr
)
274 if (EEH_POSSIBLE_ERROR(val
, u8
))
275 return eeh_check_failure(addr
, val
);
279 static inline u16
eeh_readw(const volatile void __iomem
*addr
)
281 u16 val
= in_le16(addr
);
282 if (EEH_POSSIBLE_ERROR(val
, u16
))
283 return eeh_check_failure(addr
, val
);
287 static inline u32
eeh_readl(const volatile void __iomem
*addr
)
289 u32 val
= in_le32(addr
);
290 if (EEH_POSSIBLE_ERROR(val
, u32
))
291 return eeh_check_failure(addr
, val
);
295 static inline u64
eeh_readq(const volatile void __iomem
*addr
)
297 u64 val
= in_le64(addr
);
298 if (EEH_POSSIBLE_ERROR(val
, u64
))
299 return eeh_check_failure(addr
, val
);
303 static inline u16
eeh_readw_be(const volatile void __iomem
*addr
)
305 u16 val
= in_be16(addr
);
306 if (EEH_POSSIBLE_ERROR(val
, u16
))
307 return eeh_check_failure(addr
, val
);
311 static inline u32
eeh_readl_be(const volatile void __iomem
*addr
)
313 u32 val
= in_be32(addr
);
314 if (EEH_POSSIBLE_ERROR(val
, u32
))
315 return eeh_check_failure(addr
, val
);
319 static inline u64
eeh_readq_be(const volatile void __iomem
*addr
)
321 u64 val
= in_be64(addr
);
322 if (EEH_POSSIBLE_ERROR(val
, u64
))
323 return eeh_check_failure(addr
, val
);
327 static inline void eeh_memcpy_fromio(void *dest
, const
328 volatile void __iomem
*src
,
331 _memcpy_fromio(dest
, src
, n
);
333 /* Look for ffff's here at dest[n]. Assume that at least 4 bytes
334 * were copied. Check all four bytes.
336 if (n
>= 4 && EEH_POSSIBLE_ERROR(*((u32
*)(dest
+ n
- 4)), u32
))
337 eeh_check_failure(src
, *((u32
*)(dest
+ n
- 4)));
340 /* in-string eeh macros */
341 static inline void eeh_readsb(const volatile void __iomem
*addr
, void * buf
,
344 _insb(addr
, buf
, ns
);
345 if (EEH_POSSIBLE_ERROR((*(((u8
*)buf
)+ns
-1)), u8
))
346 eeh_check_failure(addr
, *(u8
*)buf
);
349 static inline void eeh_readsw(const volatile void __iomem
*addr
, void * buf
,
352 _insw(addr
, buf
, ns
);
353 if (EEH_POSSIBLE_ERROR((*(((u16
*)buf
)+ns
-1)), u16
))
354 eeh_check_failure(addr
, *(u16
*)buf
);
357 static inline void eeh_readsl(const volatile void __iomem
*addr
, void * buf
,
360 _insl(addr
, buf
, nl
);
361 if (EEH_POSSIBLE_ERROR((*(((u32
*)buf
)+nl
-1)), u32
))
362 eeh_check_failure(addr
, *(u32
*)buf
);
365 #endif /* CONFIG_PPC64 */
366 #endif /* __KERNEL__ */
367 #endif /* _POWERPC_EEH_H */