2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License, version 2, as
4 * published by the Free Software Foundation.
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
15 * Copyright SUSE Linux Products GmbH 2010
17 * Authors: Alexander Graf <agraf@suse.de>
20 #ifndef __ASM_KVM_BOOK3S_64_H__
21 #define __ASM_KVM_BOOK3S_64_H__
23 #ifdef CONFIG_KVM_BOOK3S_PR
24 static inline struct kvmppc_book3s_shadow_vcpu
*svcpu_get(struct kvm_vcpu
*vcpu
)
27 return &get_paca()->shadow_vcpu
;
30 static inline void svcpu_put(struct kvmppc_book3s_shadow_vcpu
*svcpu
)
36 #define SPAPR_TCE_SHIFT 12
38 #ifdef CONFIG_KVM_BOOK3S_64_HV
39 #define KVM_DEFAULT_HPT_ORDER 24 /* 16MB HPT by default */
40 extern int kvm_hpt_order
; /* order of preallocated HPTs */
43 #define VRMA_VSID 0x1ffffffUL /* 1TB VSID reserved for VRMA */
46 * We use a lock bit in HPTE dword 0 to synchronize updates and
47 * accesses to each HPTE, and another bit to indicate non-present
50 #define HPTE_V_HVLOCK 0x40UL
51 #define HPTE_V_ABSENT 0x20UL
54 * We use this bit in the guest_rpte field of the revmap entry
55 * to indicate a modified HPTE.
57 #define HPTE_GR_MODIFIED (1ul << 62)
59 /* These bits are reserved in the guest view of the HPTE */
60 #define HPTE_GR_RESERVED HPTE_GR_MODIFIED
62 static inline long try_lock_hpte(unsigned long *hpte
, unsigned long bits
)
64 unsigned long tmp
, old
;
66 asm volatile(" ldarx %0,0,%2\n"
74 : "=&r" (tmp
), "=&r" (old
)
75 : "r" (hpte
), "r" (bits
), "i" (HPTE_V_HVLOCK
)
80 static inline unsigned long compute_tlbie_rb(unsigned long v
, unsigned long r
,
81 unsigned long pte_index
)
83 unsigned long rb
, va_low
;
85 rb
= (v
& ~0x7fUL
) << 16; /* AVA field */
86 va_low
= pte_index
>> 3;
87 if (v
& HPTE_V_SECONDARY
)
89 /* xor vsid from AVA */
90 if (!(v
& HPTE_V_1TB_SEG
))
95 if (v
& HPTE_V_LARGE
) {
96 rb
|= 1; /* L field */
97 if (cpu_has_feature(CPU_FTR_ARCH_206
) &&
99 /* non-16MB large page, must be 64k */
100 /* (masks depend on page size) */
101 rb
|= 0x1000; /* page encoding in LP field */
102 rb
|= (va_low
& 0x7f) << 16; /* 7b of VA in AVA/LP field */
103 rb
|= (va_low
& 0xfe); /* AVAL field (P7 doesn't seem to care) */
107 rb
|= (va_low
& 0x7ff) << 12; /* remaining 11b of VA */
109 rb
|= (v
>> 54) & 0x300; /* B field */
113 static inline unsigned long hpte_page_size(unsigned long h
, unsigned long l
)
115 /* only handle 4k, 64k and 16M pages for now */
116 if (!(h
& HPTE_V_LARGE
))
117 return 1ul << 12; /* 4k page */
118 if ((l
& 0xf000) == 0x1000 && cpu_has_feature(CPU_FTR_ARCH_206
))
119 return 1ul << 16; /* 64k page */
120 if ((l
& 0xff000) == 0)
121 return 1ul << 24; /* 16M page */
122 return 0; /* error */
125 static inline unsigned long hpte_rpn(unsigned long ptel
, unsigned long psize
)
127 return ((ptel
& HPTE_R_RPN
) & ~(psize
- 1)) >> PAGE_SHIFT
;
130 static inline int hpte_is_writable(unsigned long ptel
)
132 unsigned long pp
= ptel
& (HPTE_R_PP0
| HPTE_R_PP
);
134 return pp
!= PP_RXRX
&& pp
!= PP_RXXX
;
137 static inline unsigned long hpte_make_readonly(unsigned long ptel
)
139 if ((ptel
& HPTE_R_PP0
) || (ptel
& HPTE_R_PP
) == PP_RWXX
)
140 ptel
= (ptel
& ~HPTE_R_PP
) | PP_RXXX
;
146 static inline int hpte_cache_flags_ok(unsigned long ptel
, unsigned long io_type
)
148 unsigned int wimg
= ptel
& HPTE_R_WIMG
;
151 if (wimg
== (HPTE_R_W
| HPTE_R_I
| HPTE_R_M
) &&
152 cpu_has_feature(CPU_FTR_ARCH_206
))
156 return wimg
== HPTE_R_M
;
158 return (wimg
& (HPTE_R_W
| HPTE_R_I
)) == io_type
;
162 * Lock and read a linux PTE. If it's present and writable, atomically
163 * set dirty and referenced bits and return the PTE, otherwise return 0.
165 static inline pte_t
kvmppc_read_update_linux_pte(pte_t
*p
, int writing
)
169 /* wait until _PAGE_BUSY is clear then set it atomically */
170 __asm__
__volatile__ (
177 : "=&r" (pte
), "=&r" (tmp
), "=m" (*p
)
178 : "r" (p
), "i" (_PAGE_BUSY
)
181 if (pte_present(pte
)) {
182 pte
= pte_mkyoung(pte
);
183 if (writing
&& pte_write(pte
))
184 pte
= pte_mkdirty(pte
);
187 *p
= pte
; /* clears _PAGE_BUSY */
192 /* Return HPTE cache control bits corresponding to Linux pte bits */
193 static inline unsigned long hpte_cache_bits(unsigned long pte_val
)
195 #if _PAGE_NO_CACHE == HPTE_R_I && _PAGE_WRITETHRU == HPTE_R_W
196 return pte_val
& (HPTE_R_W
| HPTE_R_I
);
198 return ((pte_val
& _PAGE_NO_CACHE
) ? HPTE_R_I
: 0) +
199 ((pte_val
& _PAGE_WRITETHRU
) ? HPTE_R_W
: 0);
203 static inline bool hpte_read_permission(unsigned long pp
, unsigned long key
)
206 return PP_RWRX
<= pp
&& pp
<= PP_RXRX
;
210 static inline bool hpte_write_permission(unsigned long pp
, unsigned long key
)
213 return pp
== PP_RWRW
;
214 return pp
<= PP_RWRW
;
217 static inline int hpte_get_skey_perm(unsigned long hpte_r
, unsigned long amr
)
221 skey
= ((hpte_r
& HPTE_R_KEY_HI
) >> 57) |
222 ((hpte_r
& HPTE_R_KEY_LO
) >> 9);
223 return (amr
>> (62 - 2 * skey
)) & 3;
226 static inline void lock_rmap(unsigned long *rmap
)
229 while (test_bit(KVMPPC_RMAP_LOCK_BIT
, rmap
))
231 } while (test_and_set_bit_lock(KVMPPC_RMAP_LOCK_BIT
, rmap
));
234 static inline void unlock_rmap(unsigned long *rmap
)
236 __clear_bit_unlock(KVMPPC_RMAP_LOCK_BIT
, rmap
);
239 static inline bool slot_is_aligned(struct kvm_memory_slot
*memslot
,
240 unsigned long pagesize
)
242 unsigned long mask
= (pagesize
>> PAGE_SHIFT
) - 1;
244 if (pagesize
<= PAGE_SIZE
)
246 return !(memslot
->base_gfn
& mask
) && !(memslot
->npages
& mask
);
250 * This works for 4k, 64k and 16M pages on POWER7,
251 * and 4k and 16M pages on PPC970.
253 static inline unsigned long slb_pgsize_encoding(unsigned long psize
)
255 unsigned long senc
= 0;
257 if (psize
> 0x1000) {
259 if (psize
== 0x10000)
260 senc
|= SLB_VSID_LP_01
;
265 static inline int is_vrma_hpte(unsigned long hpte_v
)
267 return (hpte_v
& ~0xffffffUL
) ==
268 (HPTE_V_1TB_SEG
| (VRMA_VSID
<< (40 - 16)));
271 #endif /* __ASM_KVM_BOOK3S_64_H__ */