dc8c0aef5e6c525b40370017e9bad74be6917186
1 #ifndef _ASM_POWERPC_MMU_H_
2 #define _ASM_POWERPC_MMU_H_
5 #include <asm/asm-compat.h>
6 #include <asm/feature-fixups.h>
9 * MMU features bit definitions
13 * First half is MMU families
15 #define MMU_FTR_HPTE_TABLE ASM_CONST(0x00000001)
16 #define MMU_FTR_TYPE_8xx ASM_CONST(0x00000002)
17 #define MMU_FTR_TYPE_40x ASM_CONST(0x00000004)
18 #define MMU_FTR_TYPE_44x ASM_CONST(0x00000008)
19 #define MMU_FTR_TYPE_FSL_E ASM_CONST(0x00000010)
22 * This is individual features
25 /* Enable use of high BAT registers */
26 #define MMU_FTR_USE_HIGH_BATS ASM_CONST(0x00010000)
28 /* Enable >32-bit physical addresses on 32-bit processor, only used
29 * by CONFIG_6xx currently as BookE supports that from day 1
31 #define MMU_FTR_BIG_PHYS ASM_CONST(0x00020000)
34 #include <asm/cputable.h>
36 static inline int mmu_has_feature(unsigned long feature
)
38 return (cur_cpu_spec
->mmu_features
& feature
);
41 extern unsigned int __start___mmu_ftr_fixup
, __stop___mmu_ftr_fixup
;
43 #endif /* !__ASSEMBLY__ */
47 /* 64-bit classic hash table MMU */
48 # include <asm/mmu-hash64.h>
49 #elif defined(CONFIG_PPC_STD_MMU)
50 /* 32-bit classic hash table MMU */
51 # include <asm/mmu-hash32.h>
52 #elif defined(CONFIG_40x)
53 /* 40x-style software loaded TLB */
54 # include <asm/mmu-40x.h>
55 #elif defined(CONFIG_44x)
56 /* 44x-style software loaded TLB */
57 # include <asm/mmu-44x.h>
58 #elif defined(CONFIG_FSL_BOOKE)
59 /* Freescale Book-E software loaded TLB */
60 # include <asm/mmu-fsl-booke.h>
61 #elif defined (CONFIG_PPC_8xx)
62 /* Motorola/Freescale 8xx software loaded TLB */
63 # include <asm/mmu-8xx.h>
66 #endif /* __KERNEL__ */
67 #endif /* _ASM_POWERPC_MMU_H_ */
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