arch/powerpc/include/asm/page_64.h

   1 #ifndef _ASM_POWERPC_PAGE_64_H
   2 #define _ASM_POWERPC_PAGE_64_H
   3
   4 /*
   5  * Copyright (C) 2001 PPC64 Team, IBM Corp
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License
   9  * as published by the Free Software Foundation; either version
  10  * 2 of the License, or (at your option) any later version.
  11  */
  12
  13 /*
  14  * We always define HW_PAGE_SHIFT to 12 as use of 64K pages remains Linux
  15  * specific, every notion of page number shared with the firmware, TCEs,
  16  * iommu, etc... still uses a page size of 4K.
  17  */
  18 #define HW_PAGE_SHIFT           12
  19 #define HW_PAGE_SIZE            (ASM_CONST(1) << HW_PAGE_SHIFT)
  20 #define HW_PAGE_MASK            (~(HW_PAGE_SIZE-1))
  21
  22 /*
  23  * PAGE_FACTOR is the number of bits factor between PAGE_SHIFT and
  24  * HW_PAGE_SHIFT, that is 4K pages.
  25  */
  26 #define PAGE_FACTOR             (PAGE_SHIFT - HW_PAGE_SHIFT)
  27
  28 /* Segment size; normal 256M segments */
  29 #define SID_SHIFT               28
  30 #define SID_MASK                ASM_CONST(0xfffffffff)
  31 #define ESID_MASK               0xfffffffff0000000UL
  32 #define GET_ESID(x)             (((x) >> SID_SHIFT) & SID_MASK)
  33
  34 /* 1T segments */
  35 #define SID_SHIFT_1T            40
  36 #define SID_MASK_1T             0xffffffUL
  37 #define ESID_MASK_1T            0xffffff0000000000UL
  38 #define GET_ESID_1T(x)          (((x) >> SID_SHIFT_1T) & SID_MASK_1T)
  39
  40 #ifndef __ASSEMBLY__
  41 #include <asm/cache.h>
  42
  43 typedef unsigned long pte_basic_t;
  44
  45 static __inline__ void clear_page(void *addr)
  46 {
  47         unsigned long lines, line_size;
  48
  49         line_size = ppc64_caches.dline_size;
  50         lines = ppc64_caches.dlines_per_page;
  51
  52         __asm__ __volatile__(
  53         "mtctr  %1      # clear_page\n\
  54 1:      dcbz    0,%0\n\
  55         add     %0,%0,%3\n\
  56         bdnz+   1b"
  57         : "=r" (addr)
  58         : "r" (lines), "0" (addr), "r" (line_size)
  59         : "ctr", "memory");
  60 }
  61
  62 extern void copy_page(void *to, void *from);
  63
  64 /* Log 2 of page table size */
  65 extern u64 ppc64_pft_size;
  66
  67 #endif /* __ASSEMBLY__ */
  68
  69 #ifdef CONFIG_PPC_MM_SLICES
  70
  71 #define SLICE_LOW_SHIFT         28
  72 #define SLICE_HIGH_SHIFT        40
  73
  74 #define SLICE_LOW_TOP           (0x100000000ul)
  75 #define SLICE_NUM_LOW           (SLICE_LOW_TOP >> SLICE_LOW_SHIFT)
  76 #define SLICE_NUM_HIGH          (PGTABLE_RANGE >> SLICE_HIGH_SHIFT)
  77
  78 #define GET_LOW_SLICE_INDEX(addr)       ((addr) >> SLICE_LOW_SHIFT)
  79 #define GET_HIGH_SLICE_INDEX(addr)      ((addr) >> SLICE_HIGH_SHIFT)
  80
  81 #ifndef __ASSEMBLY__
  82
  83 struct slice_mask {
  84         u16 low_slices;
  85         u16 high_slices;
  86 };
  87
  88 struct mm_struct;
  89
  90 extern unsigned long slice_get_unmapped_area(unsigned long addr,
  91                                              unsigned long len,
  92                                              unsigned long flags,
  93                                              unsigned int psize,
  94                                              int topdown,
  95                                              int use_cache);
  96
  97 extern unsigned int get_slice_psize(struct mm_struct *mm,
  98                                     unsigned long addr);
  99
 100 extern void slice_init_context(struct mm_struct *mm, unsigned int psize);
 101 extern void slice_set_user_psize(struct mm_struct *mm, unsigned int psize);
 102 extern void slice_set_range_psize(struct mm_struct *mm, unsigned long start,
 103                                   unsigned long len, unsigned int psize);
 104
 105 #define slice_mm_new_context(mm)        ((mm)->context.id == MMU_NO_CONTEXT)
 106
 107 #endif /* __ASSEMBLY__ */
 108 #else
 109 #define slice_init()
 110 #ifdef CONFIG_PPC_STD_MMU_64
 111 #define get_slice_psize(mm, addr)       ((mm)->context.user_psize)
 112 #define slice_set_user_psize(mm, psize)         \
 113 do {                                            \
 114         (mm)->context.user_psize = (psize);     \
 115         (mm)->context.sllp = SLB_VSID_USER | mmu_psize_defs[(psize)].sllp; \
 116 } while (0)
 117 #else /* CONFIG_PPC_STD_MMU_64 */
 118 #ifdef CONFIG_PPC_64K_PAGES
 119 #define get_slice_psize(mm, addr)       MMU_PAGE_64K
 120 #else /* CONFIG_PPC_64K_PAGES */
 121 #define get_slice_psize(mm, addr)       MMU_PAGE_4K
 122 #endif /* !CONFIG_PPC_64K_PAGES */
 123 #define slice_set_user_psize(mm, psize) do { BUG(); } while(0)
 124 #endif /* !CONFIG_PPC_STD_MMU_64 */
 125
 126 #define slice_set_range_psize(mm, start, len, psize)    \
 127         slice_set_user_psize((mm), (psize))
 128 #define slice_mm_new_context(mm)        1
 129 #endif /* CONFIG_PPC_MM_SLICES */
 130
 131 #ifdef CONFIG_HUGETLB_PAGE
 132
 133 #define HAVE_ARCH_HUGETLB_UNMAPPED_AREA
 134
 135 #endif /* !CONFIG_HUGETLB_PAGE */
 136
 137 #define VM_DATA_DEFAULT_FLAGS \
 138         (is_32bit_task() ? \
 139          VM_DATA_DEFAULT_FLAGS32 : VM_DATA_DEFAULT_FLAGS64)
 140
 141 /*
 142  * This is the default if a program doesn't have a PT_GNU_STACK
 143  * program header entry. The PPC64 ELF ABI has a non executable stack
 144  * stack by default, so in the absence of a PT_GNU_STACK program header
 145  * we turn execute permission off.
 146  */
 147 #define VM_STACK_DEFAULT_FLAGS32        (VM_READ | VM_WRITE | VM_EXEC | \
 148                                          VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
 149
 150 #define VM_STACK_DEFAULT_FLAGS64        (VM_READ | VM_WRITE | \
 151                                          VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
 152
 153 #define VM_STACK_DEFAULT_FLAGS \
 154         (is_32bit_task() ? \
 155          VM_STACK_DEFAULT_FLAGS32 : VM_STACK_DEFAULT_FLAGS64)
 156
 157 #include <asm-generic/getorder.h>
 158
 159 #endif /* _ASM_POWERPC_PAGE_64_H */