542073836b297f4907b174aad830b0aa691ae21a
1 #ifndef _ASM_POWERPC_PGTABLE_PPC64_H_
2 #define _ASM_POWERPC_PGTABLE_PPC64_H_
4 * This file contains the functions and defines necessary to modify and use
5 * the ppc64 hashed page table.
9 #include <linux/stddef.h>
10 #include <asm/tlbflush.h>
11 #endif /* __ASSEMBLY__ */
13 #ifdef CONFIG_PPC_64K_PAGES
14 #include <asm/pgtable-ppc64-64k.h>
16 #include <asm/pgtable-ppc64-4k.h>
19 #define FIRST_USER_ADDRESS 0
22 * Size of EA range mapped by our pagetables.
24 #define PGTABLE_EADDR_SIZE (PTE_INDEX_SIZE + PMD_INDEX_SIZE + \
25 PUD_INDEX_SIZE + PGD_INDEX_SIZE + PAGE_SHIFT)
26 #define PGTABLE_RANGE (ASM_CONST(1) << PGTABLE_EADDR_SIZE)
29 /* Some sanity checking */
30 #if TASK_SIZE_USER64 > PGTABLE_RANGE
31 #error TASK_SIZE_USER64 exceeds pagetable range
34 #if TASK_SIZE_USER64 > (1UL << (USER_ESID_BITS + SID_SHIFT))
35 #error TASK_SIZE_USER64 exceeds user VSID range
39 * Define the address range of the vmalloc VM area.
41 #define VMALLOC_START ASM_CONST(0xD000000000000000)
42 #define VMALLOC_SIZE (PGTABLE_RANGE >> 1)
43 #define VMALLOC_END (VMALLOC_START + VMALLOC_SIZE)
46 * Define the address ranges for MMIO and IO space :
48 * ISA_IO_BASE = VMALLOC_END, 64K reserved area
49 * PHB_IO_BASE = ISA_IO_BASE + 64K to ISA_IO_BASE + 2G, PHB IO spaces
50 * IOREMAP_BASE = ISA_IO_BASE + 2G to VMALLOC_START + PGTABLE_RANGE
52 #define FULL_IO_SIZE 0x80000000ul
53 #define ISA_IO_BASE (VMALLOC_END)
54 #define ISA_IO_END (VMALLOC_END + 0x10000ul)
55 #define PHB_IO_BASE (ISA_IO_END)
56 #define PHB_IO_END (VMALLOC_END + FULL_IO_SIZE)
57 #define IOREMAP_BASE (PHB_IO_END)
58 #define IOREMAP_END (VMALLOC_START + PGTABLE_RANGE)
63 #define REGION_SHIFT 60UL
64 #define REGION_MASK (0xfUL << REGION_SHIFT)
65 #define REGION_ID(ea) (((unsigned long)(ea)) >> REGION_SHIFT)
67 #define VMALLOC_REGION_ID (REGION_ID(VMALLOC_START))
68 #define KERNEL_REGION_ID (REGION_ID(PAGE_OFFSET))
69 #define VMEMMAP_REGION_ID (0xfUL)
70 #define USER_REGION_ID (0UL)
73 * Defines the address of the vmemap area, in its own region
75 #define VMEMMAP_BASE (VMEMMAP_REGION_ID << REGION_SHIFT)
76 #define vmemmap ((struct page *)VMEMMAP_BASE)
80 * Include the PTE bits definitions
82 #include <asm/pte-hash64.h>
84 /* To make some generic powerpc code happy */
86 #define _PAGE_HWEXEC 0
89 /* Some other useful definitions */
90 #define PTE_RPN_MAX (1UL << (64 - PTE_RPN_SHIFT))
91 #define PTE_RPN_MASK (~((1UL<<PTE_RPN_SHIFT)-1))
93 /* _PAGE_CHG_MASK masks of bits that are to be preserved accross
96 #define _PAGE_CHG_MASK (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
97 _PAGE_ACCESSED | _PAGE_SPECIAL)
101 /* __pgprot defined in arch/powerpc/include/asm/page.h */
102 #define PAGE_NONE __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED)
104 #define PAGE_SHARED __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_USER)
105 #define PAGE_SHARED_X __pgprot(_PAGE_BASE | _PAGE_RW | _PAGE_USER | _PAGE_EXEC)
106 #define PAGE_COPY __pgprot(_PAGE_BASE | _PAGE_USER)
107 #define PAGE_COPY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
108 #define PAGE_READONLY __pgprot(_PAGE_BASE | _PAGE_USER)
109 #define PAGE_READONLY_X __pgprot(_PAGE_BASE | _PAGE_USER | _PAGE_EXEC)
110 #define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_WRENABLE)
111 #define PAGE_KERNEL_CI __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
112 _PAGE_WRENABLE | _PAGE_NO_CACHE | _PAGE_GUARDED)
113 #define PAGE_KERNEL_EXEC __pgprot(_PAGE_BASE | _PAGE_WRENABLE | _PAGE_EXEC)
115 #define PAGE_AGP __pgprot(_PAGE_BASE | _PAGE_WRENABLE | _PAGE_NO_CACHE)
116 #define HAVE_PAGE_AGP
118 /* We always have _PAGE_SPECIAL on 64 bit */
119 #define __HAVE_ARCH_PTE_SPECIAL
123 * POWER4 and newer have per page execute protection, older chips can only
124 * do this on a segment (256MB) basis.
126 * Also, write permissions imply read permissions.
127 * This is the closest we can get..
129 * Note due to the way vm flags are laid out, the bits are XWR
131 #define __P000 PAGE_NONE
132 #define __P001 PAGE_READONLY
133 #define __P010 PAGE_COPY
134 #define __P011 PAGE_COPY
135 #define __P100 PAGE_READONLY_X
136 #define __P101 PAGE_READONLY_X
137 #define __P110 PAGE_COPY_X
138 #define __P111 PAGE_COPY_X
140 #define __S000 PAGE_NONE
141 #define __S001 PAGE_READONLY
142 #define __S010 PAGE_SHARED
143 #define __S011 PAGE_SHARED
144 #define __S100 PAGE_READONLY_X
145 #define __S101 PAGE_READONLY_X
146 #define __S110 PAGE_SHARED_X
147 #define __S111 PAGE_SHARED_X
149 #ifdef CONFIG_PPC_MM_SLICES
150 #define HAVE_ARCH_UNMAPPED_AREA
151 #define HAVE_ARCH_UNMAPPED_AREA_TOPDOWN
152 #endif /* CONFIG_PPC_MM_SLICES */
157 * This is the default implementation of various PTE accessors, it's
158 * used in all cases except Book3S with 64K pages where we have a
159 * concept of sub-pages
163 #ifdef STRICT_MM_TYPECHECKS
164 #define __real_pte(e,p) ((real_pte_t){(e)})
165 #define __rpte_to_pte(r) ((r).pte)
167 #define __real_pte(e,p) (e)
168 #define __rpte_to_pte(r) (__pte(r))
170 #define __rpte_to_hidx(r,index) (pte_val(__rpte_to_pte(r)) >> 12)
172 #define pte_iterate_hashed_subpages(rpte, psize, va, index, shift) \
175 shift = mmu_psize_defs[psize].shift; \
177 #define pte_iterate_hashed_end() } while(0)
179 #ifdef CONFIG_PPC_HAS_HASH_64K
180 #define pte_pagesize_index(mm, addr, pte) get_slice_psize(mm, addr)
182 #define pte_pagesize_index(mm, addr, pte) MMU_PAGE_4K
185 #endif /* __real_pte */
189 * Conversion functions: convert a page and protection to a page entry,
190 * and a page entry and page directory to the page they refer to.
192 * mk_pte takes a (struct page *) as input
194 #define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
196 static inline pte_t
pfn_pte(unsigned long pfn
, pgprot_t pgprot
)
201 pte_val(pte
) = (pfn
<< PTE_RPN_SHIFT
) | pgprot_val(pgprot
);
205 #define pte_modify(_pte, newprot) \
206 (__pte((pte_val(_pte) & _PAGE_CHG_MASK) | pgprot_val(newprot)))
208 #define pte_none(pte) ((pte_val(pte) & ~_PAGE_HPTEFLAGS) == 0)
209 #define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
211 /* pte_clear moved to later in this file */
213 #define pte_pfn(x) ((unsigned long)((pte_val(x)>>PTE_RPN_SHIFT)))
214 #define pte_page(x) pfn_to_page(pte_pfn(x))
216 #define PMD_BAD_BITS (PTE_TABLE_SIZE-1)
217 #define PUD_BAD_BITS (PMD_TABLE_SIZE-1)
219 #define pmd_set(pmdp, pmdval) (pmd_val(*(pmdp)) = (pmdval))
220 #define pmd_none(pmd) (!pmd_val(pmd))
221 #define pmd_bad(pmd) (!is_kernel_addr(pmd_val(pmd)) \
222 || (pmd_val(pmd) & PMD_BAD_BITS))
223 #define pmd_present(pmd) (pmd_val(pmd) != 0)
224 #define pmd_clear(pmdp) (pmd_val(*(pmdp)) = 0)
225 #define pmd_page_vaddr(pmd) (pmd_val(pmd) & ~PMD_MASKED_BITS)
226 #define pmd_page(pmd) virt_to_page(pmd_page_vaddr(pmd))
228 #define pud_set(pudp, pudval) (pud_val(*(pudp)) = (pudval))
229 #define pud_none(pud) (!pud_val(pud))
230 #define pud_bad(pud) (!is_kernel_addr(pud_val(pud)) \
231 || (pud_val(pud) & PUD_BAD_BITS))
232 #define pud_present(pud) (pud_val(pud) != 0)
233 #define pud_clear(pudp) (pud_val(*(pudp)) = 0)
234 #define pud_page_vaddr(pud) (pud_val(pud) & ~PUD_MASKED_BITS)
235 #define pud_page(pud) virt_to_page(pud_page_vaddr(pud))
237 #define pgd_set(pgdp, pudp) ({pgd_val(*(pgdp)) = (unsigned long)(pudp);})
240 * Find an entry in a page-table-directory. We combine the address region
241 * (the high order N bits) and the pgd portion of the address.
243 /* to avoid overflow in free_pgtables we don't use PTRS_PER_PGD here */
244 #define pgd_index(address) (((address) >> (PGDIR_SHIFT)) & 0x1ff)
246 #define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
248 #define pmd_offset(pudp,addr) \
249 (((pmd_t *) pud_page_vaddr(*(pudp))) + (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1)))
251 #define pte_offset_kernel(dir,addr) \
252 (((pte_t *) pmd_page_vaddr(*(dir))) + (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
254 #define pte_offset_map(dir,addr) pte_offset_kernel((dir), (addr))
255 #define pte_offset_map_nested(dir,addr) pte_offset_kernel((dir), (addr))
256 #define pte_unmap(pte) do { } while(0)
257 #define pte_unmap_nested(pte) do { } while(0)
259 /* to find an entry in a kernel page-table-directory */
260 /* This now only contains the vmalloc pages */
261 #define pgd_offset_k(address) pgd_offset(&init_mm, address)
264 * The following only work if pte_present() is true.
265 * Undefined behaviour if not..
267 static inline int pte_write(pte_t pte
) { return pte_val(pte
) & _PAGE_RW
;}
268 static inline int pte_dirty(pte_t pte
) { return pte_val(pte
) & _PAGE_DIRTY
;}
269 static inline int pte_young(pte_t pte
) { return pte_val(pte
) & _PAGE_ACCESSED
;}
270 static inline int pte_file(pte_t pte
) { return pte_val(pte
) & _PAGE_FILE
;}
271 static inline int pte_special(pte_t pte
) { return pte_val(pte
) & _PAGE_SPECIAL
; }
273 static inline pte_t
pte_wrprotect(pte_t pte
) {
274 pte_val(pte
) &= ~(_PAGE_RW
); return pte
; }
275 static inline pte_t
pte_mkclean(pte_t pte
) {
276 pte_val(pte
) &= ~(_PAGE_DIRTY
); return pte
; }
277 static inline pte_t
pte_mkold(pte_t pte
) {
278 pte_val(pte
) &= ~_PAGE_ACCESSED
; return pte
; }
279 static inline pte_t
pte_mkwrite(pte_t pte
) {
280 pte_val(pte
) |= _PAGE_RW
; return pte
; }
281 static inline pte_t
pte_mkdirty(pte_t pte
) {
282 pte_val(pte
) |= _PAGE_DIRTY
; return pte
; }
283 static inline pte_t
pte_mkyoung(pte_t pte
) {
284 pte_val(pte
) |= _PAGE_ACCESSED
; return pte
; }
285 static inline pte_t
pte_mkhuge(pte_t pte
) {
287 static inline pte_t
pte_mkspecial(pte_t pte
) {
288 pte_val(pte
) |= _PAGE_SPECIAL
; return pte
; }
289 static inline pgprot_t
pte_pgprot(pte_t pte
)
291 return __pgprot(pte_val(pte
) & PAGE_PROT_BITS
);
294 /* Atomic PTE updates */
295 static inline unsigned long pte_update(struct mm_struct
*mm
,
297 pte_t
*ptep
, unsigned long clr
,
300 unsigned long old
, tmp
;
302 __asm__
__volatile__(
303 "1: ldarx %0,0,%3 # pte_update\n\
309 : "=&r" (old
), "=&r" (tmp
), "=m" (*ptep
)
310 : "r" (ptep
), "r" (clr
), "m" (*ptep
), "i" (_PAGE_BUSY
)
313 /* huge pages use the old page table lock */
315 assert_pte_locked(mm
, addr
);
317 if (old
& _PAGE_HASHPTE
)
318 hpte_need_flush(mm
, addr
, ptep
, old
, huge
);
322 static inline int __ptep_test_and_clear_young(struct mm_struct
*mm
,
323 unsigned long addr
, pte_t
*ptep
)
327 if ((pte_val(*ptep
) & (_PAGE_ACCESSED
| _PAGE_HASHPTE
)) == 0)
329 old
= pte_update(mm
, addr
, ptep
, _PAGE_ACCESSED
, 0);
330 return (old
& _PAGE_ACCESSED
) != 0;
332 #define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
333 #define ptep_test_and_clear_young(__vma, __addr, __ptep) \
336 __r = __ptep_test_and_clear_young((__vma)->vm_mm, __addr, __ptep); \
340 #define __HAVE_ARCH_PTEP_SET_WRPROTECT
341 static inline void ptep_set_wrprotect(struct mm_struct
*mm
, unsigned long addr
,
346 if ((pte_val(*ptep
) & _PAGE_RW
) == 0)
348 old
= pte_update(mm
, addr
, ptep
, _PAGE_RW
, 0);
351 static inline void huge_ptep_set_wrprotect(struct mm_struct
*mm
,
352 unsigned long addr
, pte_t
*ptep
)
356 if ((pte_val(*ptep
) & _PAGE_RW
) == 0)
358 old
= pte_update(mm
, addr
, ptep
, _PAGE_RW
, 1);
362 * We currently remove entries from the hashtable regardless of whether
363 * the entry was young or dirty. The generic routines only flush if the
364 * entry was young or dirty which is not good enough.
366 * We should be more intelligent about this but for the moment we override
367 * these functions and force a tlb flush unconditionally
369 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
370 #define ptep_clear_flush_young(__vma, __address, __ptep) \
372 int __young = __ptep_test_and_clear_young((__vma)->vm_mm, __address, \
377 #define __HAVE_ARCH_PTEP_GET_AND_CLEAR
378 static inline pte_t
ptep_get_and_clear(struct mm_struct
*mm
,
379 unsigned long addr
, pte_t
*ptep
)
381 unsigned long old
= pte_update(mm
, addr
, ptep
, ~0UL, 0);
385 static inline void pte_clear(struct mm_struct
*mm
, unsigned long addr
,
388 pte_update(mm
, addr
, ptep
, ~0UL, 0);
392 /* Set the dirty and/or accessed bits atomically in a linux PTE, this
393 * function doesn't need to flush the hash entry
395 static inline void __ptep_set_access_flags(pte_t
*ptep
, pte_t entry
)
397 unsigned long bits
= pte_val(entry
) &
398 (_PAGE_DIRTY
| _PAGE_ACCESSED
| _PAGE_RW
| _PAGE_EXEC
);
399 unsigned long old
, tmp
;
401 __asm__
__volatile__(
408 :"=&r" (old
), "=&r" (tmp
), "=m" (*ptep
)
409 :"r" (bits
), "r" (ptep
), "m" (*ptep
), "i" (_PAGE_BUSY
)
413 #define __HAVE_ARCH_PTE_SAME
414 #define pte_same(A,B) (((pte_val(A) ^ pte_val(B)) & ~_PAGE_HPTEFLAGS) == 0)
416 #define pte_ERROR(e) \
417 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
418 #define pmd_ERROR(e) \
419 printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
420 #define pgd_ERROR(e) \
421 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
423 /* Encode and de-code a swap entry */
424 #define __swp_type(entry) (((entry).val >> 1) & 0x3f)
425 #define __swp_offset(entry) ((entry).val >> 8)
426 #define __swp_entry(type, offset) ((swp_entry_t){((type)<< 1)|((offset)<<8)})
427 #define __pte_to_swp_entry(pte) ((swp_entry_t){pte_val(pte) >> PTE_RPN_SHIFT})
428 #define __swp_entry_to_pte(x) ((pte_t) { (x).val << PTE_RPN_SHIFT })
429 #define pte_to_pgoff(pte) (pte_val(pte) >> PTE_RPN_SHIFT)
430 #define pgoff_to_pte(off) ((pte_t) {((off) << PTE_RPN_SHIFT)|_PAGE_FILE})
431 #define PTE_FILE_MAX_BITS (BITS_PER_LONG - PTE_RPN_SHIFT)
433 void pgtable_cache_init(void);
436 * find_linux_pte returns the address of a linux pte for a given
437 * effective address and directory. If not found, it returns zero.
438 */static inline pte_t
*find_linux_pte(pgd_t
*pgdir
, unsigned long ea
)
445 pg
= pgdir
+ pgd_index(ea
);
446 if (!pgd_none(*pg
)) {
447 pu
= pud_offset(pg
, ea
);
448 if (!pud_none(*pu
)) {
449 pm
= pmd_offset(pu
, ea
);
450 if (pmd_present(*pm
))
451 pt
= pte_offset_kernel(pm
, ea
);
457 pte_t
*huge_pte_offset(struct mm_struct
*mm
, unsigned long address
);
459 #endif /* __ASSEMBLY__ */
461 #endif /* _ASM_POWERPC_PGTABLE_PPC64_H_ */
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